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[adm5120] remove 2.6.25 specific stuff

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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@12598 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
juhosg
2008-09-13 17:32:20 +00:00
parent efd888e4be
commit b610f4bee8
85 changed files with 1 additions and 14419 deletions
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20
target/linux/adm5120/files/arch/mips/adm5120/Kconfig
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@@ -1,20 +0,0 @@
if MIPS_ADM5120
menu "ADM5120 Implementation Options"
config ADM5120_CPU_OVERRIDES
bool "Enable CPU feature overrides"
default y
config PCI_ADM5120
bool "Enable PCI support"
select PCI
default y
endmenu
config ARM_AMBA
bool
default y
endif

11
target/linux/adm5120/files/arch/mips/adm5120/Makefile
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@@ -1,11 +0,0 @@
#
# Makefile for the ADMtek ADM5120 SoC specific parts of the kernel
#
obj-y := setup.o prom.o irq.o memory.o adm5120_info.o
obj-y += board.o
obj-y += clock.o
obj-y += gpio.o
obj-y += platform.o
obj-y += reset.o
obj-y += time.o

80
target/linux/adm5120/files/arch/mips/adm5120/adm5120_info.c
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@@ -1,80 +0,0 @@
/*
* $Id$
*
* Copyright (C) 2007 OpenWrt.org
* Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
*/
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/io.h>
#include <asm/bootinfo.h>
#include <asm/addrspace.h>
#include <adm5120_info.h>
#include <adm5120_defs.h>
#include <adm5120_switch.h>
unsigned int adm5120_product_code;
unsigned int adm5120_revision;
unsigned int adm5120_package;
unsigned int adm5120_nand_boot;
unsigned long adm5120_speed;
/*
* CPU settings detection
*/
#define CODE_GET_PC(c) ((c) & CODE_PC_MASK)
#define CODE_GET_REV(c) (((c) >> CODE_REV_SHIFT) & CODE_REV_MASK)
#define CODE_GET_PK(c) (((c) >> CODE_PK_SHIFT) & CODE_PK_MASK)
#define CODE_GET_CLKS(c) (((c) >> CODE_CLKS_SHIFT) & CODE_CLKS_MASK)
#define CODE_GET_NAB(c) (((c) & CODE_NAB) != 0)
void adm5120_ndelay(u32 ns)
{
u32 t;
SW_WRITE_REG(SWITCH_REG_TIMER, TIMER_PERIOD_DEFAULT);
SW_WRITE_REG(SWITCH_REG_TIMER_INT, (TIMER_INT_TOS | TIMER_INT_TOM));
t = (ns+640) / 640;
t &= TIMER_PERIOD_MASK;
SW_WRITE_REG(SWITCH_REG_TIMER, t | TIMER_TE);
/* wait until the timer expires */
do {
t = SW_READ_REG(SWITCH_REG_TIMER_INT);
} while ((t & TIMER_INT_TOS) == 0);
/* leave the timer disabled */
SW_WRITE_REG(SWITCH_REG_TIMER, TIMER_PERIOD_DEFAULT);
SW_WRITE_REG(SWITCH_REG_TIMER_INT, (TIMER_INT_TOS | TIMER_INT_TOM));
}
void __init adm5120_soc_init(void)
{
u32 code;
u32 clks;
code = SW_READ_REG(SWITCH_REG_CODE);
adm5120_product_code = CODE_GET_PC(code);
adm5120_revision = CODE_GET_REV(code);
adm5120_package = (CODE_GET_PK(code) == CODE_PK_BGA) ?
ADM5120_PACKAGE_BGA : ADM5120_PACKAGE_PQFP;
adm5120_nand_boot = CODE_GET_NAB(code);
clks = CODE_GET_CLKS(code);
adm5120_speed = ADM5120_SPEED_175;
if (clks & 1)
adm5120_speed += 25000000;
if (clks & 2)
adm5120_speed += 50000000;
}

118
target/linux/adm5120/files/arch/mips/adm5120/board.c
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@@ -1,118 +0,0 @@
/*
* $Id$
*
* ADM5120 generic board code
*
* Copyright (C) 2007,2008 OpenWrt.org
* Copyright (C) 2007,2008 Gabor Juhos <juhosg at openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/device.h>
#include <linux/platform_device.h>
#include <asm/bootinfo.h>
#include <adm5120_info.h>
#include <adm5120_defs.h>
#include <adm5120_irq.h>
#include <adm5120_board.h>
#include <adm5120_platform.h>
#define PFX "adm5120: "
static struct list_head adm5120_boards __initdata =
LIST_HEAD_INIT(adm5120_boards);
static char adm5120_board_name[ADM5120_BOARD_NAMELEN];
const char *get_system_type(void)
{
return adm5120_board_name;
}
static struct adm5120_board * __init adm5120_board_find(unsigned long machtype)
{
struct list_head *this;
struct adm5120_board *board;
void *ret;
ret = NULL;
list_for_each(this, &adm5120_boards) {
board = list_entry(this, struct adm5120_board, list);
if (board->mach_type == machtype) {
ret = board;
break;
}
}
return ret;
}
static int __init adm5120_board_setup(void)
{
struct adm5120_board *board;
int err;
board = adm5120_board_find(mips_machtype);
if (board == NULL) {
printk(KERN_ALERT PFX "no board registered for "
"machtype %lu, trying generic\n", mips_machtype);
board = adm5120_board_find(MACH_ADM5120_GENERIC);
if (board == NULL)
panic(PFX "unsupported board\n");
}
printk(KERN_INFO PFX "board is '%s'\n", board->name);
memcpy(&adm5120_board_name, board->name, ADM5120_BOARD_NAMELEN);
adm5120_gpio_init();
adm5120_board_reset = board->board_reset;
if (board->eth_num_ports > 0)
adm5120_eth_num_ports = board->eth_num_ports;
if (board->eth_vlans)
memcpy(adm5120_eth_vlans, board->eth_vlans,
sizeof(adm5120_eth_vlans));
if (board->board_setup)
board->board_setup();
/* register UARTs */
amba_device_register(&adm5120_uart0_device, &iomem_resource);
amba_device_register(&adm5120_uart1_device, &iomem_resource);
/* register built-in ethernet switch */
platform_device_register(&adm5120_switch_device);
if (adm5120_package_pqfp())
adm5120_gpiodev_resource.start &= ~0xf0;
platform_device_register(&adm5120_gpiodev_device);
/* setup PCI irq map */
adm5120_pci_set_irq_map(board->pci_nr_irqs, board->pci_irq_map);
/* register board devices */
if (board->num_devices > 0 && board->devices != NULL) {
err = platform_add_devices(board->devices, board->num_devices);
if (err)
printk(KERN_ALERT PFX "adding board devices failed\n");
}
return 0;
}
arch_initcall(adm5120_board_setup);
void __init adm5120_board_register(struct adm5120_board *board)
{
list_add_tail(&board->list, &adm5120_boards);
}

11
target/linux/adm5120/files/arch/mips/adm5120/boards/Makefile
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@@ -1,11 +0,0 @@
#
# Makefile for platforms based on ADM5120 SoC
#
obj-y += generic.o
obj-y += cellvision.o
obj-y += compex.o
obj-y += edimax.o
obj-y += infineon.o
obj-y += mikrotik.o
obj-y += zyxel.o

208
target/linux/adm5120/files/arch/mips/adm5120/boards/cellvision.c
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@@ -1,208 +0,0 @@
/*
* $Id$
*
* Cellvision/SparkLAN boards
*
* Copyright (C) 2007 OpenWrt.org
* Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/bootinfo.h>
#include <asm/gpio.h>
#include <adm5120_board.h>
#include <adm5120_platform.h>
#include <adm5120_irq.h>
#define CAS6XX_GPIO_DEV_MASK (1 << ADM5120_GPIO_PIN5)
#define CAS7XX_GPIO_DEV_MASK (1 << ADM5120_GPIO_PIN5)
#define NFS_GPIO_DEV_MASK (1 << ADM5120_GPIO_PIN5)
static void switch_bank_gpio5(unsigned bank)
{
switch (bank) {
case 0:
gpio_set_value(ADM5120_GPIO_PIN5, 0);
break;
case 1:
gpio_set_value(ADM5120_GPIO_PIN5, 1);
break;
}
}
static struct adm5120_pci_irq cas771_pci_irqs[] __initdata = {
PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI0),
PCIIRQ(3, 0, 1, ADM5120_IRQ_PCI1),
PCIIRQ(3, 2, 3, ADM5120_IRQ_PCI2)
};
static struct mtd_partition cas6xx_partitions[] = {
{
.name = "admboot",
.offset = 0,
.size = 32*1024,
.mask_flags = MTD_WRITEABLE,
} , {
.name = "config",
.offset = MTDPART_OFS_APPEND,
.size = 32*1024,
} , {
.name = "nvfs1",
.offset = MTDPART_OFS_APPEND,
.size = 64*1024,
} , {
.name = "nvfs2",
.offset = MTDPART_OFS_APPEND,
.size = 64*1024,
} , {
.name = "firmware",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
}
};
static struct mtd_partition cas7xx_partitions[] = {
{
.name = "admboot",
.offset = 0,
.size = 32*1024,
.mask_flags = MTD_WRITEABLE,
} , {
.name = "config",
.offset = MTDPART_OFS_APPEND,
.size = 32*1024,
} , {
.name = "nvfs",
.offset = MTDPART_OFS_APPEND,
.size = 128*1024,
} , {
.name = "firmware",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
}
};
static struct platform_device *cas6xx_devices[] __initdata = {
&adm5120_flash0_device,
};
static struct platform_device *cas7xx_devices[] __initdata = {
&adm5120_flash0_device,
};
static void __init cas6xx_setup(void)
{
gpio_request(ADM5120_GPIO_PIN5, NULL); /* for flash A20 line */
gpio_direction_output(ADM5120_GPIO_PIN5, 0);
/* setup data for flash0 device */
adm5120_flash0_data.switch_bank = switch_bank_gpio5;
adm5120_flash0_data.nr_parts = ARRAY_SIZE(cas6xx_partitions);
adm5120_flash0_data.parts = cas6xx_partitions;
adm5120_gpiodev_resource.start &= ~CAS6XX_GPIO_DEV_MASK;
/* TODO: setup mac address */
}
static void __init cas7xx_setup(void)
{
gpio_request(ADM5120_GPIO_PIN5, NULL); /* for flash A20 line */
gpio_direction_output(ADM5120_GPIO_PIN5, 0);
/* setup data for flash0 device */
adm5120_flash0_data.switch_bank = switch_bank_gpio5;
adm5120_flash0_data.nr_parts = ARRAY_SIZE(cas7xx_partitions);
adm5120_flash0_data.parts = cas7xx_partitions;
adm5120_gpiodev_resource.start &= ~CAS7XX_GPIO_DEV_MASK;
/* TODO: setup mac address */
}
static void __init nfs_setup(void)
{
gpio_request(ADM5120_GPIO_PIN5, NULL); /* for flash A20 line */
gpio_direction_output(ADM5120_GPIO_PIN5, 0);
/* setup data for flash0 device */
adm5120_flash0_data.switch_bank = switch_bank_gpio5;
adm5120_flash0_data.nr_parts = ARRAY_SIZE(cas6xx_partitions);
adm5120_flash0_data.parts = cas6xx_partitions;
adm5120_gpiodev_resource.start &= ~NFS_GPIO_DEV_MASK;
/* TODO: setup mac address */
}
unsigned char nfs_vlans[6] = { /* TODO: not tested */
0x41, 0x42, 0x44, 0x48, 0x50, 0x00
};
/*--------------------------------------------------------------------------*/
ADM5120_BOARD_START(CAS630, "Cellvision CAS-630/630W")
.board_setup = cas6xx_setup,
.eth_num_ports = 1,
.num_devices = ARRAY_SIZE(cas6xx_devices),
.devices = cas6xx_devices,
/* TODO: PCI IRQ map */
ADM5120_BOARD_END
ADM5120_BOARD_START(CAS670, "Cellvision CAS-670/670W")
.board_setup = cas6xx_setup,
.eth_num_ports = 1,
.num_devices = ARRAY_SIZE(cas6xx_devices),
.devices = cas6xx_devices,
/* TODO: PCI IRQ map */
ADM5120_BOARD_END
ADM5120_BOARD_START(CAS700, "Cellvision CAS-700/700W")
.board_setup = cas7xx_setup,
.eth_num_ports = 1,
.num_devices = ARRAY_SIZE(cas7xx_devices),
.devices = cas7xx_devices,
/* TODO: PCI IRQ map */
ADM5120_BOARD_END
ADM5120_BOARD_START(CAS771, "Cellvision CAS-771/771W")
.board_setup = cas7xx_setup,
.eth_num_ports = 1,
.num_devices = ARRAY_SIZE(cas7xx_devices),
.devices = cas7xx_devices,
.pci_nr_irqs = ARRAY_SIZE(cas771_pci_irqs),
.pci_irq_map = cas771_pci_irqs,
ADM5120_BOARD_END
ADM5120_BOARD_START(CAS790, "Cellvision CAS-790")
.board_setup = cas7xx_setup,
.eth_num_ports = 1,
.num_devices = ARRAY_SIZE(cas7xx_devices),
.devices = cas7xx_devices,
/* TODO: PCI IRQ map */
ADM5120_BOARD_END
ADM5120_BOARD_START(CAS861, "Cellvision CAS-861/861W")
.board_setup = cas7xx_setup,
.eth_num_ports = 1,
.num_devices = ARRAY_SIZE(cas7xx_devices),
.devices = cas7xx_devices,
/* TODO: PCI IRQ map */
ADM5120_BOARD_END
ADM5120_BOARD_START(NFS101U, "Cellvision NFS-101U/101WU")
.board_setup = nfs_setup,
.eth_num_ports = 5,
.eth_vlans = nfs_vlans,
.num_devices = ARRAY_SIZE(cas6xx_devices),
.devices = cas6xx_devices,
/* TODO: PCI IRQ map */
ADM5120_BOARD_END

240
target/linux/adm5120/files/arch/mips/adm5120/boards/compex.c
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@@ -1,240 +0,0 @@
/*
* $Id$
*
* Compex boards
*
* Copyright (C) 2007-2008 OpenWrt.org
* Copyright (C) 2007-2008 Gabor Juhos <juhosg at openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/bootinfo.h>
#include <asm/gpio.h>
#include <adm5120_board.h>
#include <adm5120_platform.h>
#include <adm5120_irq.h>
#define NP27G_GPIO_DEV_MASK (1 << ADM5120_GPIO_PIN5)
#define NP28G_GPIO_DEV_MASK ( 1 << ADM5120_GPIO_PIN5 \
| 1 << ADM5120_GPIO_PIN4)
#define WP54_GPIO_DEV_MASK ( 1 << ADM5120_GPIO_PIN5 \
| 1 << ADM5120_GPIO_PIN3)
static struct adm5120_pci_irq wp54_pci_irqs[] __initdata = {
PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI0),
};
static struct adm5120_pci_irq np28g_pci_irqs[] __initdata = {
PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI0),
PCIIRQ(3, 0, 1, ADM5120_IRQ_PCI0),
PCIIRQ(3, 1, 2, ADM5120_IRQ_PCI1),
PCIIRQ(3, 2, 3, ADM5120_IRQ_PCI2)
};
static struct mtd_partition wp54g_wrt_partitions[] = {
{
.name = "cfe",
.offset = 0,
.size = 0x050000,
.mask_flags = MTD_WRITEABLE,
} , {
.name = "trx",
.offset = MTDPART_OFS_APPEND,
.size = 0x3A0000,
} , {
.name = "nvram",
.offset = MTDPART_OFS_APPEND,
.size = 0x010000,
}
};
static struct platform_device *np2xg_devices[] __initdata = {
&adm5120_flash0_device,
&adm5120_hcd_device,
};
static struct platform_device *wp54_devices[] __initdata = {
&adm5120_flash0_device,
&adm5120_buttons_device,
};
unsigned char np27g_vlans[6] __initdata = {
/* FIXME: untested */
0x41, 0x42, 0x44, 0x48, 0x50, 0x00
};
unsigned char np28g_vlans[6] __initdata = {
0x50, 0x42, 0x44, 0x48, 0x00, 0x00
};
unsigned char wp54_vlans[6] __initdata = {
0x41, 0x42, 0x00, 0x00, 0x00, 0x00
};
/*--------------------------------------------------------------------------*/
static void switch_bank_gpio5(unsigned bank)
{
switch (bank) {
case 0:
gpio_set_value(ADM5120_GPIO_PIN5, 0);
break;
case 1:
gpio_set_value(ADM5120_GPIO_PIN5, 1);
break;
}
}
static void wp54_reset(void)
{
gpio_set_value(ADM5120_GPIO_PIN3, 0);
}
static void np28g_reset(void)
{
gpio_set_value(ADM5120_GPIO_PIN4, 0);
}
static void __init np27g_setup(void)
{
gpio_request(ADM5120_GPIO_PIN5, NULL); /* for flash A20 line */
gpio_direction_output(ADM5120_GPIO_PIN5, 0);
/* setup data for flash0 device */
adm5120_flash0_data.switch_bank = switch_bank_gpio5;
adm5120_gpiodev_resource.start &= ~NP27G_GPIO_DEV_MASK;
/* TODO: setup mac address */
}
static void __init np28g_setup(void)
{
gpio_request(ADM5120_GPIO_PIN5, NULL); /* for flash A20 line */
gpio_direction_output(ADM5120_GPIO_PIN5, 0);
gpio_request(ADM5120_GPIO_PIN4, NULL); /* for system reset */
gpio_direction_output(ADM5120_GPIO_PIN4, 1);
/* setup data for flash0 device */
adm5120_flash0_data.switch_bank = switch_bank_gpio5;
adm5120_gpiodev_resource.start &= ~NP28G_GPIO_DEV_MASK;
/* TODO: setup mac address */
}
static void __init wp54_setup(void)
{
gpio_request(ADM5120_GPIO_PIN5, NULL); /* for flash A20 line */
gpio_direction_output(ADM5120_GPIO_PIN5, 0);
gpio_request(ADM5120_GPIO_PIN3, NULL); /* for system reset */
gpio_direction_output(ADM5120_GPIO_PIN3, 1);
/* setup data for flash0 device */
adm5120_flash0_data.switch_bank = switch_bank_gpio5;
adm5120_buttons_data.nbuttons = 1;
adm5120_buttons[0].desc = "reset button";
adm5120_buttons[0].gpio = ADM5120_GPIO_PIN4;
adm5120_gpiodev_resource.start &= ~WP54_GPIO_DEV_MASK;
/* TODO: setup mac address */
}
static void __init wp54_wrt_setup(void)
{
wp54_setup();
adm5120_flash0_data.nr_parts = ARRAY_SIZE(wp54g_wrt_partitions);
adm5120_flash0_data.parts = wp54g_wrt_partitions;
/* TODO: setup mac address */
}
/*--------------------------------------------------------------------------*/
ADM5120_BOARD_START(NP27G, "Compex NetPassage 27G")
.board_setup = np27g_setup,
.eth_num_ports = 5,
.eth_vlans = np27g_vlans,
.num_devices = ARRAY_SIZE(np2xg_devices),
.devices = np2xg_devices,
/* TODO: add PCI IRQ map */
ADM5120_BOARD_END
ADM5120_BOARD_START(NP28G, "Compex NetPassage 28G")
.board_setup = np28g_setup,
.board_reset = np28g_reset,
.eth_num_ports = 4,
.eth_vlans = np28g_vlans,
.num_devices = ARRAY_SIZE(np2xg_devices),
.devices = np2xg_devices,
.pci_nr_irqs = ARRAY_SIZE(np28g_pci_irqs),
.pci_irq_map = np28g_pci_irqs,
ADM5120_BOARD_END
ADM5120_BOARD_START(WP54AG, "Compex WP54AG")
.board_setup = wp54_setup,
.board_reset = wp54_reset,
.eth_num_ports = 2,
.eth_vlans = wp54_vlans,
.num_devices = ARRAY_SIZE(wp54_devices),
.devices = wp54_devices,
.pci_nr_irqs = ARRAY_SIZE(wp54_pci_irqs),
.pci_irq_map = wp54_pci_irqs,
ADM5120_BOARD_END
ADM5120_BOARD_START(WP54G, "Compex WP54G")
.board_setup = wp54_setup,
.board_reset = wp54_reset,
.eth_num_ports = 2,
.eth_vlans = wp54_vlans,
.num_devices = ARRAY_SIZE(wp54_devices),
.devices = wp54_devices,
.pci_nr_irqs = ARRAY_SIZE(wp54_pci_irqs),
.pci_irq_map = wp54_pci_irqs,
ADM5120_BOARD_END
ADM5120_BOARD_START(WP54G_WRT, "Compex WP54G-WRT")
.board_setup = wp54_wrt_setup,
.board_reset = wp54_reset,
.eth_num_ports = 2,
.eth_vlans = wp54_vlans,
.num_devices = ARRAY_SIZE(wp54_devices),
.devices = wp54_devices,
.pci_nr_irqs = ARRAY_SIZE(wp54_pci_irqs),
.pci_irq_map = wp54_pci_irqs,
ADM5120_BOARD_END
ADM5120_BOARD_START(WPP54AG, "Compex WPP54AG")
.board_setup = wp54_setup,
.board_reset = wp54_reset,
.eth_num_ports = 2,
.eth_vlans = wp54_vlans,
.num_devices = ARRAY_SIZE(wp54_devices),
.devices = wp54_devices,
.pci_nr_irqs = ARRAY_SIZE(wp54_pci_irqs),
.pci_irq_map = wp54_pci_irqs,
ADM5120_BOARD_END
ADM5120_BOARD_START(WPP54G, "Compex WPP54G")
.board_setup = wp54_setup,
.board_reset = wp54_reset,
.eth_num_ports = 2,
.eth_vlans = wp54_vlans,
.num_devices = ARRAY_SIZE(wp54_devices),
.devices = wp54_devices,
.pci_nr_irqs = ARRAY_SIZE(wp54_pci_irqs),
.pci_irq_map = wp54_pci_irqs,
ADM5120_BOARD_END

90
target/linux/adm5120/files/arch/mips/adm5120/boards/edimax.c
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@@ -1,90 +0,0 @@
/*
* $Id$
*
* Edimax boards
*
* Copyright (C) 2007-2008 OpenWrt.org
* Copyright (C) 2007-2008 Gabor Juhos <juhosg at openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/bootinfo.h>
#include <asm/gpio.h>
#include <adm5120_board.h>
#include <adm5120_irq.h>
#include <adm5120_platform.h>
static struct adm5120_pci_irq br61xx_pci_irqs[] __initdata = {
PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI0),
};
static struct mtd_partition br61xx_partitions[] = {
{
.name = "admboot",
.offset = 0,
.size = 32*1024,
.mask_flags = MTD_WRITEABLE,
} , {
.name = "config",
.offset = MTDPART_OFS_APPEND,
.size = 32*1024,
} , {
.name = "firmware",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
}
};
static struct platform_device *br6104k_devices[] __initdata = {
&adm5120_flash0_device,
&adm5120_hcd_device,
&adm5120_buttons_device,
};
static struct platform_device *br61x4wg_devices[] __initdata = {
&adm5120_flash0_device,
};
static void __init br61xx_setup(void) {
/* setup data for flash0 device */
adm5120_flash0_data.nr_parts = ARRAY_SIZE(br61xx_partitions);
adm5120_flash0_data.parts = br61xx_partitions;
adm5120_buttons_data.nbuttons = 1;
adm5120_buttons[0].desc = "reset button";
adm5120_buttons[0].gpio = ADM5120_GPIO_PIN2;
/* TODO: setup mac addresses, if possible */
}
unsigned char br61xx_vlans[6] = {
0x41, 0x42, 0x44, 0x48, 0x50, 0x00
};
/*--------------------------------------------------------------------------*/
ADM5120_BOARD_START(BR6104K, "Edimax BR-6104K/6104KP")
.board_setup = br61xx_setup,
.eth_num_ports = 5,
.eth_vlans = br61xx_vlans,
.num_devices = ARRAY_SIZE(br6104k_devices),
.devices = br6104k_devices,
ADM5120_BOARD_END
ADM5120_BOARD_START(BR61x4WG, "Edimax BR-6104WG/6114WG")
.board_setup = br61xx_setup,
.eth_num_ports = 5,
.eth_vlans = br61xx_vlans,
.num_devices = ARRAY_SIZE(br61x4wg_devices),
.devices = br61x4wg_devices,
.pci_nr_irqs = ARRAY_SIZE(br61xx_pci_irqs),
.pci_irq_map = br61xx_pci_irqs,
ADM5120_BOARD_END

35
target/linux/adm5120/files/arch/mips/adm5120/boards/generic.c
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@@ -1,35 +0,0 @@
/*
* $Id$
*
* Generic ADM5120 based board
*
* Copyright (C) 2007 OpenWrt.org
* Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/bootinfo.h>
#include <asm/gpio.h>
#include <adm5120_board.h>
#include <adm5120_platform.h>
static struct platform_device *generic_devices[] __initdata = {
&adm5120_flash0_device,
&adm5120_hcd_device,
};
/*--------------------------------------------------------------------------*/
ADM5120_BOARD_START(GENERIC, "Generic ADM5120 board")
.eth_num_ports = 6,
.num_devices = ARRAY_SIZE(generic_devices),
.devices = generic_devices,
ADM5120_BOARD_END

160
target/linux/adm5120/files/arch/mips/adm5120/boards/infineon.c
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@@ -1,160 +0,0 @@
/*
* $Id$
*
* Infineon boards
*
* Copyright (C) 2007 OpenWrt.org
* Copyright (C) 2007,2008 Gabor Juhos <juhosg at openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/bootinfo.h>
#include <asm/gpio.h>
#include <adm5120_defs.h>
#include <adm5120_irq.h>
#include <adm5120_board.h>
#include <adm5120_platform.h>
#include <adm5120_info.h>
#define EASY_PQFP_GPIO_DEV_MASK (1 << ADM5120_GPIO_PIN3)
#define EASY_BGA_GPIO_DEV_MASK (1 << ADM5120_GPIO_PIN5)
static void switch_bank_gpio3(unsigned bank)
{
switch (bank) {
case 0:
gpio_set_value(ADM5120_GPIO_PIN3, 0);
break;
case 1:
gpio_set_value(ADM5120_GPIO_PIN3, 1);
break;
}
}
static void switch_bank_gpio5(unsigned bank)
{
switch (bank) {
case 0:
gpio_set_value(ADM5120_GPIO_PIN5, 0);
break;
case 1:
gpio_set_value(ADM5120_GPIO_PIN5, 1);
break;
}
}
static struct mtd_partition easy_partitions[] = {
{
.name = "admboot",
.offset = 0,
.size = 64*1024,
.mask_flags = MTD_WRITEABLE,
} , {
.name = "boardcfg",
.offset = MTDPART_OFS_APPEND,
.size = 64*1024,
} , {
.name = "firmware",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
}
};
static struct adm5120_pci_irq easy5120rt_pci_irqs[] __initdata = {
PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI0),
};
static struct platform_device *easy5120pata_devices[] __initdata = {
&adm5120_flash0_device,
/* TODO: add VINETIC2 device? */
};
static struct platform_device *easy5120rt_devices[] __initdata = {
&adm5120_flash0_device,
&adm5120_hcd_device,
};
static struct platform_device *easy5120wvoip_devices[] __initdata = {
&adm5120_flash0_device,
/* TODO: add VINETIC2 device? */
};
static struct platform_device *easy83000_devices[] __initdata = {
&adm5120_flash0_device,
/* TODO: add VINAX device? */
};
static void __init easy_setup_pqfp(void)
{
gpio_request(ADM5120_GPIO_PIN3, NULL); /* for flash A20 line */
gpio_direction_output(ADM5120_GPIO_PIN3, 0);
/* setup data for flash0 device */
adm5120_flash0_data.switch_bank = switch_bank_gpio3;
adm5120_flash0_data.nr_parts = ARRAY_SIZE(easy_partitions);
adm5120_flash0_data.parts = easy_partitions;
adm5120_gpiodev_resource.start &= ~EASY_PQFP_GPIO_DEV_MASK;
/* TODO: setup mac addresses */
}
static void __init easy_setup_bga(void)
{
gpio_request(ADM5120_GPIO_PIN5, NULL); /* for flash A20 line */
gpio_direction_output(ADM5120_GPIO_PIN5, 0);
/* setup data for flash0 device */
adm5120_flash0_data.switch_bank = switch_bank_gpio5;
adm5120_flash0_data.nr_parts = ARRAY_SIZE(easy_partitions);
adm5120_flash0_data.parts = easy_partitions;
adm5120_gpiodev_resource.start &= ~EASY_BGA_GPIO_DEV_MASK;
/* TODO: setup mac addresses */
}
unsigned char easy5120rt_vlans[6] = {
0x41, 0x42, 0x44, 0x48, 0x50, 0x00
};
/*--------------------------------------------------------------------------*/
ADM5120_BOARD_START(EASY5120PATA, "Infineon EASY 5120P-ATA Reference Board")
.board_setup = easy_setup_pqfp,
.eth_num_ports = 6,
.num_devices = ARRAY_SIZE(easy5120pata_devices),
.devices = easy5120pata_devices,
ADM5120_BOARD_END
ADM5120_BOARD_START(EASY5120RT, "Infineon EASY 5120-RT Reference Board")
.board_setup = easy_setup_bga,
.eth_num_ports = 5,
.eth_vlans = easy5120rt_vlans,
.num_devices = ARRAY_SIZE(easy5120rt_devices),
.devices = easy5120rt_devices,
.pci_nr_irqs = ARRAY_SIZE(easy5120rt_pci_irqs),
.pci_irq_map = easy5120rt_pci_irqs,
ADM5120_BOARD_END
ADM5120_BOARD_START(EASY5120WVOIP, "Infineon EASY 5120-WVoIP Reference Board")
.board_setup = easy_setup_bga,
.eth_num_ports = 6,
.num_devices = ARRAY_SIZE(easy5120wvoip_devices),
.devices = easy5120wvoip_devices,
ADM5120_BOARD_END
ADM5120_BOARD_START(EASY83000, "Infineon EASY 83000 Reference Board")
.board_setup = easy_setup_pqfp,
.eth_num_ports = 6,
.num_devices = ARRAY_SIZE(easy83000_devices),
.devices = easy83000_devices,
ADM5120_BOARD_END

378
target/linux/adm5120/files/arch/mips/adm5120/boards/mikrotik.c
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@@ -1,378 +0,0 @@
/*
* $Id$
*
* Mikrotik RouterBOARD 1xx series
*
* Copyright (C) 2007-2008 OpenWrt.org
* Copyright (C) 2007-2008 Gabor Juhos <juhosg at openwrt.org>
*
* NAND initialization code was based on a driver for Linux 2.6.19+ which
* was derived from the driver for Linux 2.4.xx published by Mikrotik for
* their RouterBoard 1xx and 5xx series boards.
* Copyright (C) 2007 David Goodenough <david.goodenough@linkchoose.co.uk>
* Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
* The original Mikrotik code seems not to have a license.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <asm/bootinfo.h>
#include <asm/gpio.h>
#include <adm5120_defs.h>
#include <adm5120_irq.h>
#include <adm5120_nand.h>
#include <adm5120_board.h>
#include <adm5120_platform.h>
#include <adm5120_info.h>
#include <prom/routerboot.h>
#define RB1XX_NAND_CHIP_DELAY 25
#define RB150_NAND_BASE 0x1FC80000
#define RB150_NAND_SIZE 1
#define RB150_GPIO_NAND_READY ADM5120_GPIO_PIN0
#define RB150_GPIO_NAND_NCE ADM5120_GPIO_PIN1
#define RB150_GPIO_NAND_CLE ADM5120_GPIO_P2L2
#define RB150_GPIO_NAND_ALE ADM5120_GPIO_P3L2
#define RB150_GPIO_DEV_MASK ( 1 << RB150_GPIO_NAND_READY \
| 1 << RB150_GPIO_NAND_NCE \
| 1 << RB150_GPIO_NAND_CLE \
| 1 << RB150_GPIO_NAND_ALE)
#define RB150_NAND_DELAY 100
#define RB150_NAND_WRITE(v) \
writeb((v), (void __iomem *)KSEG1ADDR(RB150_NAND_BASE))
#define RB153_GPIO_DEV_MASK ( 1 << ADM5120_GPIO_PIN0 \
| 1 << ADM5120_GPIO_PIN3 \
| 1 << ADM5120_GPIO_PIN4 )
/*--------------------------------------------------------------------------*/
static struct adm5120_pci_irq rb1xx_pci_irqs[] __initdata = {
PCIIRQ(1, 0, 1, ADM5120_IRQ_PCI0),
PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI1),
PCIIRQ(3, 0, 1, ADM5120_IRQ_PCI2)
};
static struct mtd_partition rb1xx_nor_parts[] = {
{
.name = "booter",
.offset = 0,
.size = 64*1024,
.mask_flags = MTD_WRITEABLE,
} , {
.name = "firmware",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
}
};
static struct mtd_partition rb1xx_nand_parts[] = {
{
.name = "kernel",
.offset = 0,
.size = 4 * 1024 * 1024,
} , {
.name = "rootfs",
.offset = MTDPART_OFS_NXTBLK,
.size = MTDPART_SIZ_FULL
}
};
static struct platform_device *rb1xx_devices[] __initdata = {
&adm5120_flash0_device,
&adm5120_nand_device,
&adm5120_buttons_device,
};
/*
* We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader
* will not be able to find the kernel that we load. So set the oobinfo
* when creating the partitions
*/
static struct nand_ecclayout rb1xx_nand_ecclayout = {
.eccbytes = 6,
.eccpos = { 8, 9, 10, 13, 14, 15 },
.oobavail = 9,
.oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
};
static struct resource rb150_nand_resource[] = {
[0] = {
.start = RB150_NAND_BASE,
.end = RB150_NAND_BASE + RB150_NAND_SIZE-1,
.flags = IORESOURCE_MEM,
},
};
static struct resource rb153_cf_resources[] = {
{
.name = "cf_membase",
.start = ADM5120_EXTIO1_BASE,
.end = ADM5120_EXTIO1_BASE + ADM5120_EXTIO1_SIZE-1 ,
.flags = IORESOURCE_MEM
}, {
.name = "cf_irq",
.start = ADM5120_IRQ_GPIO4,
.end = ADM5120_IRQ_GPIO4,
.flags = IORESOURCE_IRQ
}
};
static struct platform_device rb153_cf_device = {
.name = "pata-rb153-cf",
.id = -1,
.resource = rb153_cf_resources,
.num_resources = ARRAY_SIZE(rb153_cf_resources),
};
static struct platform_device *rb153_devices[] __initdata = {
&adm5120_flash0_device,
&adm5120_nand_device,
&adm5120_buttons_device,
&rb153_cf_device,
};
#if 0
/*
* RB1xx boards have bad network performance with the default VLAN matrixes.
* Disable it while the ethernet driver gets fixed.
*/
static unsigned char rb11x_vlans[6] __initdata = {
/* FIXME: untested */
0x41, 0x00, 0x00, 0x00, 0x00, 0x00
};
static unsigned char rb133_vlans[6] __initdata = {
/* FIXME: untested */
0x44, 0x42, 0x41, 0x00, 0x00, 0x00
};
static unsigned char rb133c_vlans[6] __initdata = {
/* FIXME: untested */
0x44, 0x00, 0x00, 0x00, 0x00, 0x00
};
static unsigned char rb15x_vlans[6] __initdata = {
/* FIXME: untested */
0x41, 0x42, 0x44, 0x48, 0x50, 0x00
};
static unsigned char rb192_vlans[6] __initdata = {
/* FIXME: untested */
0x41, 0x50, 0x48, 0x44, 0x42, 0x00
};
#else
static unsigned char rb_vlans[6] __initdata = {
0x7F, 0x00, 0x00, 0x00, 0x00, 0x00
};
#define rb11x_vlans rb_vlans
#define rb133_vlans rb_vlans
#define rb133c_vlans rb_vlans
#define rb15x_vlans rb_vlans
#define rb192_vlans rb_vlans
#endif
/*--------------------------------------------------------------------------*/
static int rb150_nand_ready(struct mtd_info *mtd)
{
return gpio_get_value(RB150_GPIO_NAND_READY);
}
static void rb150_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
unsigned int ctrl)
{
if (ctrl & NAND_CTRL_CHANGE) {
gpio_set_value(RB150_GPIO_NAND_CLE, (ctrl & NAND_CLE) ? 1 : 0);
gpio_set_value(RB150_GPIO_NAND_ALE, (ctrl & NAND_ALE) ? 1 : 0);
gpio_set_value(RB150_GPIO_NAND_NCE, (ctrl & NAND_NCE) ? 0 : 1);
}
udelay(RB150_NAND_DELAY);
if (cmd != NAND_CMD_NONE)
RB150_NAND_WRITE(cmd);
}
/*--------------------------------------------------------------------------*/
static void __init rb1xx_mac_setup(void)
{
int i, j;
if (!rb_hs.mac_base)
return;
for (i = 0; i < 6; i++) {
for (j = 0; j < 5; j++)
adm5120_eth_macs[i][j] = rb_hs.mac_base[j];
adm5120_eth_macs[i][5] = rb_hs.mac_base[5]+i;
}
}
static int rb1xx_nand_fixup(struct mtd_info *mtd)
{
struct nand_chip *chip = mtd->priv;
if (mtd->writesize == 512)
chip->ecc.layout = &rb1xx_nand_ecclayout;
return 0;
}
static void __init rb1xx_flash_setup(void)
{
/* setup data for flash0 device */
adm5120_flash0_data.nr_parts = ARRAY_SIZE(rb1xx_nor_parts);
adm5120_flash0_data.parts = rb1xx_nor_parts;
/* setup data for NAND device */
adm5120_nand_data.chip.nr_chips = 1;
adm5120_nand_data.chip.nr_partitions = ARRAY_SIZE(rb1xx_nand_parts);
adm5120_nand_data.chip.partitions = rb1xx_nand_parts;
adm5120_nand_data.chip.chip_delay = RB1XX_NAND_CHIP_DELAY;
adm5120_nand_data.chip.options = NAND_NO_AUTOINCR;
adm5120_nand_data.chip.chip_fixup = &rb1xx_nand_fixup;
}
static void __init rb1xx_setup(void)
{
/* enable NAND flash interface */
adm5120_nand_enable();
/* initialize NAND chip */
adm5120_nand_set_spn(1);
adm5120_nand_set_wpn(0);
adm5120_buttons_data.nbuttons = 1;
adm5120_buttons[0].desc = "reset button";
adm5120_buttons[0].gpio = ADM5120_GPIO_PIN7;
rb1xx_flash_setup();
rb1xx_mac_setup();
}
static void __init rb150_setup(void)
{
/* setup GPIO pins for NAND flash chip */
gpio_request(RB150_GPIO_NAND_READY, "nand-ready");
gpio_direction_input(RB150_GPIO_NAND_READY);
gpio_request(RB150_GPIO_NAND_NCE, "nand-nce");
gpio_direction_output(RB150_GPIO_NAND_NCE, 1);
gpio_request(RB150_GPIO_NAND_CLE, "nand-cle");
gpio_direction_output(RB150_GPIO_NAND_CLE, 0);
gpio_request(RB150_GPIO_NAND_ALE, "nand-ale");
gpio_direction_output(RB150_GPIO_NAND_ALE, 0);
adm5120_nand_device.num_resources = ARRAY_SIZE(rb150_nand_resource);
adm5120_nand_device.resource = rb150_nand_resource;
adm5120_nand_data.ctrl.cmd_ctrl = rb150_nand_cmd_ctrl;
adm5120_nand_data.ctrl.dev_ready = rb150_nand_ready;
adm5120_buttons_data.nbuttons = 1;
adm5120_buttons[0].desc = "reset button";
adm5120_buttons[0].gpio = ADM5120_GPIO_PIN1; /* FIXME: valid? */
adm5120_gpiodev_resource.start &= ~RB150_GPIO_DEV_MASK;
adm5120_flash0_data.window_size = 512*1024;
rb1xx_flash_setup();
rb1xx_mac_setup();
}
static void __init rb153_setup(void)
{
/* enable CSX1:INTX1 on GPIO[3:4] for the CF slot */
adm5120_gpio_csx1_enable();
/* enable the wait state pin GPIO[0] for external I/O control */
adm5120_gpio_ew_enable();
rb1xx_setup();
adm5120_gpiodev_resource.start &= ~RB153_GPIO_DEV_MASK;
}
/*--------------------------------------------------------------------------*/
ADM5120_BOARD_START(RB_111, "Mikrotik RouterBOARD 111")
.board_setup = rb1xx_setup,
.eth_num_ports = 1,
.eth_vlans = rb11x_vlans,
.num_devices = ARRAY_SIZE(rb1xx_devices),
.devices = rb1xx_devices,
.pci_nr_irqs = ARRAY_SIZE(rb1xx_pci_irqs),
.pci_irq_map = rb1xx_pci_irqs,
ADM5120_BOARD_END
ADM5120_BOARD_START(RB_112, "Mikrotik RouterBOARD 112")
.board_setup = rb1xx_setup,
.eth_num_ports = 1,
.eth_vlans = rb11x_vlans,
.num_devices = ARRAY_SIZE(rb1xx_devices),
.devices = rb1xx_devices,
.pci_nr_irqs = ARRAY_SIZE(rb1xx_pci_irqs),
.pci_irq_map = rb1xx_pci_irqs,
ADM5120_BOARD_END
ADM5120_BOARD_START(RB_133, "Mikrotik RouterBOARD 133")
.board_setup = rb1xx_setup,
.eth_num_ports = 3,
.eth_vlans = rb133_vlans,
.num_devices = ARRAY_SIZE(rb1xx_devices),
.devices = rb1xx_devices,
.pci_nr_irqs = ARRAY_SIZE(rb1xx_pci_irqs),
.pci_irq_map = rb1xx_pci_irqs,
ADM5120_BOARD_END
ADM5120_BOARD_START(RB_133C, "Mikrotik RouterBOARD 133C")
.board_setup = rb1xx_setup,
.eth_num_ports = 1,
.eth_vlans = rb133c_vlans,
.num_devices = ARRAY_SIZE(rb1xx_devices),
.devices = rb1xx_devices,
.pci_nr_irqs = ARRAY_SIZE(rb1xx_pci_irqs),
.pci_irq_map = rb1xx_pci_irqs,
ADM5120_BOARD_END
ADM5120_BOARD_START(RB_150, "Mikrotik RouterBOARD 150")
.board_setup = rb150_setup,
.eth_num_ports = 5,
.eth_vlans = rb15x_vlans,
.num_devices = ARRAY_SIZE(rb1xx_devices),
.devices = rb1xx_devices,
ADM5120_BOARD_END
ADM5120_BOARD_START(RB_153, "Mikrotik RouterBOARD 153")
.board_setup = rb153_setup,
.eth_num_ports = 5,
.eth_vlans = rb15x_vlans,
.num_devices = ARRAY_SIZE(rb153_devices),
.devices = rb153_devices,
.pci_nr_irqs = ARRAY_SIZE(rb1xx_pci_irqs),
.pci_irq_map = rb1xx_pci_irqs,
ADM5120_BOARD_END
ADM5120_BOARD_START(RB_192, "Mikrotik RouterBOARD 192")
.board_setup = rb1xx_setup,
.eth_num_ports = 5,
.eth_vlans = rb192_vlans,
.num_devices = ARRAY_SIZE(rb1xx_devices),
.devices = rb1xx_devices,
.pci_nr_irqs = ARRAY_SIZE(rb1xx_pci_irqs),
.pci_irq_map = rb1xx_pci_irqs,
ADM5120_BOARD_END

115
target/linux/adm5120/files/arch/mips/adm5120/boards/zyxel.c
View File

@@ -1,115 +0,0 @@
/*
* $Id$
*
* ZyXEL Prestige P-334/P-335 boards
*
* Copyright (C) 2007 OpenWrt.org
* Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/bootinfo.h>
#include <asm/gpio.h>
#include <adm5120_board.h>
#include <adm5120_platform.h>
#include <adm5120_irq.h>
#define P33X_GPIO_DEV_MASK (1 << ADM5120_GPIO_PIN5)
static void switch_bank_gpio5(unsigned bank)
{
switch (bank) {
case 0:
gpio_set_value(ADM5120_GPIO_PIN5, 0);
break;
case 1:
gpio_set_value(ADM5120_GPIO_PIN5, 1);
break;
}
}
static struct adm5120_pci_irq p33x_pci_irqs[] __initdata = {
PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI0),
};
static struct mtd_partition p33x_partitions[] = {
{
.name = "bootbase",
.offset = 0,
.size = 16*1024,
.mask_flags = MTD_WRITEABLE,
} , {
.name = "rom",
.offset = MTDPART_OFS_APPEND,
.size = 16*1024,
} , {
.name = "bootext",
.offset = MTDPART_OFS_APPEND,
.size = 96*1024,
.mask_flags = MTD_WRITEABLE,
} , {
.name = "trx",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
} , {
.name = "firmware",
.offset = 32*1024,
.size = MTDPART_SIZ_FULL,
}
};
static struct platform_device *p334_devices[] __initdata = {
&adm5120_flash0_device,
};
static struct platform_device *p335_devices[] __initdata = {
&adm5120_flash0_device,
&adm5120_hcd_device,
};
static void __init p33x_setup(void)
{
gpio_request(ADM5120_GPIO_PIN5, NULL); /* for flash A20 line */
gpio_direction_output(ADM5120_GPIO_PIN5, 0);
/* setup data for flash0 device */
adm5120_flash0_data.switch_bank = switch_bank_gpio5;
adm5120_flash0_data.nr_parts = ARRAY_SIZE(p33x_partitions);
adm5120_flash0_data.parts = p33x_partitions;
adm5120_gpiodev_resource.start &= ~P33X_GPIO_DEV_MASK;
/* TODO: setup mac address */
}
unsigned char p33x_vlans[6] __initdata = {
/* FIXME: untested */
0x50, 0x48, 0x44, 0x42, 0x41, 0x00
};
ADM5120_BOARD_START(P334WT, "ZyXEL Prestige 334WT")
.board_setup = p33x_setup,
.eth_num_ports = 5,
.eth_vlans = p33x_vlans,
.num_devices = ARRAY_SIZE(p334_devices),
.devices = p334_devices,
.pci_nr_irqs = ARRAY_SIZE(p33x_pci_irqs),
.pci_irq_map = p33x_pci_irqs,
ADM5120_BOARD_END
ADM5120_BOARD_START(P335, "ZyXEL Prestige 335/335WT")
.board_setup = p33x_setup,
.eth_num_ports = 5,
.eth_vlans = p33x_vlans,
.num_devices = ARRAY_SIZE(p335_devices),
.devices = p335_devices,
.pci_nr_irqs = ARRAY_SIZE(p33x_pci_irqs),
.pci_irq_map = p33x_pci_irqs,
ADM5120_BOARD_END

65
target/linux/adm5120/files/arch/mips/adm5120/clock.c
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@@ -1,65 +0,0 @@
/*
* $Id$
*
* ADM5120 minimal CLK API implementation
*
* Copyright (C) 2007 OpenWrt.org
* Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
*
* This file was based on the CLK API implementation in:
* arch/mips/tx4938/toshiba_rbtx4938/setup.c
* Copyright (C) 2000-2001 Toshiba Corporation
* 2003-2005 (c) MontaVista Software, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
*/
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/module.h>
#include <linux/err.h>
#include <linux/clk.h>
#include <adm5120_defs.h>
struct clk {
unsigned long rate;
};
static struct clk uart_clk = {
.rate = ADM5120_UART_CLOCK
};
struct clk *clk_get(struct device *dev, const char *id)
{
if (!strcmp(id, "UARTCLK"))
return &uart_clk;
return ERR_PTR(-ENOENT);
}
EXPORT_SYMBOL(clk_get);
int clk_enable(struct clk *clk)
{
return 0;
}
EXPORT_SYMBOL(clk_enable);
void clk_disable(struct clk *clk)
{
}
EXPORT_SYMBOL(clk_disable);
unsigned long clk_get_rate(struct clk *clk)
{
return clk->rate;
}
EXPORT_SYMBOL(clk_get_rate);
void clk_put(struct clk *clk)
{
}
EXPORT_SYMBOL(clk_put);

375
target/linux/adm5120/files/arch/mips/adm5120/gpio.c
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@@ -1,375 +0,0 @@
/*
* $Id$
*
* ADM5120 GPIO support
*
* Copyright (C) 2007-2008 OpenWrt.org
* Copyright (C) 2007-2008 Gabor Juhos <juhosg at openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
*/
#include <linux/autoconf.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <asm/addrspace.h>
#include <asm/gpio.h>
#include <adm5120_defs.h>
#include <adm5120_info.h>
#include <adm5120_switch.h>
#include <adm5120_irq.h>
#define GPIO_READ(r) __raw_readl((r))
#define GPIO_WRITE(v, r) __raw_writel((v), (r))
#define GPIO_REG(r) (void __iomem *)(KSEG1ADDR(ADM5120_SWITCH_BASE)+r)
struct adm5120_gpio_line {
u32 flags;
const char *label;
int irq;
};
#define GPIO_FLAG_VALID 0x01
#define GPIO_FLAG_USED 0x02
struct led_desc {
void __iomem *reg; /* LED register address */
u8 iv_shift; /* shift amount for input bit */
u8 mode_shift; /* shift amount for mode bits */
};
#define LED_DESC(p, l) { \
.reg = GPIO_REG(SWITCH_REG_PORT0_LED+((p) * 4)), \
.iv_shift = LED0_IV_SHIFT + (l), \
.mode_shift = (l) * 4 \
}
static struct led_desc led_table[15] = {
LED_DESC(0, 0), LED_DESC(0, 1), LED_DESC(0, 2),
LED_DESC(1, 0), LED_DESC(1, 1), LED_DESC(1, 2),
LED_DESC(2, 0), LED_DESC(2, 1), LED_DESC(2, 2),
LED_DESC(3, 0), LED_DESC(3, 1), LED_DESC(3, 2),
LED_DESC(4, 0), LED_DESC(4, 1), LED_DESC(4, 2)
};
static struct adm5120_gpio_line adm5120_gpio_map[ADM5120_GPIO_COUNT];
static u32 gpio_conf2;
/*-------------------------------------------------------------------------*/
static inline int gpio_is_invalid(unsigned gpio)
{
if ((gpio > ADM5120_GPIO_MAX) ||
(adm5120_gpio_map[gpio].flags & GPIO_FLAG_VALID) == 0)
return 1;
return 0;
}
static inline int gpio_is_used(unsigned gpio)
{
return ((adm5120_gpio_map[gpio].flags & GPIO_FLAG_USED) != 0);
}
/*-------------------------------------------------------------------------*/
/*
* Helpers for GPIO lines in GPIO_CONF0 register
*/
#define PIN_IM(p) ((1 << GPIO_CONF0_IM_SHIFT) << p)
#define PIN_IV(p) ((1 << GPIO_CONF0_IV_SHIFT) << p)
#define PIN_OE(p) ((1 << GPIO_CONF0_OE_SHIFT) << p)
#define PIN_OV(p) ((1 << GPIO_CONF0_OV_SHIFT) << p)
static inline int pins_direction_input(unsigned pin)
{
void __iomem **reg;
u32 t;
reg = GPIO_REG(SWITCH_REG_GPIO_CONF0);
t = GPIO_READ(reg);
t &= ~(PIN_OE(pin));
t |= PIN_IM(pin);
GPIO_WRITE(t, reg);
return 0;
}
static inline int pins_direction_output(unsigned pin, int value)
{
void __iomem **reg;
u32 t;
reg = GPIO_REG(SWITCH_REG_GPIO_CONF0);
t = GPIO_READ(reg);
t &= ~(PIN_IM(pin) | PIN_OV(pin));
t |= PIN_OE(pin);
if (value)
t |= PIN_OV(pin);
GPIO_WRITE(t, reg);
return 0;
}
static inline int pins_get_value(unsigned pin)
{
void __iomem **reg;
u32 t;
reg = GPIO_REG(SWITCH_REG_GPIO_CONF0);
t = GPIO_READ(reg);
if ((t & PIN_IM(pin)) != 0)
t &= PIN_IV(pin);
else
t &= PIN_OV(pin);
return (t) ? 1 : 0;
}
static inline void pins_set_value(unsigned pin, int value)
{
void __iomem **reg;
u32 t;
reg = GPIO_REG(SWITCH_REG_GPIO_CONF0);
t = GPIO_READ(reg);
if (value == 0)
t &= ~(PIN_OV(pin));
else
t |= PIN_OV(pin);
GPIO_WRITE(t, reg);
}
/*
* Helpers for GPIO lines in PORTx_LED registers
*/
static inline int leds_direction_input(unsigned led)
{
void __iomem **reg;
u32 t;
reg = led_table[led].reg;
t = GPIO_READ(reg);
t &= ~(LED_MODE_MASK << led_table[led].mode_shift);
GPIO_WRITE(t, reg);
return 0;
}
static inline int leds_direction_output(unsigned led, int value)
{
void __iomem **reg;
u32 t, s;
reg = led_table[led].reg;
s = led_table[led].mode_shift;
t = GPIO_READ(reg);
t &= ~(LED_MODE_MASK << s);
switch (value) {
case ADM5120_GPIO_LOW:
t |= (LED_MODE_OUT_LOW << s);
break;
case ADM5120_GPIO_FLASH:
case ADM5120_GPIO_LINK:
case ADM5120_GPIO_SPEED:
case ADM5120_GPIO_DUPLEX:
case ADM5120_GPIO_ACT:
case ADM5120_GPIO_COLL:
case ADM5120_GPIO_LINK_ACT:
case ADM5120_GPIO_DUPLEX_COLL:
case ADM5120_GPIO_10M_ACT:
case ADM5120_GPIO_100M_ACT:
t |= ((value & LED_MODE_MASK) << s);
break;
default:
t |= (LED_MODE_OUT_HIGH << s);
break;
}
GPIO_WRITE(t, reg);
return 0;
}
static inline int leds_get_value(unsigned led)
{
void __iomem **reg;
u32 t, m;
reg = led_table[led].reg;
t = GPIO_READ(reg);
m = (t >> led_table[led].mode_shift) & LED_MODE_MASK;
if (m == LED_MODE_INPUT)
return (t >> led_table[led].iv_shift) & 1;
if (m == LED_MODE_OUT_LOW)
return 0;
return 1;
}
/*-------------------------------------------------------------------------*/
/*
* Main GPIO support routines
*/
int adm5120_gpio_direction_input(unsigned gpio)
{
if (gpio_is_invalid(gpio))
return -EINVAL;
if (gpio < ADM5120_GPIO_P0L0)
return pins_direction_input(gpio);
gpio -= ADM5120_GPIO_P0L0;
return leds_direction_input(gpio);
}
EXPORT_SYMBOL(adm5120_gpio_direction_input);
int adm5120_gpio_direction_output(unsigned gpio, int value)
{
if (gpio_is_invalid(gpio))
return -EINVAL;
if (gpio < ADM5120_GPIO_P0L0)
return pins_direction_output(gpio, value);
gpio -= ADM5120_GPIO_P0L0;
return leds_direction_output(gpio, value);
}
EXPORT_SYMBOL(adm5120_gpio_direction_output);
int adm5120_gpio_get_value(unsigned gpio)
{
if (gpio < ADM5120_GPIO_P0L0)
return pins_get_value(gpio);
gpio -= ADM5120_GPIO_P0L0;
return leds_get_value(gpio);
}
EXPORT_SYMBOL(adm5120_gpio_get_value);
void adm5120_gpio_set_value(unsigned gpio, int value)
{
if (gpio < ADM5120_GPIO_P0L0) {
pins_set_value(gpio, value);
return;
}
gpio -= ADM5120_GPIO_P0L0;
leds_direction_output(gpio, value);
}
EXPORT_SYMBOL(adm5120_gpio_set_value);
int adm5120_gpio_request(unsigned gpio, const char *label)
{
if (gpio_is_invalid(gpio))
return -EINVAL;
if (gpio_is_used(gpio))
return -EBUSY;
adm5120_gpio_map[gpio].flags |= GPIO_FLAG_USED;
adm5120_gpio_map[gpio].label = label;
return 0;
}
EXPORT_SYMBOL(adm5120_gpio_request);
void adm5120_gpio_free(unsigned gpio)
{
if (gpio_is_invalid(gpio))
return;
adm5120_gpio_map[gpio].flags &= ~GPIO_FLAG_USED;
adm5120_gpio_map[gpio].label = NULL;
}
EXPORT_SYMBOL(adm5120_gpio_free);
int adm5120_gpio_to_irq(unsigned gpio)
{
if (gpio > ADM5120_GPIO_MAX)
return -EINVAL;
return adm5120_gpio_map[gpio].irq;
}
EXPORT_SYMBOL(adm5120_gpio_to_irq);
int adm5120_irq_to_gpio(unsigned irq)
{
int i;
for (i = 0; i < ADM5120_GPIO_COUNT; i++)
if (adm5120_gpio_map[i].irq == irq)
return i;
return -EINVAL;
}
EXPORT_SYMBOL(adm5120_irq_to_gpio);
/*-------------------------------------------------------------------------*/
void __init adm5120_gpio_csx0_enable(void)
{
gpio_conf2 |= GPIO_CONF2_CSX0;
SW_WRITE_REG(SWITCH_REG_GPIO_CONF2, gpio_conf2);
adm5120_gpio_map[ADM5120_GPIO_PIN1].flags &= ~GPIO_FLAG_VALID;
adm5120_gpio_map[ADM5120_GPIO_PIN2].irq = ADM5120_IRQ_GPIO2;
}
void __init adm5120_gpio_csx1_enable(void)
{
gpio_conf2 |= GPIO_CONF2_CSX1;
SW_WRITE_REG(SWITCH_REG_GPIO_CONF2, gpio_conf2);
adm5120_gpio_map[ADM5120_GPIO_PIN3].flags &= ~GPIO_FLAG_VALID;
if (adm5120_package_bga())
adm5120_gpio_map[ADM5120_GPIO_PIN4].irq = ADM5120_IRQ_GPIO4;
}
void __init adm5120_gpio_ew_enable(void)
{
gpio_conf2 |= GPIO_CONF2_EW;
SW_WRITE_REG(SWITCH_REG_GPIO_CONF2, gpio_conf2);
adm5120_gpio_map[ADM5120_GPIO_PIN0].flags &= ~GPIO_FLAG_VALID;
}
void __init adm5120_gpio_init(void)
{
int i;
gpio_conf2 = 0;
SW_WRITE_REG(SWITCH_REG_GPIO_CONF2, gpio_conf2);
for (i = 0; i < ADM5120_GPIO_COUNT; i++)
adm5120_gpio_map[i].flags = GPIO_FLAG_VALID;
if (adm5120_package_pqfp()) {
adm5120_gpio_map[ADM5120_GPIO_PIN4].flags &= ~GPIO_FLAG_VALID;
adm5120_gpio_map[ADM5120_GPIO_PIN5].flags &= ~GPIO_FLAG_VALID;
adm5120_gpio_map[ADM5120_GPIO_PIN6].flags &= ~GPIO_FLAG_VALID;
adm5120_gpio_map[ADM5120_GPIO_PIN7].flags &= ~GPIO_FLAG_VALID;
}
}

181
target/linux/adm5120/files/arch/mips/adm5120/irq.c
View File

@@ -1,181 +0,0 @@
/*
* ADM5120 specific interrupt handlers
*
* Copyright (C) 2007-2008 OpenWrt.org
* Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/version.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/io.h>
#include <asm/irq.h>
#include <asm/irq_cpu.h>
#include <asm/mipsregs.h>
#include <asm/bitops.h>
#include <asm/mach-adm5120/adm5120_defs.h>
#include <asm/mach-adm5120/adm5120_irq.h>
static void adm5120_intc_irq_unmask(unsigned int irq);
static void adm5120_intc_irq_mask(unsigned int irq);
static int adm5120_intc_irq_set_type(unsigned int irq, unsigned int flow_type);
static inline void intc_write_reg(unsigned int reg, u32 val)
{
void __iomem *base = (void __iomem *)KSEG1ADDR(ADM5120_INTC_BASE);
__raw_writel(val, base + reg);
}
static inline u32 intc_read_reg(unsigned int reg)
{
void __iomem *base = (void __iomem *)KSEG1ADDR(ADM5120_INTC_BASE);
return __raw_readl(base + reg);
}
static struct irq_chip adm5120_intc_irq_chip = {
.name = "INTC",
.unmask = adm5120_intc_irq_unmask,
.mask = adm5120_intc_irq_mask,
.mask_ack = adm5120_intc_irq_mask,
.set_type = adm5120_intc_irq_set_type
};
static struct irqaction adm5120_intc_irq_action = {
.handler = no_action,
.name = "cascade [INTC]"
};
static void adm5120_intc_irq_unmask(unsigned int irq)
{
irq -= ADM5120_INTC_IRQ_BASE;
intc_write_reg(INTC_REG_IRQ_ENABLE, 1 << irq);
}
static void adm5120_intc_irq_mask(unsigned int irq)
{
irq -= ADM5120_INTC_IRQ_BASE;
intc_write_reg(INTC_REG_IRQ_DISABLE, 1 << irq);
}
static int adm5120_intc_irq_set_type(unsigned int irq, unsigned int flow_type)
{
unsigned int sense;
unsigned long mode;
int err = 0;
sense = flow_type & (IRQ_TYPE_SENSE_MASK);
switch (sense) {
case IRQ_TYPE_NONE:
case IRQ_TYPE_LEVEL_HIGH:
break;
case IRQ_TYPE_LEVEL_LOW:
switch (irq) {
case ADM5120_IRQ_GPIO2:
case ADM5120_IRQ_GPIO4:
break;
default:
err = -EINVAL;
break;
}
break;
default:
err = -EINVAL;
break;
}
if (err)
return err;
switch (irq) {
case ADM5120_IRQ_GPIO2:
case ADM5120_IRQ_GPIO4:
mode = intc_read_reg(INTC_REG_INT_MODE);
if (sense == IRQ_TYPE_LEVEL_LOW)
mode |= (1 << (irq - ADM5120_INTC_IRQ_BASE));
else
mode &= ~(1 << (irq - ADM5120_INTC_IRQ_BASE));
intc_write_reg(INTC_REG_INT_MODE, mode);
/* fallthrough */
default:
irq_desc[irq].status &= ~IRQ_TYPE_SENSE_MASK;
irq_desc[irq].status |= sense;
break;
}
return 0;
}
static void adm5120_intc_irq_dispatch(void)
{
unsigned long status;
int irq;
/* dispatch only one IRQ at a time */
status = intc_read_reg(INTC_REG_IRQ_STATUS) & INTC_INT_ALL;
if (status) {
irq = ADM5120_INTC_IRQ_BASE + fls(status) - 1;
do_IRQ(irq);
} else
spurious_interrupt();
}
asmlinkage void plat_irq_dispatch(void)
{
unsigned long pending;
pending = read_c0_status() & read_c0_cause() & ST0_IM;
if (pending & STATUSF_IP7)
do_IRQ(ADM5120_IRQ_COUNTER);
else if (pending & STATUSF_IP2)
adm5120_intc_irq_dispatch();
else
spurious_interrupt();
}
#define INTC_IRQ_STATUS (IRQ_LEVEL | IRQ_TYPE_LEVEL_HIGH | IRQ_DISABLED)
static void __init adm5120_intc_irq_init(void)
{
int i;
/* disable all interrupts */
intc_write_reg(INTC_REG_IRQ_DISABLE, INTC_INT_ALL);
/* setup all interrupts to generate IRQ instead of FIQ */
intc_write_reg(INTC_REG_INT_MODE, 0);
/* set active level for all external interrupts to HIGH */
intc_write_reg(INTC_REG_INT_LEVEL, 0);
/* disable usage of the TEST_SOURCE register */
intc_write_reg(INTC_REG_IRQ_SOURCE_SELECT, 0);
for (i = ADM5120_INTC_IRQ_BASE;
i <= ADM5120_INTC_IRQ_BASE + INTC_IRQ_LAST;
i++) {
irq_desc[i].status = INTC_IRQ_STATUS;
set_irq_chip_and_handler(i, &adm5120_intc_irq_chip,
handle_level_irq);
}
setup_irq(ADM5120_IRQ_INTC, &adm5120_intc_irq_action);
}
void __init arch_init_irq(void) {
mips_cpu_irq_init();
adm5120_intc_irq_init();
}

152
target/linux/adm5120/files/arch/mips/adm5120/memory.c
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@@ -1,152 +0,0 @@
/*
* $Id$
*
* Copyright (C) 2007 OpenWrt.org
* Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
*/
#include <linux/init.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/io.h>
#include <asm/bootinfo.h>
#include <asm/addrspace.h>
#include <adm5120_info.h>
#include <adm5120_defs.h>
#include <adm5120_switch.h>
#include <adm5120_mpmc.h>
#ifdef DEBUG
# define mem_dbg(f, a...) printk(KERN_INFO "mem_detect: " f, ## a)
#else
# define mem_dbg(f, a...)
#endif
unsigned long adm5120_memsize;
#define MEM_READL(a) __raw_readl((void __iomem *)(a))
#define MEM_WRITEL(a, v) __raw_writel((v), (void __iomem *)(a))
static int __init mem_check_pattern(u8 *addr, unsigned long offs)
{
u32 *p1 = (u32 *)addr;
u32 *p2 = (u32 *)(addr+offs);
u32 t, u, v;
/* save original value */
t = MEM_READL(p1);
u = MEM_READL(p2);
if (t != u)
return 0;
v = 0x55555555;
if (u == v)
v = 0xAAAAAAAA;
mem_dbg("write 0x%08X to 0x%08lX\n", v, (unsigned long)p1);
MEM_WRITEL(p1, v);
adm5120_ndelay(1000);
u = MEM_READL(p2);
mem_dbg("pattern at 0x%08lX is 0x%08X\n", (unsigned long)p2, u);
/* restore original value */
MEM_WRITEL(p1, t);
return (v == u);
}
static void __init adm5120_detect_memsize(void)
{
u32 memctrl;
u32 size, maxsize;
u8 *p;
memctrl = SW_READ_REG(SWITCH_REG_MEMCTRL);
switch (memctrl & MEMCTRL_SDRS_MASK) {
case MEMCTRL_SDRS_4M:
maxsize = 4 << 20;
break;
case MEMCTRL_SDRS_8M:
maxsize = 8 << 20;
break;
case MEMCTRL_SDRS_16M:
maxsize = 16 << 20;
break;
default:
maxsize = 64 << 20;
break;
}
mem_dbg("checking for %uMB chip in 1st bank\n", maxsize >> 20);
/* detect size of the 1st SDRAM bank */
p = (u8 *)KSEG1ADDR(0);
for (size = 2<<20; size <= (maxsize >> 1); size <<= 1) {
if (mem_check_pattern(p, size)) {
/* mirrored address */
mem_dbg("mirrored data found at offset 0x%08X\n", size);
break;
}
}
mem_dbg("chip size in 1st bank is %uMB\n", size >> 20);
adm5120_memsize = size;
if (size != maxsize)
/* 2nd bank is not supported */
goto out;
if ((memctrl & MEMCTRL_SDR1_ENABLE) == 0)
/* 2nd bank is disabled */
goto out;
/*
* some bootloaders enable 2nd bank, even if the 2nd SDRAM chip
* are missing.
*/
mem_dbg("check presence of 2nd bank\n");
p = (u8 *)KSEG1ADDR(maxsize+size-4);
if (mem_check_pattern(p, 0))
adm5120_memsize += size;
if (maxsize != size) {
/* adjusting MECTRL register */
memctrl &= ~(MEMCTRL_SDRS_MASK);
switch (size>>20) {
case 4:
memctrl |= MEMCTRL_SDRS_4M;
break;
case 8:
memctrl |= MEMCTRL_SDRS_8M;
break;
case 16:
memctrl |= MEMCTRL_SDRS_16M;
break;
default:
memctrl |= MEMCTRL_SDRS_64M;
break;
}
SW_WRITE_REG(SWITCH_REG_MEMCTRL, memctrl);
}
out:
mem_dbg("%dx%uMB memory found\n", (adm5120_memsize == size) ? 1 : 2 ,
size>>20);
}
void __init adm5120_mem_init(void)
{
adm5120_detect_memsize();
add_memory_region(0, adm5120_memsize, BOOT_MEM_RAM);
}

252
target/linux/adm5120/files/arch/mips/adm5120/platform.c
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@@ -1,252 +0,0 @@
/*
* $Id$
*
* Generic ADM5120 platform devices
*
* Copyright (C) 2007-2008 OpenWrt.org
* Copyright (C) 2007-2008 Gabor Juhos <juhosg at openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/device.h>
#include <linux/dma-mapping.h>
#include <linux/platform_device.h>
#include <asm/bootinfo.h>
#include <asm/gpio.h>
#include <adm5120_defs.h>
#include <adm5120_info.h>
#include <adm5120_irq.h>
#include <adm5120_switch.h>
#include <adm5120_nand.h>
#include <adm5120_platform.h>
#if 1
/*
* TODO:remove global adm5120_eth* variables when the switch driver will be
* converted into a real platform driver
*/
unsigned int adm5120_eth_num_ports = 6;
EXPORT_SYMBOL_GPL(adm5120_eth_num_ports);
unsigned char adm5120_eth_macs[6][6] = {
{'\00', 'A', 'D', 'M', '\x51', '\x20' },
{'\00', 'A', 'D', 'M', '\x51', '\x21' },
{'\00', 'A', 'D', 'M', '\x51', '\x22' },
{'\00', 'A', 'D', 'M', '\x51', '\x23' },
{'\00', 'A', 'D', 'M', '\x51', '\x24' },
{'\00', 'A', 'D', 'M', '\x51', '\x25' }
};
EXPORT_SYMBOL_GPL(adm5120_eth_macs);
unsigned char adm5120_eth_vlans[6] = {
0x41, 0x42, 0x44, 0x48, 0x50, 0x60
};
EXPORT_SYMBOL_GPL(adm5120_eth_vlans);
#endif
/* Built-in ethernet switch */
struct resource adm5120_switch_resources[] = {
[0] = {
.start = ADM5120_SWITCH_BASE,
.end = ADM5120_SWITCH_BASE+ADM5120_SWITCH_SIZE-1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = ADM5120_IRQ_SWITCH,
.end = ADM5120_IRQ_SWITCH,
.flags = IORESOURCE_IRQ,
},
};
struct adm5120_switch_platform_data adm5120_switch_data;
struct platform_device adm5120_switch_device = {
.name = "adm5120-switch",
.id = -1,
.num_resources = ARRAY_SIZE(adm5120_switch_resources),
.resource = adm5120_switch_resources,
.dev.platform_data = &adm5120_switch_data,
};
/* USB Host Controller */
struct resource adm5120_hcd_resources[] = {
[0] = {
.start = ADM5120_USBC_BASE,
.end = ADM5120_USBC_BASE+ADM5120_USBC_SIZE-1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = ADM5120_IRQ_USBC,
.end = ADM5120_IRQ_USBC,
.flags = IORESOURCE_IRQ,
},
};
static u64 adm5120_hcd_dma_mask = DMA_BIT_MASK(24);
struct platform_device adm5120_hcd_device = {
.name = "adm5120-hcd",
.id = -1,
.num_resources = ARRAY_SIZE(adm5120_hcd_resources),
.resource = adm5120_hcd_resources,
.dev = {
.dma_mask = &adm5120_hcd_dma_mask,
.coherent_dma_mask = DMA_BIT_MASK(24),
}
};
/* NOR flash 0 */
struct adm5120_flash_platform_data adm5120_flash0_data;
struct platform_device adm5120_flash0_device = {
.name = "adm5120-flash",
.id = 0,
.dev.platform_data = &adm5120_flash0_data,
};
/* NOR flash 1 */
struct adm5120_flash_platform_data adm5120_flash1_data;
struct platform_device adm5120_flash1_device = {
.name = "adm5120-flash",
.id = 1,
.dev.platform_data = &adm5120_flash1_data,
};
/* NAND flash */
struct resource adm5120_nand_resource[] = {
[0] = {
.start = ADM5120_NAND_BASE,
.end = ADM5120_NAND_BASE + ADM5120_NAND_SIZE-1,
.flags = IORESOURCE_MEM,
},
};
struct platform_nand_data adm5120_nand_data = {
.ctrl.dev_ready = adm5120_nand_ready,
.ctrl.cmd_ctrl = adm5120_nand_cmd_ctrl,
};
struct platform_device adm5120_nand_device = {
.name = "gen_nand",
.id = -1,
.num_resources = ARRAY_SIZE(adm5120_nand_resource),
.resource = adm5120_nand_resource,
.dev.platform_data = &adm5120_nand_data,
};
/* built-in UARTs */
struct amba_pl010_data adm5120_uart0_data = {
.set_mctrl = adm5120_uart_set_mctrl
};
struct amba_device adm5120_uart0_device = {
.dev = {
.bus_id = "APB:UART0",
.platform_data = &adm5120_uart0_data,
},
.res = {
.start = ADM5120_UART0_BASE,
.end = ADM5120_UART0_BASE + ADM5120_UART_SIZE - 1,
.flags = IORESOURCE_MEM,
},
.irq = { ADM5120_IRQ_UART0, -1 },
.periphid = 0x0041010,
};
struct amba_pl010_data adm5120_uart1_data = {
.set_mctrl = adm5120_uart_set_mctrl
};
struct amba_device adm5120_uart1_device = {
.dev = {
.bus_id = "APB:UART1",
.platform_data = &adm5120_uart1_data,
},
.res = {
.start = ADM5120_UART1_BASE,
.end = ADM5120_UART1_BASE + ADM5120_UART_SIZE - 1,
.flags = IORESOURCE_MEM,
},
.irq = { ADM5120_IRQ_UART1, -1 },
.periphid = 0x0041010,
};
#define ADM5120_BUTTON_THRESHOLD 5
#define ADM5120_BUTTON_INTERVAL 20
struct gpio_button adm5120_buttons[ADM5120_NUM_BUTTONS] = {
{
.type = EV_KEY,
.code = BTN_0,
.threshold = ADM5120_BUTTON_THRESHOLD,
}, {
.type = EV_KEY,
.code = BTN_1,
.threshold = ADM5120_BUTTON_THRESHOLD,
}, {
.type = EV_KEY,
.code = BTN_2,
.threshold = ADM5120_BUTTON_THRESHOLD,
}, {
.type = EV_KEY,
.code = BTN_3,
.threshold = ADM5120_BUTTON_THRESHOLD,
}, {
.type = EV_KEY,
.code = BTN_4,
.threshold = ADM5120_BUTTON_THRESHOLD,
}
};
struct gpio_buttons_platform_data adm5120_buttons_data = {
.poll_interval = ADM5120_BUTTON_INTERVAL,
.nbuttons = ARRAY_SIZE(adm5120_buttons),
.buttons = adm5120_buttons,
};
struct platform_device adm5120_buttons_device = {
.name = "gpio-buttons",
.id = 0,
.dev.platform_data = &adm5120_buttons_data,
};
/* GPIO char device */
struct resource adm5120_gpiodev_resource = {
.start = 0x3fffff,
};
struct platform_device adm5120_gpiodev_device = {
.name = "GPIODEV",
.id = -1,
.num_resources = 1,
.resource = &adm5120_gpiodev_resource,
};
void adm5120_uart_set_mctrl(struct amba_device *dev, void __iomem *base,
unsigned int mctrl)
{
}
int adm5120_nand_ready(struct mtd_info *mtd)
{
return ((adm5120_nand_get_status() & ADM5120_NAND_STATUS_READY) != 0);
}
void adm5120_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
{
if (ctrl & NAND_CTRL_CHANGE) {
adm5120_nand_set_cle(ctrl & NAND_CLE);
adm5120_nand_set_ale(ctrl & NAND_ALE);
adm5120_nand_set_cen(ctrl & NAND_NCE);
}
if (cmd != NAND_CMD_NONE)
NAND_WRITE_REG(NAND_REG_DATA, cmd);
}

276
target/linux/adm5120/files/arch/mips/adm5120/prom.c
View File

@@ -1,276 +0,0 @@
/*
* $Id$
*
* ADM5120 specific prom routines
*
* Copyright (C) 2007 OpenWrt.org
* Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/io.h>
#include <asm/bootinfo.h>
#include <asm/addrspace.h>
#include <adm5120_info.h>
#include <adm5120_defs.h>
#include <adm5120_uart.h>
#include <prom/cfe.h>
#include <prom/generic.h>
#include <prom/routerboot.h>
#include <prom/myloader.h>
#include <prom/zynos.h>
unsigned int adm5120_prom_type = ADM5120_PROM_GENERIC;
struct board_desc {
unsigned long mach_type;
char *name;
};
#define DEFBOARD(n, mt) { .mach_type = (mt), .name = (n)}
static struct board_desc common_boards[] __initdata = {
/* Cellvision/SparkLAN boards */
DEFBOARD("CAS-630", MACH_ADM5120_CAS630),
DEFBOARD("CAS-670", MACH_ADM5120_CAS670),
DEFBOARD("CAS-700", MACH_ADM5120_CAS700),
DEFBOARD("CAS-771", MACH_ADM5120_CAS771),
DEFBOARD("CAS-790", MACH_ADM5120_CAS790),
DEFBOARD("CAS-861", MACH_ADM5120_CAS861),
DEFBOARD("NFS-101U", MACH_ADM5120_NFS101U),
/* Compex boards */
DEFBOARD("WP54G-WRT", MACH_ADM5120_WP54G_WRT),
/* Edimax boards */
DEFBOARD("BR-6104K", MACH_ADM5120_BR6104K),
DEFBOARD("BR-6104KP", MACH_ADM5120_BR6104K),
DEFBOARD("BR-6104WG", MACH_ADM5120_BR61x4WG),
DEFBOARD("BR-6114WG", MACH_ADM5120_BR61x4WG),
/* Infineon boards */
DEFBOARD("EASY 5120P-ATA", MACH_ADM5120_EASY5120PATA),
DEFBOARD("EASY 5120-RT", MACH_ADM5120_EASY5120RT),
DEFBOARD("EASY 5120-WVoIP", MACH_ADM5120_EASY5120WVOIP),
DEFBOARD("EASY 83000", MACH_ADM5120_EASY83000),
/* Mikrotik RouterBOARDs */
DEFBOARD("111", MACH_ADM5120_RB_111),
DEFBOARD("112", MACH_ADM5120_RB_112),
DEFBOARD("133", MACH_ADM5120_RB_133),
DEFBOARD("133C", MACH_ADM5120_RB_133C),
DEFBOARD("133C3", MACH_ADM5120_RB_133C),
DEFBOARD("150", MACH_ADM5120_RB_153), /* it's intentional */
DEFBOARD("153", MACH_ADM5120_RB_153),
DEFBOARD("192", MACH_ADM5120_RB_192),
DEFBOARD("miniROUTER", MACH_ADM5120_RB_150),
};
static unsigned long __init find_machtype_byname(char *name)
{
unsigned long ret;
int i;
ret = MACH_ADM5120_GENERIC;
if (name == NULL)
goto out;
if (*name == '\0')
goto out;
for (i = 0; i < ARRAY_SIZE(common_boards); i++) {
if (strcmp(common_boards[i].name, name) == 0) {
ret = common_boards[i].mach_type;
break;
}
}
out:
return ret;
}
static unsigned long __init detect_machtype_routerboot(void)
{
char *name;
name = routerboot_get_boardname();
return find_machtype_byname(name);
}
static unsigned long __init detect_machtype_generic(void)
{
char *name;
name = generic_prom_getenv("board_name");
return find_machtype_byname(name);
}
unsigned long __init detect_machtype_cfe(void)
{
char *name;
name = cfe_getenv("BOARD_NAME");
return find_machtype_byname(name);
}
static struct {
unsigned long mach_type;
u16 vendor_id;
u16 board_id;
} zynos_boards[] __initdata = {
#define ZYNOS_BOARD(vi, bi, mt) \
{.vendor_id = (vi), .board_id = (bi), .mach_type = (mt)}
#define ZYXEL_BOARD(bi, mt) ZYNOS_BOARD(ZYNOS_VENDOR_ID_ZYXEL, bi, mt)
#define DLINK_BOARD(bi, mt) ZYNOS_BOARD(ZYNOS_VENDOR_ID_DLINK, bi, mt)
#define LUCENT_BOARD(bi, mt) ZYNOS_BOARD(ZYNOS_VENDOR_ID_LUCENT, bi, mt)
ZYXEL_BOARD(ZYNOS_BOARD_HS100, MACH_ADM5120_HS100),
ZYXEL_BOARD(ZYNOS_BOARD_P334, MACH_ADM5120_P334),
ZYXEL_BOARD(ZYNOS_BOARD_P334U, MACH_ADM5120_P334U),
ZYXEL_BOARD(ZYNOS_BOARD_P334W, MACH_ADM5120_P334W),
ZYXEL_BOARD(ZYNOS_BOARD_P334WH, MACH_ADM5120_P334WH),
ZYXEL_BOARD(ZYNOS_BOARD_P334WHD, MACH_ADM5120_P334WHD),
ZYXEL_BOARD(ZYNOS_BOARD_P334WT, MACH_ADM5120_P334WT),
ZYXEL_BOARD(ZYNOS_BOARD_P334WT_ALT, MACH_ADM5120_P334WT),
ZYXEL_BOARD(ZYNOS_BOARD_P335, MACH_ADM5120_P335),
ZYXEL_BOARD(ZYNOS_BOARD_P335PLUS, MACH_ADM5120_P335PLUS),
ZYXEL_BOARD(ZYNOS_BOARD_P335U, MACH_ADM5120_P335U)
};
static unsigned long __init detect_machtype_bootbase(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(zynos_boards); i++) {
if (zynos_boards[i].vendor_id == bootbase_info.vendor_id &&
zynos_boards[i].board_id == bootbase_info.board_id) {
return zynos_boards[i].mach_type;
break;
}
}
printk(KERN_WARNING "Unknown ZyXEL model (%u)\n",
bootbase_info.board_id);
return MACH_ADM5120_GENERIC;
}
static struct {
unsigned long mach_type;
u16 vid;
u16 did;
u16 svid;
u16 sdid;
} mylo_boards[] __initdata = {
#define MYLO_BOARD(v, d, sv, sd, mt) \
{.vid = (v), .did = (d), .svid = (sv), .sdid = (sd), .mach_type = (mt)}
#define COMPEX_BOARD(d, mt) \
MYLO_BOARD(VENID_COMPEX, (d), VENID_COMPEX, (d), (mt))
COMPEX_BOARD(DEVID_COMPEX_NP27G, MACH_ADM5120_NP27G),
COMPEX_BOARD(DEVID_COMPEX_NP28G, MACH_ADM5120_NP28G),
COMPEX_BOARD(DEVID_COMPEX_NP28GHS, MACH_ADM5120_NP28GHS),
COMPEX_BOARD(DEVID_COMPEX_WP54G, MACH_ADM5120_WP54G),
COMPEX_BOARD(DEVID_COMPEX_WP54Gv1C, MACH_ADM5120_WP54Gv1C),
COMPEX_BOARD(DEVID_COMPEX_WP54AG, MACH_ADM5120_WP54AG),
COMPEX_BOARD(DEVID_COMPEX_WPP54G, MACH_ADM5120_WPP54G),
COMPEX_BOARD(DEVID_COMPEX_WPP54AG, MACH_ADM5120_WPP54AG),
};
static unsigned long __init detect_machtype_myloader(void)
{
unsigned long ret;
int i;
ret = MACH_ADM5120_GENERIC;
for (i = 0; i < ARRAY_SIZE(mylo_boards); i++) {
if (mylo_boards[i].vid == myloader_info.vid &&
mylo_boards[i].did == myloader_info.did &&
mylo_boards[i].svid == myloader_info.svid &&
mylo_boards[i].sdid == myloader_info.sdid) {
ret = mylo_boards[i].mach_type;
break;
}
}
return ret;
}
static void __init prom_detect_machtype(void)
{
if (bootbase_present()) {
adm5120_prom_type = ADM5120_PROM_BOOTBASE;
mips_machtype = detect_machtype_bootbase();
return;
}
if (cfe_present()) {
adm5120_prom_type = ADM5120_PROM_CFE;
mips_machtype = detect_machtype_cfe();
return;
}
if (myloader_present()) {
adm5120_prom_type = ADM5120_PROM_MYLOADER;
mips_machtype = detect_machtype_myloader();
return;
}
if (routerboot_present()) {
adm5120_prom_type = ADM5120_PROM_ROUTERBOOT;
mips_machtype = detect_machtype_routerboot();
return;
}
if (generic_prom_present()) {
adm5120_prom_type = ADM5120_PROM_GENERIC;
mips_machtype = detect_machtype_generic();
return;
}
mips_machtype = MACH_ADM5120_GENERIC;
}
/* TODO: this is an ugly hack for RouterBOARDS */
extern char _image_cmdline;
static void __init prom_init_cmdline(void)
{
char *cmd;
/* init command line, register a default kernel command line */
cmd = &_image_cmdline + 8;
if (strlen(cmd) > 0)
strcpy(arcs_cmdline, cmd);
else
strcpy(arcs_cmdline, CONFIG_CMDLINE);
}
#define UART_READ(r) \
__raw_readl((void __iomem *)(KSEG1ADDR(ADM5120_UART0_BASE)+(r)))
#define UART_WRITE(r, v) \
__raw_writel((v), (void __iomem *)(KSEG1ADDR(ADM5120_UART0_BASE)+(r)))
void __init prom_putchar(char ch)
{
while ((UART_READ(UART_REG_FLAG) & UART_FLAG_TXFE) == 0);
UART_WRITE(UART_REG_DATA, ch);
while ((UART_READ(UART_REG_FLAG) & UART_FLAG_TXFE) == 0);
}
void __init prom_init(void)
{
prom_detect_machtype();
prom_init_cmdline();
}
void __init prom_free_prom_memory(void)
{
/* We do not have to prom memory to free */
}

9
target/linux/adm5120/files/arch/mips/adm5120/prom/Makefile
View File

@@ -1,9 +0,0 @@
#
# Makefile for the ADMtek ADM5120 SoC specific parts of the kernel
#
lib-y += bootbase.o
lib-y += cfe.o
lib-y += generic.o
lib-y += myloader.o
lib-y += routerboot.o

114
target/linux/adm5120/files/arch/mips/adm5120/prom/bootbase.c
View File

@@ -1,114 +0,0 @@
/*
* $Id$
*
* ZyXEL's Bootbase specific prom routines
*
* Copyright (C) 2007 OpenWrt.org
* Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
*/
#include <linux/types.h>
#include <linux/autoconf.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/string.h>
#include <asm/bootinfo.h>
#include <asm/addrspace.h>
#include <asm/byteorder.h>
#include <adm5120_defs.h>
#include <prom/zynos.h>
#include "prom_read.h"
#define ZYNOS_INFO_ADDR KSEG1ADDR(ADM5120_SRAM0_BASE+0x3F90)
#define ZYNOS_HDBG_ADDR KSEG1ADDR(ADM5120_SRAM0_BASE+0x4000)
#define BOOTEXT_ADDR_MIN KSEG1ADDR(ADM5120_SRAM0_BASE)
#define BOOTEXT_ADDR_MAX (BOOTEXT_ADDR_MIN + (2*1024*1024))
static int bootbase_found;
static struct zynos_board_info *board_info;
struct bootbase_info bootbase_info;
static inline int bootbase_dbgarea_present(u8 *data)
{
u32 t;
t = prom_read_be32(data+5);
if (t != ZYNOS_MAGIC_DBGAREA1)
return 0;
t = prom_read_be32(data+9);
if (t != ZYNOS_MAGIC_DBGAREA2)
return 0;
return 1;
}
static inline u32 bootbase_get_bootext_addr(void)
{
return prom_read_be32(&board_info->bootext_addr);
}
static inline u16 bootbase_get_vendor_id(void)
{
#define CHECK_VENDOR(n) (strnicmp(board_info->vendor, (n), strlen(n)) == 0)
unsigned char vendor[ZYNOS_NAME_LEN];
int i;
for (i = 0; i < ZYNOS_NAME_LEN; i++)
vendor[i] = board_info->vendor[i];
if CHECK_VENDOR(ZYNOS_VENDOR_ZYXEL)
return ZYNOS_VENDOR_ID_ZYXEL;
if CHECK_VENDOR(ZYNOS_VENDOR_DLINK)
return ZYNOS_VENDOR_ID_DLINK;
if CHECK_VENDOR(ZYNOS_VENDOR_LUCENT)
return ZYNOS_VENDOR_ID_LUCENT;
if CHECK_VENDOR(ZYNOS_VENDOR_NETGEAR)
return ZYNOS_VENDOR_ID_NETGEAR;
return ZYNOS_VENDOR_ID_OTHER;
}
static inline u16 bootbase_get_board_id(void)
{
return prom_read_be16(&board_info->board_id);
}
int __init bootbase_present(void)
{
u32 t;
if (bootbase_found)
goto out;
/* check presence of the dbgarea */
if (bootbase_dbgarea_present((u8 *)ZYNOS_HDBG_ADDR) == 0)
goto out;
board_info = (struct zynos_board_info *)(ZYNOS_INFO_ADDR);
/* check for a valid BootExt address */
t = bootbase_get_bootext_addr();
if ((t < BOOTEXT_ADDR_MIN) || (t > BOOTEXT_ADDR_MAX))
goto out;
bootbase_info.vendor_id = bootbase_get_vendor_id();
bootbase_info.board_id = bootbase_get_board_id();
bootbase_found = 1;
out:
return bootbase_found;
}

72
target/linux/adm5120/files/arch/mips/adm5120/prom/cfe.c
View File

@@ -1,72 +0,0 @@
/*
* $Id$
*
* Broadcom's CFE specific prom routines
*
* Copyright (C) 2007 OpenWrt.org
* Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
*/
#include <linux/types.h>
#include <linux/init.h>
#include <asm/bootinfo.h>
#include <asm/addrspace.h>
#include <prom/cfe.h>
#include "prom_read.h"
/*
* CFE based boards
*/
#define CFE_EPTSEAL 0x43464531 /* CFE1 is the magic number to recognize CFE
from other bootloaders */
static int cfe_found;
static u32 cfe_handle;
static u32 cfe_entry;
static u32 cfe_seal;
int __init cfe_present(void)
{
/*
* This method only works, when we are booted directly from the CFE.
*/
u32 a1 = (u32) fw_arg1;
if (cfe_found)
return 1;
cfe_handle = (u32) fw_arg0;
cfe_entry = (u32) fw_arg2;
cfe_seal = (u32) fw_arg3;
/* Check for CFE by finding the CFE magic number */
if (cfe_seal != CFE_EPTSEAL)
return 0;
/* cfe_a1_val must be 0, because only one CPU present in the ADM5120 */
if (a1 != 0)
return 0;
/* The cfe_handle, and the cfe_entry must be kernel mode addresses */
if ((cfe_handle < KSEG0) || (cfe_entry < KSEG0))
return 0;
cfe_found = 1;
return 1;
}
char *cfe_getenv(char *envname)
{
if (cfe_found == 0)
return NULL;
return NULL;
}

50
target/linux/adm5120/files/arch/mips/adm5120/prom/generic.c
View File

@@ -1,50 +0,0 @@
/*
* $Id$
*
* Generic PROM routines
*
* Copyright (C) 2007 OpenWrt.org
* Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/string.h>
#include <asm/bootinfo.h>
#include <prom/generic.h>
static int *_prom_argc;
static char **_prom_argv;
static char **_prom_envp;
char *generic_prom_getenv(char *envname)
{
char **env;
char *ret;
ret = NULL;
for (env = _prom_envp; *env != NULL; env++) {
if (strcmp(envname, *env++) == 0) {
ret = *env;
break;
}
}
return ret;
}
int generic_prom_present(void)
{
_prom_argc = (int *)fw_arg0;
_prom_argv = (char **)fw_arg1;
_prom_envp = (char **)fw_arg2;
return 1;
}

65
target/linux/adm5120/files/arch/mips/adm5120/prom/myloader.c
View File

@@ -1,65 +0,0 @@
/*
* $Id$
*
* Compex's MyLoader specific prom routines
*
* Copyright (C) 2007 OpenWrt.org
* Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
*/
#include <linux/types.h>
#include <linux/autoconf.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/string.h>
#include <asm/bootinfo.h>
#include <asm/addrspace.h>
#include <asm/byteorder.h>
#include <adm5120_defs.h>
#include <prom/myloader.h>
#include "prom_read.h"
#define SYS_PARAMS_ADDR KSEG1ADDR(ADM5120_SRAM0_BASE+0x0F000)
#define BOARD_PARAMS_ADDR KSEG1ADDR(ADM5120_SRAM0_BASE+0x0F800)
#define PART_TABLE_ADDR KSEG1ADDR(ADM5120_SRAM0_BASE+0x10000)
static int myloader_found;
struct myloader_info myloader_info;
int __init myloader_present(void)
{
struct mylo_system_params *sysp;
struct mylo_board_params *boardp;
struct mylo_partition_table *parts;
if (myloader_found)
goto out;
sysp = (struct mylo_system_params *)(SYS_PARAMS_ADDR);
boardp = (struct mylo_board_params *)(BOARD_PARAMS_ADDR);
parts = (struct mylo_partition_table *)(PART_TABLE_ADDR);
/* Check for some magic numbers */
if ((le32_to_cpu(sysp->magic) != MYLO_MAGIC_SYS_PARAMS) ||
(le32_to_cpu(boardp->magic) != MYLO_MAGIC_BOARD_PARAMS) ||
(le32_to_cpu(parts->magic) != MYLO_MAGIC_PARTITIONS))
goto out;
myloader_info.vid = le32_to_cpu(sysp->vid);
myloader_info.did = le32_to_cpu(sysp->did);
myloader_info.svid = le32_to_cpu(sysp->svid);
myloader_info.sdid = le32_to_cpu(sysp->sdid);
myloader_found = 1;
out:
return myloader_found;
}

53
target/linux/adm5120/files/arch/mips/adm5120/prom/prom_read.h
View File

@@ -1,53 +0,0 @@
/*
* $Id$
*
* Generic prom definitions
*
* Copyright (C) 2007 OpenWrt.org
* Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
*/
#ifndef _ADM5120_PROM_H_
#define _ADM5120_PROM_H_
/*
* Helper routines
*/
static inline u16 prom_read_le16(void *buf)
{
u8 *p = buf;
return ((u16)p[0] + ((u16)p[1] << 8));
}
static inline u32 prom_read_le32(void *buf)
{
u8 *p = buf;
return ((u32)p[0] + ((u32)p[1] << 8) + ((u32)p[2] << 16) +
((u32)p[3] << 24));
}
static inline u16 prom_read_be16(void *buf)
{
u8 *p = buf;
return (((u16)p[0] << 8) + (u16)p[1]);
}
static inline u32 prom_read_be32(void *buf)
{
u8 *p = buf;
return (((u32)p[0] << 24) + ((u32)p[1] << 16) + ((u32)p[2] << 8) +
((u32)p[3]));
}
#endif /* _ADM5120_PROM_H_ */

124
target/linux/adm5120/files/arch/mips/adm5120/prom/routerboot.c
View File

@@ -1,124 +0,0 @@
/*
* $Id$
*
* Mikrotik's RouterBOOT specific prom routines
*
* Copyright (C) 2007 OpenWrt.org
* Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
*/
#include <linux/types.h>
#include <linux/autoconf.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/string.h>
#include <linux/module.h>
#include <asm/bootinfo.h>
#include <asm/addrspace.h>
#include <adm5120_defs.h>
#include <prom/routerboot.h>
#include "prom_read.h"
struct rb_hard_settings rb_hs;
static int rb_found;
static int __init routerboot_load_hs(u8 *buf, u16 buflen)
{
u16 id, len;
memset(&rb_hs, 0, sizeof(rb_hs));
if (buflen < 4)
return -1;
if (prom_read_le32(buf) != RB_MAGIC_HARD)
return -1;
/* skip magic value */
buf += 4;
buflen -= 4;
while (buflen > 2) {
id = prom_read_le16(buf);
buf += 2;
buflen -= 2;
if (id == RB_ID_TERMINATOR || buflen < 2)
break;
len = prom_read_le16(buf);
buf += 2;
buflen -= 2;
if (buflen < len)
break;
switch (id) {
case RB_ID_BIOS_VERSION:
rb_hs.bios_ver = (char *)buf;
break;
case RB_ID_BOARD_NAME:
rb_hs.name = (char *)buf;
break;
case RB_ID_MEMORY_SIZE:
rb_hs.mem_size = prom_read_le32(buf);
break;
case RB_ID_MAC_ADDRESS_COUNT:
rb_hs.mac_count = prom_read_le32(buf);
break;
case RB_ID_MAC_ADDRESS_PACK:
if ((len / RB_MAC_SIZE) > 0)
rb_hs.mac_base = buf;
break;
}
buf += len;
buflen -= len;
}
return 0;
}
#define RB_BS_OFFS 0x14
#define RB_OFFS_MAX (128*1024)
int __init routerboot_present(void)
{
struct rb_bios_settings *bs;
u8 *base;
u32 off, len;
if (rb_found)
goto out;
base = (u8 *)KSEG1ADDR(ADM5120_SRAM0_BASE);
bs = (struct rb_bios_settings *)(base + RB_BS_OFFS);
off = prom_read_le32(&bs->hs_offs);
len = prom_read_le32(&bs->hs_size);
if (off > RB_OFFS_MAX)
goto out;
if (routerboot_load_hs(base+off, len) != 0)
goto out;
rb_found = 1;
out:
return rb_found;
}
char *routerboot_get_boardname(void)
{
if (rb_found == 0)
return NULL;
return rb_hs.name;
}

56
target/linux/adm5120/files/arch/mips/adm5120/reset.c
View File

@@ -1,56 +0,0 @@
/*
* $Id$
*
* ADM5120 specific reset routines
*
* Copyright (C) 2007 OpenWrt.org
* Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
*
* This code was based on the ADM5120 specific port of the Linux 2.6.10 kernel
* done by Jeroen Vreeken
* Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org)
*
* Jeroen's code was based on the Linux 2.4.xx source codes found in various
* tarballs released by Edimax for it's ADM5120 based devices.
* Copyright (C) ADMtek Incorporated
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
*/
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <asm/addrspace.h>
#include <adm5120_info.h>
#include <adm5120_defs.h>
#include <adm5120_switch.h>
void (*adm5120_board_reset)(void);
void adm5120_restart(char *command)
{
/* TODO: stop switch before reset */
if (adm5120_board_reset)
adm5120_board_reset();
SW_WRITE_REG(SWITCH_REG_SOFT_RESET, 1);
}
void adm5120_halt(void)
{
local_irq_disable();
while (1) {
if (cpu_wait)
cpu_wait();
};
}

67
target/linux/adm5120/files/arch/mips/adm5120/setup.c
View File

@@ -1,67 +0,0 @@
/*
* $Id$
*
* ADM5120 specific setup
*
* Copyright (C) 2007 OpenWrt.org
* Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
*
* This code was based on the ADM5120 specific port of the Linux 2.6.10 kernel
* done by Jeroen Vreeken
* Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org)
*
* Jeroen's code was based on the Linux 2.4.xx source codes found in various
* tarballs released by Edimax for it's ADM5120 based devices
* Copyright (C) ADMtek Incorporated
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/io.h>
#include <asm/reboot.h>
#include <asm/time.h>
#include <adm5120_info.h>
#include <adm5120_defs.h>
#include <adm5120_switch.h>
#include <adm5120_board.h>
static char *prom_names[ADM5120_PROM_LAST+1] __initdata = {
[ADM5120_PROM_GENERIC] = "Generic",
[ADM5120_PROM_CFE] = "CFE",
[ADM5120_PROM_UBOOT] = "U-Boot",
[ADM5120_PROM_MYLOADER] = "MyLoader",
[ADM5120_PROM_ROUTERBOOT] = "RouterBOOT",
[ADM5120_PROM_BOOTBASE] = "Bootbase"
};
static void __init adm5120_report(void)
{
printk(KERN_INFO "SoC : ADM%04X%s revision %d, running "
"at %ldMHz\n",
adm5120_product_code,
adm5120_package_bga() ? "" : "P",
adm5120_revision, (adm5120_speed / 1000000));
printk(KERN_INFO "Bootdev : %s flash\n",
adm5120_nand_boot ? "NAND":"NOR");
printk(KERN_INFO "Prom : %s\n", prom_names[adm5120_prom_type]);
}
void __init plat_mem_setup(void)
{
adm5120_soc_init();
adm5120_mem_init();
adm5120_report();
_machine_restart = adm5120_restart;
_machine_halt = adm5120_halt;
pm_power_off = adm5120_halt;
set_io_port_base(KSEG1);
}

35
target/linux/adm5120/files/arch/mips/adm5120/time.c
View File

@@ -1,35 +0,0 @@
/*
* $Id$
*
* ADM5120 specific hooks for MIPS CPU Counter/Compare timer
*
* Copyright (C) 2007 OpenWrt.org
* Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
*
* This file was based on: arch/mips/gt64120/wrppmc/time.c
* Original author: Mark.Zhan
* Copyright (C) 1996, 1997, 2004 by Ralf Baechle
* Copyright (C) 2006, Wind River System Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
*/
#include <linux/types.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/timex.h>
#include <asm/irq.h>
#include <asm/cpu.h>
#include <asm/time.h>
#include <adm5120_info.h>
#include <adm5120_irq.h>
void __init plat_time_init(void)
{
mips_hpt_frequency = adm5120_speed / 2;
}

284
target/linux/adm5120/files/arch/mips/pci/pci-adm5120.c
View File

@@ -1,284 +0,0 @@
/*
* $Id$
*
* ADM5120 PCI Host Controller driver
*
* Copyright (C) 2007 OpenWrt.org
* Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
*
* This code was based on the ADM5120 specific port of the Linux 2.6.10 kernel
* done by Jeroen Vreeken
* Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org)
*
* Jeroen's code was based on the Linux 2.4.xx source codes found in various
* tarballs released by Edimax for it's ADM5120 based devices
* Copyright (C) ADMtek Incorporated
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
*/
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/spinlock.h>
#include <linux/io.h>
#include <linux/pci.h>
#include <linux/pci_ids.h>
#include <linux/pci_regs.h>
#include <asm/delay.h>
#include <asm/bootinfo.h>
#include <adm5120_defs.h>
#include <adm5120_info.h>
#include <adm5120_defs.h>
#include <adm5120_platform.h>
#undef DEBUG
#ifdef DEBUG
#define DBG(f, a...) printk(KERN_DEBUG f, ## a)
#else
#define DBG(f, a...) do {} while (0)
#endif
#define PCI_ENABLE 0x80000000
/* -------------------------------------------------------------------------*/
static unsigned int adm5120_pci_nr_irqs __initdata;
static struct adm5120_pci_irq *adm5120_pci_irq_map __initdata;
static spinlock_t pci_lock = SPIN_LOCK_UNLOCKED;
/* -------------------------------------------------------------------------*/
static inline void write_cfgaddr(u32 addr)
{
__raw_writel((addr | PCI_ENABLE),
(void __iomem *)(KSEG1ADDR(ADM5120_PCICFG_ADDR)));
}
static inline void write_cfgdata(u32 data)
{
__raw_writel(data, (void __iomem *)KSEG1ADDR(ADM5120_PCICFG_DATA));
}
static inline u32 read_cfgdata(void)
{
return __raw_readl((void __iomem *)KSEG1ADDR(ADM5120_PCICFG_DATA));
}
static inline u32 mkaddr(struct pci_bus *bus, unsigned int devfn, int where)
{
return (((bus->number & 0xFF) << 16) | ((devfn & 0xFF) << 8) | \
(where & 0xFC));
}
/* -------------------------------------------------------------------------*/
static int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where,
int size, u32 *val)
{
unsigned long flags;
u32 data;
spin_lock_irqsave(&pci_lock, flags);
write_cfgaddr(mkaddr(bus, devfn, where));
data = read_cfgdata();
DBG("PCI: cfg_read %02u.%02u.%01u/%02X:%01d, cfg:0x%08X",
bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn),
where, size, data);
switch (size) {
case 1:
if (where & 1)
data >>= 8;
if (where & 2)
data >>= 16;
data &= 0xFF;
break;
case 2:
if (where & 2)
data >>= 16;
data &= 0xFFFF;
break;
}
*val = data;
DBG(", 0x%08X returned\n", data);
spin_unlock_irqrestore(&pci_lock, flags);
return PCIBIOS_SUCCESSFUL;
}
static int pci_config_write(struct pci_bus *bus, unsigned int devfn, int where,
int size, u32 val)
{
unsigned long flags;
u32 data;
int s;
spin_lock_irqsave(&pci_lock, flags);
write_cfgaddr(mkaddr(bus, devfn, where));
data = read_cfgdata();
DBG("PCI: cfg_write %02u.%02u.%01u/%02X:%01d, cfg:0x%08X",
bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn),
where, size, data);
switch (size) {
case 1:
s = ((where & 3) << 3);
data &= ~(0xFF << s);
data |= ((val & 0xFF) << s);
break;
case 2:
s = ((where & 2) << 4);
data &= ~(0xFFFF << s);
data |= ((val & 0xFFFF) << s);
break;
case 4:
data = val;
break;
}
write_cfgdata(data);
DBG(", 0x%08X written\n", data);
spin_unlock_irqrestore(&pci_lock, flags);
return PCIBIOS_SUCCESSFUL;
}
struct pci_ops adm5120_pci_ops = {
.read = pci_config_read,
.write = pci_config_write,
};
/* -------------------------------------------------------------------------*/
static void adm5120_pci_fixup(struct pci_dev *dev)
{
if (dev->devfn != 0)
return;
/* setup COMMAND register */
pci_write_config_word(dev, PCI_COMMAND,
(PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER));
/* setup CACHE_LINE_SIZE register */
pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 4);
/* setup BARS */
pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0);
pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, 0);
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ADMTEK, PCI_DEVICE_ID_ADMTEK_ADM5120,
adm5120_pci_fixup);
/* -------------------------------------------------------------------------*/
void __init adm5120_pci_set_irq_map(unsigned int nr_irqs,
struct adm5120_pci_irq *map)
{
adm5120_pci_nr_irqs = nr_irqs;
adm5120_pci_irq_map = map;
}
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
int irq = -1;
int i;
if ((!adm5120_pci_nr_irqs) || (!adm5120_pci_irq_map)) {
printk(KERN_ALERT "PCI: pci_irq_map is not initialized\n");
goto out;
}
if (slot < 1 || slot > 3) {
printk(KERN_ALERT "PCI: slot number %u is not supported\n",
slot);
goto out;
}
for (i = 0; i < adm5120_pci_nr_irqs; i++) {
if ((adm5120_pci_irq_map[i].slot == slot)
&& (adm5120_pci_irq_map[i].func == PCI_FUNC(dev->devfn))
&& (adm5120_pci_irq_map[i].pin == pin)) {
irq = adm5120_pci_irq_map[i].irq;
break;
}
}
if (irq < 0) {
printk(KERN_ALERT "PCI: no irq found for %s pin:%u\n",
pci_name((struct pci_dev *)dev), pin);
} else {
printk(KERN_INFO "PCI: mapping irq for %s pin:%u, irq:%d\n",
pci_name((struct pci_dev *)dev), pin, irq);
}
out:
return irq;
}
int pcibios_plat_dev_init(struct pci_dev *dev)
{
return 0;
}
/* -------------------------------------------------------------------------*/
static struct resource pci_io_resource = {
.name = "ADM5120 PCI I/O",
.start = ADM5120_PCIIO_BASE,
.end = ADM5120_PCICFG_ADDR-1,
.flags = IORESOURCE_IO
};
static struct resource pci_mem_resource = {
.name = "ADM5120 PCI MEM",
.start = ADM5120_PCIMEM_BASE,
.end = ADM5120_PCIIO_BASE-1,
.flags = IORESOURCE_MEM
};
static struct pci_controller adm5120_controller = {
.pci_ops = &adm5120_pci_ops,
.io_resource = &pci_io_resource,
.mem_resource = &pci_mem_resource,
};
static int __init adm5120_pci_setup(void)
{
int pci_bios;
pci_bios = adm5120_has_pci();
printk(KERN_INFO "adm5120: system has %sPCI BIOS\n",
pci_bios ? "" : "no ");
if (pci_bios == 0)
return -1;
/* Avoid ISA compat ranges. */
PCIBIOS_MIN_IO = 0x00000000;
PCIBIOS_MIN_MEM = 0x00000000;
/* Set I/O resource limits. */
ioport_resource.end = 0x1fffffff;
iomem_resource.end = 0xffffffff;
register_pci_controller(&adm5120_controller);
return 0;
}
arch_initcall(adm5120_pci_setup);