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mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2025-04-21 12:27:27 +03:00

rename cavium-octeon to octeon

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@16292 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
kaloz
2009-06-02 09:18:55 +00:00
parent 62f2fee052
commit b6db7329f4
22 changed files with 1 additions and 1 deletions

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@@ -0,0 +1,43 @@
This is an incomplete proof of concept that I applied to be able to
build a 64 bit kernel with GCC-4.4. It doesn't handle the 32 bit case
or the R4000_WAR case.
Comments welcome.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
---
arch/mips/include/asm/compiler.h | 7 +++++++
arch/mips/include/asm/delay.h | 4 ++++
2 files changed, 11 insertions(+), 0 deletions(-)
--- a/arch/mips/include/asm/compiler.h
+++ b/arch/mips/include/asm/compiler.h
@@ -16,4 +16,11 @@
#define GCC_REG_ACCUM "accum"
#endif
+#if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 4)
+#define GCC_NO_H_CONSTRAINT
+#ifdef CONFIG_64BIT
+typedef unsigned int uint128_t __attribute__((mode(TI)));
+#endif
+#endif
+
#endif /* _ASM_COMPILER_H */
--- a/arch/mips/include/asm/delay.h
+++ b/arch/mips/include/asm/delay.h
@@ -83,10 +83,14 @@ static inline void __udelay(unsigned lon
: "r" (usecs), "r" (lpj)
: GCC_REG_ACCUM);
else if (sizeof(long) == 8 && !R4000_WAR)
+#ifdef GCC_NO_H_CONSTRAINT
+ usecs = ((uint128_t)usecs * lpj) >> 64;
+#else
__asm__("dmultu\t%2, %3"
: "=h" (usecs), "=l" (lo)
: "r" (usecs), "r" (lpj)
: GCC_REG_ACCUM);
+#endif
else if (sizeof(long) == 8 && R4000_WAR)
__asm__("dmultu\t%3, %4\n\tmfhi\t%0"
: "=r" (usecs), "=h" (hi), "=l" (lo)

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@@ -0,0 +1,223 @@
The MGMT ethernet driver uses these new functions.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
---
arch/mips/cavium-octeon/executive/cvmx-bootmem.c | 101 ++++++++++++++++++++++
arch/mips/include/asm/octeon/cvmx-bootmem.h | 85 ++++++++++++++++++
2 files changed, 186 insertions(+), 0 deletions(-)
--- a/arch/mips/cavium-octeon/executive/cvmx-bootmem.c
+++ b/arch/mips/cavium-octeon/executive/cvmx-bootmem.c
@@ -97,6 +97,32 @@ void *cvmx_bootmem_alloc(uint64_t size,
return cvmx_bootmem_alloc_range(size, alignment, 0, 0);
}
+void *cvmx_bootmem_alloc_named_range(uint64_t size, uint64_t min_addr,
+ uint64_t max_addr, uint64_t align,
+ char *name)
+{
+ int64_t addr;
+
+ addr = cvmx_bootmem_phy_named_block_alloc(size, min_addr, max_addr,
+ align, name, 0);
+ if (addr >= 0)
+ return cvmx_phys_to_ptr(addr);
+ else
+ return NULL;
+}
+
+void *cvmx_bootmem_alloc_named_address(uint64_t size, uint64_t address,
+ char *name)
+{
+ return cvmx_bootmem_alloc_named_range(size, address, address + size,
+ 0, name);
+}
+
+void *cvmx_bootmem_alloc_named(uint64_t size, uint64_t alignment, char *name)
+{
+ return cvmx_bootmem_alloc_named_range(size, 0, 0, alignment, name);
+}
+
int cvmx_bootmem_free_named(char *name)
{
return cvmx_bootmem_phy_named_block_free(name, 0);
@@ -584,3 +610,78 @@ int cvmx_bootmem_phy_named_block_free(ch
cvmx_bootmem_unlock();
return named_block_ptr != NULL; /* 0 on failure, 1 on success */
}
+
+int64_t cvmx_bootmem_phy_named_block_alloc(uint64_t size, uint64_t min_addr,
+ uint64_t max_addr,
+ uint64_t alignment,
+ char *name,
+ uint32_t flags)
+{
+ int64_t addr_allocated;
+ struct cvmx_bootmem_named_block_desc *named_block_desc_ptr;
+
+#ifdef DEBUG
+ cvmx_dprintf("cvmx_bootmem_phy_named_block_alloc: size: 0x%llx, min: "
+ "0x%llx, max: 0x%llx, align: 0x%llx, name: %s\n",
+ (unsigned long long)size,
+ (unsigned long long)min_addr,
+ (unsigned long long)max_addr,
+ (unsigned long long)alignment,
+ name);
+#endif
+ if (cvmx_bootmem_desc->major_version != 3) {
+ cvmx_dprintf("ERROR: Incompatible bootmem descriptor version: "
+ "%d.%d at addr: %p\n",
+ (int)cvmx_bootmem_desc->major_version,
+ (int)cvmx_bootmem_desc->minor_version,
+ cvmx_bootmem_desc);
+ return -1;
+ }
+
+ /*
+ * Take lock here, as name lookup/block alloc/name add need to
+ * be atomic.
+ */
+ if (!(flags & CVMX_BOOTMEM_FLAG_NO_LOCKING))
+ cvmx_spinlock_lock((cvmx_spinlock_t *)&(cvmx_bootmem_desc->lock));
+
+ /* Get pointer to first available named block descriptor */
+ named_block_desc_ptr =
+ cvmx_bootmem_phy_named_block_find(NULL,
+ flags | CVMX_BOOTMEM_FLAG_NO_LOCKING);
+
+ /*
+ * Check to see if name already in use, return error if name
+ * not available or no more room for blocks.
+ */
+ if (cvmx_bootmem_phy_named_block_find(name,
+ flags | CVMX_BOOTMEM_FLAG_NO_LOCKING) || !named_block_desc_ptr) {
+ if (!(flags & CVMX_BOOTMEM_FLAG_NO_LOCKING))
+ cvmx_spinlock_unlock((cvmx_spinlock_t *)&(cvmx_bootmem_desc->lock));
+ return -1;
+ }
+
+
+ /*
+ * Round size up to mult of minimum alignment bytes We need
+ * the actual size allocated to allow for blocks to be
+ * coallesced when they are freed. The alloc routine does the
+ * same rounding up on all allocations.
+ */
+ size = __ALIGN_MASK(size, (CVMX_BOOTMEM_ALIGNMENT_SIZE - 1));
+
+ addr_allocated = cvmx_bootmem_phy_alloc(size, min_addr, max_addr,
+ alignment,
+ flags | CVMX_BOOTMEM_FLAG_NO_LOCKING);
+ if (addr_allocated >= 0) {
+ named_block_desc_ptr->base_addr = addr_allocated;
+ named_block_desc_ptr->size = size;
+ strncpy(named_block_desc_ptr->name, name,
+ cvmx_bootmem_desc->named_block_name_len);
+ named_block_desc_ptr->name[cvmx_bootmem_desc->named_block_name_len - 1] = 0;
+ }
+
+ if (!(flags & CVMX_BOOTMEM_FLAG_NO_LOCKING))
+ cvmx_spinlock_unlock((cvmx_spinlock_t *)&(cvmx_bootmem_desc->lock));
+ return addr_allocated;
+}
--- a/arch/mips/include/asm/octeon/cvmx-bootmem.h
+++ b/arch/mips/include/asm/octeon/cvmx-bootmem.h
@@ -183,6 +183,64 @@ extern void *cvmx_bootmem_alloc_range(ui
* Returns 0 on failure,
* !0 on success
*/
+
+
+/**
+ * Allocate a block of memory from the free list that was passed
+ * to the application by the bootloader, and assign it a name in the
+ * global named block table. (part of the cvmx_bootmem_descriptor_t structure)
+ * Named blocks can later be freed.
+ *
+ * @size: Size in bytes of block to allocate
+ * @alignment: Alignment required - must be power of 2
+ * @name: name of block - must be less than CVMX_BOOTMEM_NAME_LEN bytes
+ *
+ * Returns a pointer to block of memory, NULL on error
+ */
+extern void *cvmx_bootmem_alloc_named(uint64_t size, uint64_t alignment,
+ char *name);
+
+
+
+/**
+ * Allocate a block of memory from the free list that was passed
+ * to the application by the bootloader, and assign it a name in the
+ * global named block table. (part of the cvmx_bootmem_descriptor_t structure)
+ * Named blocks can later be freed.
+ *
+ * @size: Size in bytes of block to allocate
+ * @address: Physical address to allocate memory at. If this
+ * memory is not available, the allocation fails.
+ * @name: name of block - must be less than CVMX_BOOTMEM_NAME_LEN
+ * bytes
+ *
+ * Returns a pointer to block of memory, NULL on error
+ */
+extern void *cvmx_bootmem_alloc_named_address(uint64_t size, uint64_t address,
+ char *name);
+
+
+
+/**
+ * Allocate a block of memory from a specific range of the free list
+ * that was passed to the application by the bootloader, and assign it
+ * a name in the global named block table. (part of the
+ * cvmx_bootmem_descriptor_t structure) Named blocks can later be
+ * freed. If request cannot be satisfied within the address range
+ * specified, NULL is returned
+ *
+ * @size: Size in bytes of block to allocate
+ * @min_addr: minimum address of range
+ * @max_addr: maximum address of range
+ * @align: Alignment of memory to be allocated. (must be a power of 2)
+ * @name: name of block - must be less than CVMX_BOOTMEM_NAME_LEN bytes
+ *
+ * Returns a pointer to block of memory, NULL on error
+ */
+extern void *cvmx_bootmem_alloc_named_range(uint64_t size, uint64_t min_addr,
+ uint64_t max_addr, uint64_t align,
+ char *name);
+
extern int cvmx_bootmem_free_named(char *name);
/**
@@ -224,6 +282,33 @@ int64_t cvmx_bootmem_phy_alloc(uint64_t
uint32_t flags);
/**
+ * Allocates a named block of physical memory from the free list, at
+ * (optional) requested address and alignment.
+ *
+ * @param size size of region to allocate. All requests are rounded
+ * up to be a multiple CVMX_BOOTMEM_ALIGNMENT_SIZE
+ * bytes size
+ * @param min_addr Minimum address that block can occupy.
+ * @param max_addr Specifies the maximum address_min (inclusive) that
+ * the allocation can use.
+ * @param alignment Requested alignment of the block. If this
+ * alignment cannot be met, the allocation fails.
+ * This must be a power of 2. (Note: Alignment of
+ * CVMX_BOOTMEM_ALIGNMENT_SIZE bytes is required, and
+ * internally enforced. Requested alignments of less
+ * than CVMX_BOOTMEM_ALIGNMENT_SIZE are set to
+ * CVMX_BOOTMEM_ALIGNMENT_SIZE.)
+ * @param name name to assign to named block
+ * @param flags Flags to control options for the allocation.
+ *
+ * @return physical address of block allocated, or -1 on failure
+ */
+int64_t cvmx_bootmem_phy_named_block_alloc(uint64_t size, uint64_t min_addr,
+ uint64_t max_addr,
+ uint64_t alignment,
+ char *name, uint32_t flags);
+
+/**
* Finds a named memory block by name.
* Also used for finding an unused entry in the named block table.
*

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@@ -0,0 +1,23 @@
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
---
arch/mips/cavium-octeon/executive/cvmx-sysinfo.c | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
--- a/arch/mips/cavium-octeon/executive/cvmx-sysinfo.c
+++ b/arch/mips/cavium-octeon/executive/cvmx-sysinfo.c
@@ -29,6 +29,7 @@
* This module provides system/board/application information obtained
* by the bootloader.
*/
+#include <linux/module.h>
#include <asm/octeon/cvmx.h>
#include <asm/octeon/cvmx-spinlock.h>
@@ -69,6 +70,7 @@ struct cvmx_sysinfo *cvmx_sysinfo_get(vo
{
return &(state.sysinfo);
}
+EXPORT_SYMBOL(cvmx_sysinfo_get);
/**
* This function is used in non-simple executive environments (such as

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@@ -0,0 +1,37 @@
The bootloader now uses additional board type constants. The
octeon-ethernet driver needs some of the new values.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
---
arch/mips/include/asm/octeon/cvmx-bootinfo.h | 13 +++++++++++++
1 files changed, 13 insertions(+), 0 deletions(-)
--- a/arch/mips/include/asm/octeon/cvmx-bootinfo.h
+++ b/arch/mips/include/asm/octeon/cvmx-bootinfo.h
@@ -157,6 +157,13 @@ enum cvmx_board_types_enum {
CVMX_BOARD_TYPE_NIC_XLE_4G = 21,
CVMX_BOARD_TYPE_EBT5600 = 22,
CVMX_BOARD_TYPE_EBH5201 = 23,
+ CVMX_BOARD_TYPE_EBT5200 = 24,
+ CVMX_BOARD_TYPE_CB5600 = 25,
+ CVMX_BOARD_TYPE_CB5601 = 26,
+ CVMX_BOARD_TYPE_CB5200 = 27,
+ /* Special 'generic' board type, supports many boards */
+ CVMX_BOARD_TYPE_GENERIC = 28,
+ CVMX_BOARD_TYPE_EBH5610 = 29,
CVMX_BOARD_TYPE_MAX,
/*
@@ -228,6 +235,12 @@ static inline const char *cvmx_board_typ
ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC_XLE_4G)
ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBT5600)
ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5201)
+ ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBT5200)
+ ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CB5600)
+ ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CB5601)
+ ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CB5200)
+ ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_GENERIC)
+ ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5610)
ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MAX)
/* Customer boards listed here */

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@@ -0,0 +1,51 @@
The octeon-ethernet driver needs to check for additional chip specific
features, we add them to the octeon_has_feature() framework.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
---
arch/mips/include/asm/octeon/octeon-feature.h | 27 +++++++++++++++++++++++++
1 files changed, 27 insertions(+), 0 deletions(-)
--- a/arch/mips/include/asm/octeon/octeon-feature.h
+++ b/arch/mips/include/asm/octeon/octeon-feature.h
@@ -57,6 +57,13 @@ enum octeon_feature {
OCTEON_FEATURE_RAID,
/* Octeon has a builtin USB */
OCTEON_FEATURE_USB,
+ /* Octeon IPD can run without using work queue entries */
+ OCTEON_FEATURE_NO_WPTR,
+ /* Octeon has DFA state machines */
+ OCTEON_FEATURE_DFA,
+ /* Octeon MDIO block supports clause 45 transactions for 10
+ * Gig support */
+ OCTEON_FEATURE_MDIO_CLAUSE_45,
};
static inline int cvmx_fuse_read(int fuse);
@@ -112,6 +119,26 @@ static inline int octeon_has_feature(enu
case OCTEON_FEATURE_USB:
return !(OCTEON_IS_MODEL(OCTEON_CN38XX)
|| OCTEON_IS_MODEL(OCTEON_CN58XX));
+ case OCTEON_FEATURE_NO_WPTR:
+ return (OCTEON_IS_MODEL(OCTEON_CN56XX)
+ || OCTEON_IS_MODEL(OCTEON_CN52XX))
+ && !OCTEON_IS_MODEL(OCTEON_CN56XX_PASS1_X)
+ && !OCTEON_IS_MODEL(OCTEON_CN52XX_PASS1_X);
+ case OCTEON_FEATURE_DFA:
+ if (!OCTEON_IS_MODEL(OCTEON_CN38XX)
+ && !OCTEON_IS_MODEL(OCTEON_CN31XX)
+ && !OCTEON_IS_MODEL(OCTEON_CN58XX))
+ return 0;
+ else if (OCTEON_IS_MODEL(OCTEON_CN3020))
+ return 0;
+ else if (OCTEON_IS_MODEL(OCTEON_CN38XX_PASS1))
+ return 1;
+ else
+ return !cvmx_fuse_read(120);
+ case OCTEON_FEATURE_MDIO_CLAUSE_45:
+ return !(OCTEON_IS_MODEL(OCTEON_CN3XXX)
+ || OCTEON_IS_MODEL(OCTEON_CN58XX)
+ || OCTEON_IS_MODEL(OCTEON_CN50XX));
}
return 0;
}

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@@ -0,0 +1,21 @@
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
---
.../cavium-octeon/executive/cvmx-helper-errata.c | 3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
--- a/arch/mips/cavium-octeon/executive/cvmx-helper-errata.c
+++ b/arch/mips/cavium-octeon/executive/cvmx-helper-errata.c
@@ -33,6 +33,8 @@
* these functions directly.
*
*/
+#include <linux/module.h>
+
#include <asm/octeon/octeon.h>
#include <asm/octeon/cvmx-helper-util.h>
@@ -377,3 +379,4 @@ void __cvmx_helper_errata_qlm_disable_2n
}
cvmx_helper_qlm_jtag_update(qlm);
}
+EXPORT_SYMBOL(__cvmx_helper_errata_qlm_disable_2nd_order_cdr);

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@@ -0,0 +1,26 @@
The previous patch adds the driver files for octeon-ethernet. Here we
hook them up into the main kernel build system.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
---
drivers/staging/Kconfig | 2 ++
drivers/staging/Makefile | 1 +
2 files changed, 3 insertions(+), 0 deletions(-)
--- a/drivers/staging/Kconfig
+++ b/drivers/staging/Kconfig
@@ -115,5 +115,7 @@ source "drivers/staging/line6/Kconfig"
source "drivers/staging/serqt_usb/Kconfig"
+source "drivers/staging/octeon/Kconfig"
+
endif # !STAGING_EXCLUDE_BUILD
endif # STAGING
--- a/drivers/staging/Makefile
+++ b/drivers/staging/Makefile
@@ -40,3 +40,4 @@ obj-$(CONFIG_PLAN9AUTH) += p9auth/
obj-$(CONFIG_HECI) += heci/
obj-$(CONFIG_LINE6_USB) += line6/
obj-$(CONFIG_USB_SERIAL_QUATECH_ESU100) += serqt_usb/
+obj-$(CONFIG_OCTEON_ETHERNET) += octeon/

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@@ -0,0 +1,85 @@
--- a/arch/mips/cavium-octeon/executive/cvmx-helper-errata.c
+++ b/arch/mips/cavium-octeon/executive/cvmx-helper-errata.c
@@ -272,6 +272,7 @@ fix_ipd_exit:
*
* Returns Zero on success, negative on failure
*/
+#if 0
int __cvmx_helper_errata_asx_pass1(int interface, int port, int cpu_clock_hz)
{
/* Set hi water mark as per errata GMX-4 */
@@ -289,6 +290,7 @@ int __cvmx_helper_errata_asx_pass1(int i
cpu_clock_hz);
return 0;
}
+#endif
/**
* This function needs to be called on all Octeon chips with
--- a/arch/mips/include/asm/octeon/cvmx-helper-errata.h
+++ b/arch/mips/include/asm/octeon/cvmx-helper-errata.h
@@ -60,8 +60,8 @@ extern int __cvmx_helper_errata_fix_ipd_
*
* Returns Zero on success, negative on failure
*/
-extern int __cvmx_helper_errata_asx_pass1(int interface, int port,
- int cpu_clock_hz);
+//extern int __cvmx_helper_errata_asx_pass1(int interface, int port,
+// int cpu_clock_hz);
/**
* This function needs to be called on all Octeon chips with
--- a/arch/mips/cavium-octeon/executive/cvmx-helper-util.c
+++ b/arch/mips/cavium-octeon/executive/cvmx-helper-util.c
@@ -356,6 +356,7 @@ int cvmx_helper_get_ipd_port(int interfa
*
* Returns Interface number
*/
+#if 0
int cvmx_helper_get_interface_num(int ipd_port)
{
if (ipd_port < 16)
@@ -372,6 +373,7 @@ int cvmx_helper_get_interface_num(int ip
return -1;
}
+#endif
/**
* Returns the interface index number for an IPD/PKO port
@@ -381,6 +383,7 @@ int cvmx_helper_get_interface_num(int ip
*
* Returns Interface index number
*/
+#if 0
int cvmx_helper_get_interface_index_num(int ipd_port)
{
if (ipd_port < 32)
@@ -395,6 +398,7 @@ int cvmx_helper_get_interface_index_num(
return -1;
}
+#endif
/**
* Initialize the internal QLM JTAG logic to allow programming
--- a/arch/mips/include/asm/octeon/cvmx-helper-util.h
+++ b/arch/mips/include/asm/octeon/cvmx-helper-util.h
@@ -205,7 +205,7 @@ static inline void cvmx_helper_free_pack
*
* Returns Interface number
*/
-extern int cvmx_helper_get_interface_num(int ipd_port);
+//extern int cvmx_helper_get_interface_num(int ipd_port);
/**
* Returns the interface index number for an IPD/PKO port
@@ -215,7 +215,7 @@ extern int cvmx_helper_get_interface_num
*
* Returns Interface index number
*/
-extern int cvmx_helper_get_interface_index_num(int ipd_port);
+//extern int cvmx_helper_get_interface_index_num(int ipd_port);
/**
* Initialize the internal QLM JTAG logic to allow programming

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@@ -0,0 +1,8 @@
--- a/arch/mips/cavium-octeon/Makefile
+++ b/arch/mips/cavium-octeon/Makefile
@@ -18,5 +18,3 @@ obj-$(CONFIG_PCI) +=
obj-$(CONFIG_PCI) += pci.o
obj-$(CONFIG_PCI) += pcie.o
obj-$(CONFIG_PCI_MSI) += msi.o
-
-EXTRA_CFLAGS += -Werror