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[lantiq]

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* fixes arv4510 board support
* fixes nor swizzle hack
* fixes gpio .can_sleep
* fixes compile warning inside pci driver


git-svn-id: svn://svn.openwrt.org/openwrt/trunk@26157 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
blogic
2011-03-14 07:33:23 +00:00
parent 11bbdea2f4
commit b88e8fef05
6 changed files with 68 additions and 68 deletions
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48
target/linux/lantiq/patches/400-mach-arv45xx.patch
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@@ -38,7 +38,7 @@
+obj-$(CONFIG_LANTIQ_MACH_ARV45XX) += mach-arv45xx.o
--- /dev/null
+++ b/arch/mips/lantiq/xway/mach-arv45xx.c
@@ -0,0 +1,504 @@
@@ -0,0 +1,536 @@
+/*
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
@@ -69,22 +69,46 @@
+#include "dev-dwc_otg.h"
+
+#ifdef CONFIG_MTD_PARTITIONS
+static struct mtd_partition arv4510_partitions[] =
+{
+ {
+ .name = "uboot",
+ .offset = 0x0,
+ .size = 0x20000,
+ },
+ {
+ .name = "uboot_env",
+ .offset = 0x20000,
+ .size = 0x120000,
+ },
+ {
+ .name = "linux",
+ .offset = 0x40000,
+ .size = 0xfa0000,
+ },
+ {
+ .name = "board_config",
+ .offset = 0xfe0000,
+ .size = 0x20000,
+ },
+};
+
+static struct mtd_partition arv45xx_partitions[] =
+{
+ {
+ .name = "uboot",
+ .offset = 0x0,
+ .size = 0x10000,
+ .size = 0x20000,
+ },
+ {
+ .name = "uboot_env",
+ .offset = 0x10000,
+ .offset = 0x20000,
+ .size = 0x10000,
+ },
+ {
+ .name = "linux",
+ .offset = 0x20000,
+ .size = 0x3d0000,
+ .offset = 0x30000,
+ .size = 0x3c0000,
+ },
+ {
+ .name = "board_config",
@@ -119,6 +143,13 @@
+
+#endif
+
+static struct physmap_flash_data arv4510_flash_data = {
+#ifdef CONFIG_MTD_PARTITIONS
+ .nr_parts = ARRAY_SIZE(arv4510_partitions),
+ .parts = arv4510_partitions,
+#endif
+};
+
+static struct physmap_flash_data arv45xx_flash_data = {
+#ifdef CONFIG_MTD_PARTITIONS
+ .nr_parts = ARRAY_SIZE(arv45xx_partitions),
@@ -354,9 +385,10 @@
+ lq_register_gpio_leds(arv4510pw_leds_gpio, ARRAY_SIZE(arv4510pw_leds_gpio));
+ lq_register_asc(0);
+ lq_register_asc(1);
+ lq_register_nor(&arv45xx_flash_data);
+ lq_pci_data.irq[15] = (INT_NUM_IM2_IRL0 + 31);
+ lq_pci_data.gpio |= PCI_EXIN1 | PCI_REQ2;
+ lq_register_nor(&arv4510_flash_data);
+ lq_pci_data.irq[12] = (INT_NUM_IM2_IRL0 + 31);
+ lq_pci_data.irq[15] = (INT_NUM_IM0_IRL0 + 26);
+ lq_pci_data.gpio |= PCI_EXIN2 | PCI_REQ2;
+ lq_register_pci(&lq_pci_data);
+ lq_register_wdt();
+ bewan_register_ethernet();