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ramips: modify {read,write}_config helpers
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@18141 3c298f89-4303-0410-b956-a3cf2f4a3e73
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@ -146,29 +146,28 @@ static struct pci_controller rt2880_pci_controller = {
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.io_resource = &rt2880_pci_mem_resource,
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.io_resource = &rt2880_pci_mem_resource,
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};
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};
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static inline void read_config(unsigned long bus, unsigned long dev,
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static inline u32 rt2880_pci_read_u32(unsigned long reg)
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unsigned long func, unsigned long reg,
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unsigned long *val)
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{
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{
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unsigned long address;
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unsigned long flags;
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unsigned long flags;
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u32 address;
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u32 ret;
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address = rt2880_pci_get_cfgaddr(bus, dev, func, reg);
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address = rt2880_pci_get_cfgaddr(0, 0, 0, reg);
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spin_lock_irqsave(&rt2880_pci_lock, flags);
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spin_lock_irqsave(&rt2880_pci_lock, flags);
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rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
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rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
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*val = rt2880_pci_reg_read(RT2880_PCI_REG_CONFIG_DATA);
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ret = rt2880_pci_reg_read(RT2880_PCI_REG_CONFIG_DATA);
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spin_unlock_irqrestore(&rt2880_pci_lock, flags);
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spin_unlock_irqrestore(&rt2880_pci_lock, flags);
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return ret;
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}
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}
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static inline void write_config(unsigned long bus, unsigned long dev,
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static inline void rt2880_pci_write_u32(unsigned long reg, u32 val)
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unsigned long func, unsigned long reg,
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unsigned long val)
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{
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{
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unsigned long address;
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unsigned long flags;
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unsigned long flags;
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u32 address;
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address = rt2880_pci_get_cfgaddr(bus, dev, func, reg);
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address = rt2880_pci_get_cfgaddr(0, 0, 0, reg);
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spin_lock_irqsave(&rt2880_pci_lock, flags);
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spin_lock_irqsave(&rt2880_pci_lock, flags);
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rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
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rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
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@ -179,7 +178,6 @@ static inline void write_config(unsigned long bus, unsigned long dev,
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int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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{
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{
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u16 cmd;
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u16 cmd;
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unsigned long val;
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int irq = -1;
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int irq = -1;
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if (dev->bus->number != 0)
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if (dev->bus->number != 0)
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@ -187,8 +185,8 @@ int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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switch (PCI_SLOT(dev->devfn)) {
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switch (PCI_SLOT(dev->devfn)) {
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case 0x00:
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case 0x00:
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write_config(0, 0, 0, PCI_BASE_ADDRESS_0, 0x08000000);
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rt2880_pci_write_u32(PCI_BASE_ADDRESS_0, 0x08000000);
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read_config(0, 0, 0, PCI_BASE_ADDRESS_0, &val);
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(void) rt2880_pci_read_u32(PCI_BASE_ADDRESS_0);
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break;
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break;
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case 0x11:
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case 0x11:
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irq = RT288X_CPU_IRQ_PCI;
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irq = RT288X_CPU_IRQ_PCI;
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@ -214,7 +212,6 @@ int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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static int __init rt2880_pci_init(void)
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static int __init rt2880_pci_init(void)
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{
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{
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unsigned long val = 0;
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int i;
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int i;
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rt2880_pci_base = ioremap_nocache(RT2880_PCI_BASE, PAGE_SIZE);
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rt2880_pci_base = ioremap_nocache(RT2880_PCI_BASE, PAGE_SIZE);
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@ -231,8 +228,9 @@ static int __init rt2880_pci_init(void)
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rt2880_pci_reg_write(0x00800001, RT2880_PCI_REG_CLASS);
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rt2880_pci_reg_write(0x00800001, RT2880_PCI_REG_CLASS);
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rt2880_pci_reg_write(0x28801814, RT2880_PCI_REG_SUBID);
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rt2880_pci_reg_write(0x28801814, RT2880_PCI_REG_SUBID);
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rt2880_pci_reg_write(0x000c0000, RT2880_PCI_REG_PCIMSK_ADDR);
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rt2880_pci_reg_write(0x000c0000, RT2880_PCI_REG_PCIMSK_ADDR);
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write_config(0, 0, 0, PCI_BASE_ADDRESS_0, 0x08000000);
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read_config(0, 0, 0, PCI_BASE_ADDRESS_0, &val);
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rt2880_pci_write_u32(PCI_BASE_ADDRESS_0, 0x08000000);
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(void) rt2880_pci_read_u32(PCI_BASE_ADDRESS_0);
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register_pci_controller(&rt2880_pci_controller);
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register_pci_controller(&rt2880_pci_controller);
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return 0;
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return 0;
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