From c38952766918cb10a48c24c64e3ef5e3fc07680f Mon Sep 17 00:00:00 2001 From: Xiangfu Liu Date: Tue, 26 Apr 2011 11:16:09 +0800 Subject: [PATCH] [xburst] Improve mounttime This patchset optimizes nand read access and reduces the ubi attach time by ~2/3 Credits go to dvdk for having the idea. --- ...e-vid-header-instead-of-the-whole-pa.patch | 11 ++ ...-Optimize-NAND_ECC_HW_OOB_FIRST-read.patch | 30 ++++ ...-for-subpage-reads-for-NAND_ECC_HW_O.patch | 133 ++++++++++++++++++ ...ading-the-eec-data-for-the-JZ4740-ev.patch | 44 ++++++ 4 files changed, 218 insertions(+) create mode 100644 target/linux/xburst/patches-2.6.37/901-ubi-Read-only-the-vid-header-instead-of-the-whole-pa.patch create mode 100644 target/linux/xburst/patches-2.6.37/902-NAND-Optimize-NAND_ECC_HW_OOB_FIRST-read.patch create mode 100644 target/linux/xburst/patches-2.6.37/903-NAND-Add-support-for-subpage-reads-for-NAND_ECC_HW_O.patch create mode 100644 target/linux/xburst/patches-2.6.37/904-NAND-Optimize-reading-the-eec-data-for-the-JZ4740-ev.patch diff --git a/target/linux/xburst/patches-2.6.37/901-ubi-Read-only-the-vid-header-instead-of-the-whole-pa.patch b/target/linux/xburst/patches-2.6.37/901-ubi-Read-only-the-vid-header-instead-of-the-whole-pa.patch new file mode 100644 index 000000000..a13476ee9 --- /dev/null +++ b/target/linux/xburst/patches-2.6.37/901-ubi-Read-only-the-vid-header-instead-of-the-whole-pa.patch @@ -0,0 +1,11 @@ +--- a/drivers/mtd/ubi/io.c ++++ b/drivers/mtd/ubi/io.c +@@ -995,7 +995,7 @@ int ubi_io_read_vid_hdr(struct ubi_devic + + p = (char *)vid_hdr - ubi->vid_hdr_shift; + read_err = ubi_io_read(ubi, p, pnum, ubi->vid_hdr_aloffset, +- ubi->vid_hdr_alsize); ++ UBI_VID_HDR_SIZE + ubi->vid_hdr_shift); + if (read_err && read_err != UBI_IO_BITFLIPS && read_err != -EBADMSG) + return read_err; + diff --git a/target/linux/xburst/patches-2.6.37/902-NAND-Optimize-NAND_ECC_HW_OOB_FIRST-read.patch b/target/linux/xburst/patches-2.6.37/902-NAND-Optimize-NAND_ECC_HW_OOB_FIRST-read.patch new file mode 100644 index 000000000..b852e6fcb --- /dev/null +++ b/target/linux/xburst/patches-2.6.37/902-NAND-Optimize-NAND_ECC_HW_OOB_FIRST-read.patch @@ -0,0 +1,30 @@ +--- a/drivers/mtd/nand/nand_base.c ++++ b/drivers/mtd/nand/nand_base.c +@@ -1313,9 +1313,15 @@ static int nand_read_page_hwecc_oob_firs + uint8_t *ecc_calc = chip->buffers->ecccalc; + + /* Read the OOB area first */ +- chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page); +- chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); +- chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page); ++ if (mtd->writesize > 512) { ++ chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page); ++ chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); ++ chip->cmdfunc(mtd, NAND_CMD_RNDOUT, 0, -1); ++ } else { ++ chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page); ++ chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); ++ chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page); ++ } + + for (i = 0; i < chip->ecc.total; i++) + ecc_code[i] = chip->oob_poi[eccpos[i]]; +@@ -1485,7 +1491,7 @@ static int nand_do_read_ops(struct mtd_i + if (realpage != chip->pagebuf || oob) { + bufpoi = aligned ? buf : chip->buffers->databuf; + +- if (likely(sndcmd)) { ++ if (likely(sndcmd) && chip->ecc.mode != NAND_ECC_HW_OOB_FIRST) { + chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page); + sndcmd = 0; + } diff --git a/target/linux/xburst/patches-2.6.37/903-NAND-Add-support-for-subpage-reads-for-NAND_ECC_HW_O.patch b/target/linux/xburst/patches-2.6.37/903-NAND-Add-support-for-subpage-reads-for-NAND_ECC_HW_O.patch new file mode 100644 index 000000000..9041f3bfe --- /dev/null +++ b/target/linux/xburst/patches-2.6.37/903-NAND-Add-support-for-subpage-reads-for-NAND_ECC_HW_O.patch @@ -0,0 +1,133 @@ +--- a/drivers/mtd/nand/nand_base.c ++++ b/drivers/mtd/nand/nand_base.c +@@ -1164,7 +1164,7 @@ static int nand_read_page_swecc(struct m + * @bufpoi: buffer to store read data + */ + static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip, +- uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi) ++ uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi, int page) + { + int start_step, end_step, num_steps; + uint32_t *eccpos = chip->ecc.layout->eccpos; +@@ -1342,6 +1342,75 @@ static int nand_read_page_hwecc_oob_firs + return 0; + } + ++ /** ++ * nand_read_subpage_hwecc_oob_first - [REPLACABLE] hw ecc based sub-page read function ++ * @mtd: mtd info structure ++ * @chip: nand chip info structure ++ * @data_offs: offset of requested data within the page ++ * @readlen: data length ++ * @bufpoi: buffer to store read data ++ * @page: page number to read ++ * ++ * Hardware ECC for large page chips, require OOB to be read first. ++ * For this ECC mode, the write_page method is re-used from ECC_HW. ++ * These methods read/write ECC from the OOB area, unlike the ++ * ECC_HW_SYNDROME support with multiple ECC steps, follows the ++ * "infix ECC" scheme and reads/writes ECC from the data area, by ++ * overwriting the NAND manufacturer bad block markings. ++ */ ++static int nand_read_subpage_hwecc_oob_first(struct mtd_info *mtd, struct nand_chip *chip, ++ uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi, int page) ++{ ++ int start_step, end_step, num_steps; ++ uint32_t *eccpos = chip->ecc.layout->eccpos; ++ uint8_t *p; ++ int data_col_addr; ++ int eccsize = chip->ecc.size; ++ int eccbytes = chip->ecc.bytes; ++ uint8_t *ecc_code = chip->buffers->ecccode; ++ uint8_t *ecc_calc = chip->buffers->ecccalc; ++ int i; ++ ++ /* Column address wihin the page aligned to ECC size */ ++ start_step = data_offs / chip->ecc.size; ++ end_step = (data_offs + readlen - 1) / chip->ecc.size; ++ num_steps = end_step - start_step + 1; ++ ++ data_col_addr = start_step * chip->ecc.size; ++ ++ /* Read the OOB area first */ ++ if (mtd->writesize > 512) { ++ chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page); ++ chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); ++ chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_col_addr, -1); ++ } else { ++ chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page); ++ chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); ++ chip->cmdfunc(mtd, NAND_CMD_READ0, data_col_addr, page); ++ } ++ ++ for (i = 0; i < chip->ecc.total; i++) ++ ecc_code[i] = chip->oob_poi[eccpos[i]]; ++ ++ p = bufpoi + data_col_addr; ++ ++ for (i = eccbytes * start_step; num_steps; num_steps--, i += eccbytes, p += eccsize) { ++ int stat; ++ ++ chip->ecc.hwctl(mtd, NAND_ECC_READ); ++ chip->read_buf(mtd, p, eccsize); ++ chip->ecc.calculate(mtd, p, &ecc_calc[i]); ++ ++ stat = chip->ecc.correct(mtd, p, &ecc_code[i], NULL); ++ if (stat < 0) ++ mtd->ecc_stats.failed++; ++ else ++ mtd->ecc_stats.corrected += stat; ++ } ++ ++ return 0; ++} ++ + /** + * nand_read_page_syndrome - [REPLACABLE] hardware ecc syndrom based page read + * @mtd: mtd info structure +@@ -1502,7 +1571,7 @@ static int nand_do_read_ops(struct mtd_i + bufpoi, page); + else if (!aligned && NAND_SUBPAGE_READ(chip) && !oob) + ret = chip->ecc.read_subpage(mtd, chip, +- col, bytes, bufpoi); ++ col, bytes, bufpoi, page); + else + ret = chip->ecc.read_page(mtd, chip, bufpoi, + page); +@@ -3288,8 +3357,11 @@ int nand_scan_tail(struct mtd_info *mtd) + "Hardware ECC not possible\n"); + BUG(); + } +- if (!chip->ecc.read_page) ++ if (!chip->ecc.read_page) { + chip->ecc.read_page = nand_read_page_hwecc_oob_first; ++ if (!chip->ecc.read_subpage) ++ chip->ecc.read_subpage = nand_read_subpage_hwecc_oob_first; ++ } + + case NAND_ECC_HW: + /* Use standard hwecc read page function ? */ +--- a/include/linux/mtd/nand.h ++++ b/include/linux/mtd/nand.h +@@ -210,9 +210,9 @@ typedef enum { + #define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING)) + #define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG)) + #define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK)) +-/* Large page NAND with SOFT_ECC should support subpage reads */ +-#define NAND_SUBPAGE_READ(chip) ((chip->ecc.mode == NAND_ECC_SOFT) \ +- && (chip->page_shift > 9)) ++/* Large page NAND with read_subpage should support subpage reads */ ++#define NAND_SUBPAGE_READ(chip) (((chip)->ecc.read_subpage) \ ++ && ((chip)->page_shift > 9)) + + /* Mask to zero out the chip options, which come from the id table */ + #define NAND_CHIPOPTIONS_MSK (0x0000ffff & ~NAND_NO_AUTOINCR) +@@ -374,7 +374,7 @@ struct nand_ecc_ctrl { + int (*read_page)(struct mtd_info *mtd, struct nand_chip *chip, + uint8_t *buf, int page); + int (*read_subpage)(struct mtd_info *mtd, struct nand_chip *chip, +- uint32_t offs, uint32_t len, uint8_t *buf); ++ uint32_t offs, uint32_t len, uint8_t *buf, int page); + void (*write_page)(struct mtd_info *mtd, struct nand_chip *chip, + const uint8_t *buf); + int (*read_oob)(struct mtd_info *mtd, struct nand_chip *chip, int page, diff --git a/target/linux/xburst/patches-2.6.37/904-NAND-Optimize-reading-the-eec-data-for-the-JZ4740-ev.patch b/target/linux/xburst/patches-2.6.37/904-NAND-Optimize-reading-the-eec-data-for-the-JZ4740-ev.patch new file mode 100644 index 000000000..5523b47b2 --- /dev/null +++ b/target/linux/xburst/patches-2.6.37/904-NAND-Optimize-reading-the-eec-data-for-the-JZ4740-ev.patch @@ -0,0 +1,44 @@ +--- a/drivers/mtd/nand/nand_base.c ++++ b/drivers/mtd/nand/nand_base.c +@@ -1314,8 +1314,8 @@ static int nand_read_page_hwecc_oob_firs + + /* Read the OOB area first */ + if (mtd->writesize > 512) { +- chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page); +- chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); ++ chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize + eccpos[0], page); ++ chip->read_buf(mtd, ecc_code, chip->ecc.total); + chip->cmdfunc(mtd, NAND_CMD_RNDOUT, 0, -1); + } else { + chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page); +@@ -1323,9 +1323,6 @@ static int nand_read_page_hwecc_oob_firs + chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page); + } + +- for (i = 0; i < chip->ecc.total; i++) +- ecc_code[i] = chip->oob_poi[eccpos[i]]; +- + for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { + int stat; + +@@ -1380,8 +1377,8 @@ static int nand_read_subpage_hwecc_oob_f + + /* Read the OOB area first */ + if (mtd->writesize > 512) { +- chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page); +- chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); ++ chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize + eccpos[0], page); ++ chip->read_buf(mtd, ecc_code, chip->ecc.total); + chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_col_addr, -1); + } else { + chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page); +@@ -1389,9 +1386,6 @@ static int nand_read_subpage_hwecc_oob_f + chip->cmdfunc(mtd, NAND_CMD_READ0, data_col_addr, page); + } + +- for (i = 0; i < chip->ecc.total; i++) +- ecc_code[i] = chip->oob_poi[eccpos[i]]; +- + p = bufpoi + data_col_addr; + + for (i = eccbytes * start_step; num_steps; num_steps--, i += eccbytes, p += eccsize) {