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convert aruba to the new structure

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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@7284 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
kaloz
2007-05-20 19:32:31 +00:00
parent f2146ff453
commit c4105c81c0
42 changed files with 8218 additions and 13433 deletions
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49
target/linux/aruba-2.6/files/arch/mips/aruba/Makefile Normal file
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###############################################################################
#
# BRIEF MODULE DESCRIPTION
# Makefile for IDT EB434 BSP
#
# Copyright 2004 IDT Inc. (rischelp@idt.com)
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the
# Free Software Foundation; either version 2 of the License, or (at your
# option) any later version.
#
# THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
# WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
# NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
# USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
# ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# You should have received a copy of the GNU General Public License along
# with this program; if not, write to the Free Software Foundation, Inc.,
# 675 Mass Ave, Cambridge, MA 02139, USA.
#
#
###############################################################################
# May 2004 rkt, neb
#
# Initial Release
#
#
#
###############################################################################
# .S.s:
# $(CPP) $(CFLAGS) $< -o $*.s
# .S.o:
# $(CC) $(CFLAGS) -c $< -o $*.o
obj-y := prom.o setup.o irq.o time.o flash_lock.o
obj-$(CONFIG_SERIAL_8250) += serial.o
subdir-y += nvram
obj-y += nvram/built-in.o

27
target/linux/aruba-2.6/files/arch/mips/aruba/flash_lock.c Normal file
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#include <linux/module.h>
#include <linux/types.h>
#include <asm/bootinfo.h>
#define AP70_PROT_ADDR 0xb8010008
#define AP70_PROT_DATA 0x8
#define AP60_PROT_ADDR 0xB8400000
#define AP60_PROT_DATA 0x04000000
void unlock_ap60_70_flash(void)
{
volatile __u32 val;
switch (mips_machtype) {
case MACH_ARUBA_AP70:
val = *(volatile __u32 *)AP70_PROT_ADDR;
val &= ~(AP70_PROT_DATA);
*(volatile __u32 *)AP70_PROT_ADDR = val;
break;
case MACH_ARUBA_AP65:
case MACH_ARUBA_AP60:
default:
val = *(volatile __u32 *)AP60_PROT_ADDR;
val &= ~(AP60_PROT_DATA);
*(volatile __u32 *)AP60_PROT_ADDR = val;
break;
}
}

285
target/linux/aruba-2.6/files/arch/mips/aruba/irq.c Normal file
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#include <linux/errno.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
#include <linux/module.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/timex.h>
#include <linux/slab.h>
#include <linux/random.h>
#include <linux/delay.h>
#include <asm/bitops.h>
#include <asm/bootinfo.h>
#include <asm/io.h>
#include <asm/mipsregs.h>
#include <asm/system.h>
#include <asm/idt-boards/rc32434/rc32434.h>
#include <asm/idt-boards/rc32434/rc32434_gpio.h>
#include <asm/irq.h>
extern void aruba_timer_interrupt(struct pt_regs *regs);
typedef struct {
u32 mask;
volatile u32 *base_addr;
} intr_group_t;
static const intr_group_t intr_group_merlot[NUM_INTR_GROUPS] = {
{0x00000000, (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 0)},
};
#define READ_PEND_MERLOT(base) (*((volatile unsigned long *)(0xbc003010)))
#define READ_MASK_MERLOT(base) (*((volatile unsigned long *)(0xbc003014)))
#define WRITE_MASK_MERLOT(base, val) ((*((volatile unsigned long *)(0xbc003014))) = (val), READ_MASK_MERLOT())
static const intr_group_t intr_group_muscat[NUM_INTR_GROUPS] = {
{0x0000efff, (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 0 * IC_GROUP_OFFSET)},
{0x00001fff, (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 1 * IC_GROUP_OFFSET)},
{0x00000007, (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 2 * IC_GROUP_OFFSET)},
{0x0003ffff, (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 3 * IC_GROUP_OFFSET)},
{0xffffffff, (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 4 * IC_GROUP_OFFSET)}
};
#define READ_PEND_MUSCAT(base) (*(base))
#define READ_MASK_MUSCAT(base) (*(base + 2))
#define WRITE_MASK_MUSCAT(base, val) (*(base + 2) = (val))
static inline int group_to_ip(unsigned int group)
{
switch (mips_machtype) {
case MACH_ARUBA_AP70:
return group + 2;
case MACH_ARUBA_AP65:
case MACH_ARUBA_AP60:
default:
return 6;
}
}
static inline void enable_local_irq(unsigned int irq)
{
clear_c0_cause(0x100 << irq);
set_c0_status(0x100 << irq);
irq_enable_hazard();
}
static inline void disable_local_irq(unsigned int irq)
{
clear_c0_status(0x100 << irq);
clear_c0_cause(0x100 << irq);
irq_disable_hazard();
}
static inline void aruba_irq_enable(unsigned int irq)
{
unsigned long flags;
unsigned int group, intr_bit;
volatile unsigned int *addr;
local_irq_save(flags);
if (irq < GROUP0_IRQ_BASE) {
enable_local_irq(irq);
} else {
int ip = irq - GROUP0_IRQ_BASE;
switch (mips_machtype) {
case MACH_ARUBA_AP70:
if (irq >= GROUP4_IRQ_BASE)
idt_gpio->gpioistat &= ~(1 << (irq - GROUP4_IRQ_BASE));
// irqs are in groups of 32
// ip is set to the remainder
group = ip >> 5;
ip &= 0x1f;
// bit -> 0 = unmask
intr_bit = 1 << ip;
addr = intr_group_muscat[group].base_addr;
WRITE_MASK_MUSCAT(addr, READ_MASK_MUSCAT(addr) & ~intr_bit);
break;
case MACH_ARUBA_AP65:
case MACH_ARUBA_AP60:
group = 0;
// bit -> 1 = unmasked
intr_bit = 1 << ip;
addr = intr_group_merlot[group].base_addr;
WRITE_MASK_MERLOT(addr, READ_MASK_MERLOT(addr) | intr_bit);
break;
}
enable_local_irq(group_to_ip(group));
}
back_to_back_c0_hazard();
local_irq_restore(flags);
}
static void aruba_irq_disable(unsigned int irq)
{
unsigned long flags;
unsigned int group, intr_bit, mask;
volatile unsigned int *addr;
local_irq_save(flags);
if (irq < GROUP0_IRQ_BASE) {
disable_local_irq(irq);
} else {
int ip = irq - GROUP0_IRQ_BASE;
switch (mips_machtype) {
case MACH_ARUBA_AP70:
idt_gpio->gpioistat &= ~(1 << ip);
// irqs are in groups of 32
// ip is set to the remainder
group = ip >> 5;
ip &= 0x1f;
// bit -> 1 = mask
intr_bit = 1 << ip;
addr = intr_group_muscat[group].base_addr;
mask = READ_MASK_MUSCAT(addr);
mask |= intr_bit;
WRITE_MASK_MUSCAT(addr, mask);
if (mask == intr_group_muscat[group].mask) {
disable_local_irq(group_to_ip(group));
}
break;
case MACH_ARUBA_AP65:
case MACH_ARUBA_AP60:
group = 0;
// bit -> 0 = masked
intr_bit = 1 << ip;
addr = intr_group_merlot[group].base_addr;
mask = READ_MASK_MERLOT(addr);
mask &= ~intr_bit;
WRITE_MASK_MERLOT(addr, mask);
if (mask == intr_group_merlot[group].mask) {
disable_local_irq(group_to_ip(group));
}
break;
}
}
back_to_back_c0_hazard();
local_irq_restore(flags);
}
static unsigned int aruba_irq_startup(unsigned int irq)
{
aruba_irq_enable(irq);
return 0;
}
#define aruba_irq_shutdown aruba_irq_disable
static void aruba_irq_ack(unsigned int irq)
{
aruba_irq_disable(irq);
}
static void aruba_irq_end(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
aruba_irq_enable(irq);
}
static struct hw_interrupt_type aruba_irq_type = {
.typename = "ARUBA",
.startup = aruba_irq_startup,
.shutdown = aruba_irq_shutdown,
.enable = aruba_irq_enable,
.disable = aruba_irq_disable,
.ack = aruba_irq_ack,
.end = aruba_irq_end,
};
void __init arch_init_irq(void)
{
int i;
printk("Initializing IRQ's: %d out of %d\n", RC32434_NR_IRQS, NR_IRQS);
memset(irq_desc, 0, sizeof(irq_desc));
for (i = 0; i < RC32434_NR_IRQS; i++) {
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = NULL;
irq_desc[i].depth = 1;
irq_desc[i].chip = &aruba_irq_type;
spin_lock_init(&irq_desc[i].lock);
}
}
/* Main Interrupt dispatcher */
void plat_irq_dispatch(struct pt_regs *regs)
{
unsigned int pend, group, ip;
volatile unsigned int *addr;
unsigned long cp0_cause = read_c0_cause() & read_c0_status() & CAUSEF_IP;
if (cp0_cause & CAUSEF_IP7)
return aruba_timer_interrupt(regs);
if(cp0_cause == 0) {
printk("INTERRUPT(S) FIRED WHILE MASKED\n");
#ifdef ARUBA_DEBUG
// debuging use -- figure out which interrupt(s) fired
cp0_cause = read_c0_cause() & CAUSEF_IP;
while (cp0_cause) {
unsigned long intr_bit;
unsigned int irq_nr;
intr_bit = (31 - rc32434_clz(cp0_cause));
irq_nr = intr_bit - GROUP0_IRQ_BASE;
printk(" ---> MASKED IRQ %d\n",irq_nr);
cp0_cause &= ~(1 << intr_bit);
}
#endif
return;
}
switch (mips_machtype) {
case MACH_ARUBA_AP70:
if ((ip = (cp0_cause & 0x7c00))) {
group = 21 - rc32434_clz(ip);
addr = intr_group_muscat[group].base_addr;
pend = READ_PEND_MUSCAT(addr);
pend &= ~READ_MASK_MUSCAT(addr); // only unmasked interrupts
pend = 39 - rc32434_clz(pend);
do_IRQ(pend + (group << 5));
}
break;
case MACH_ARUBA_AP65:
case MACH_ARUBA_AP60:
default:
if (cp0_cause & 0x4000) { // 1 << (8 +6) == irq 6
// Misc Interrupt
group = 0;
addr = intr_group_merlot[group].base_addr;
pend = READ_PEND_MERLOT(addr);
pend &= READ_MASK_MERLOT(addr); // only unmasked interrupts
pend = 31 - rc32434_clz(pend);
do_IRQ(pend + GROUP0_IRQ_BASE);
}
if ((ip = (cp0_cause & 0x3c00))) { // irq 2-5
pend = 31 - rc32434_clz(ip);
do_IRQ(pend - GROUP0_IRQ_BASE);
}
break;
}
}

46
target/linux/aruba-2.6/files/arch/mips/aruba/nvram/Makefile Normal file
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###############################################################################
#
# BRIEF MODULE DESCRIPTION
# Makefile for IDT EB434 nvram access routines
#
# Copyright 2004 IDT Inc. (rischelp@idt.com)
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the
# Free Software Foundation; either version 2 of the License, or (at your
# option) any later version.
#
# THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
# WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
# NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
# USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
# ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# You should have received a copy of the GNU General Public License along
# with this program; if not, write to the Free Software Foundation, Inc.,
# 675 Mass Ave, Cambridge, MA 02139, USA.
#
#
###############################################################################
# May 2004 rkt, neb
#
# Initial Release
#
#
#
###############################################################################
obj-y := nvram434.o
obj-m := $(O_TARGET)

392
target/linux/aruba-2.6/files/arch/mips/aruba/nvram/nvram434.c Normal file
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/**************************************************************************
*
* BRIEF MODULE DESCRIPTION
* nvram interface routines.
*
* Copyright 2004 IDT Inc. (rischelp@idt.com)
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
*
**************************************************************************
* May 2004 rkt, neb
*
* Initial Release
*
*
*
**************************************************************************
*/
#include <linux/ctype.h>
#include <linux/string.h>
//#include <asm/ds1553rtc.h>
#include "nvram434.h"
#define NVRAM_BASE 0xbfff8000
extern void setenv (char *e, char *v, int rewrite);
extern void unsetenv (char *e);
extern void mapenv (int (*func)(char *, char *));
extern char *getenv (char *s);
extern void purgeenv(void);
static void nvram_initenv(void);
static unsigned char
nvram_getbyte(int offs)
{
return(*((unsigned char*)(NVRAM_BASE + offs)));
}
static void
nvram_setbyte(int offs, unsigned char val)
{
unsigned char* nvramDataPointer = (unsigned char*)(NVRAM_BASE + offs);
*nvramDataPointer = val;
}
/*
* BigEndian!
*/
static unsigned short
nvram_getshort(int offs)
{
return((nvram_getbyte(offs) << 8) | nvram_getbyte(offs + 1));
}
static void
nvram_setshort(int offs, unsigned short val)
{
nvram_setbyte(offs, (unsigned char)((val >> 8) & 0xff));
nvram_setbyte(offs + 1, (unsigned char)(val & 0xff));
}
#if 0
static unsigned int
nvram_getint(int offs)
{
unsigned int val;
val = nvram_getbyte(offs) << 24;
val |= nvram_getbyte(offs + 1) << 16;
val |= nvram_getbyte(offs + 2) << 8;
val |= nvram_getbyte(offs + 3);
return(val);
}
static void
nvram_setint(int offs, unsigned int val)
{
nvram_setbyte(offs, val >> 24);
nvram_setbyte(offs + 1, val >> 16);
nvram_setbyte(offs + 2, val >> 8);
nvram_setbyte(offs + 3, val);
}
#endif
/*
* calculate NVRAM checksum
*/
static unsigned short
nvram_calcsum(void)
{
unsigned short sum = NV_MAGIC;
int i;
for (i = ENV_BASE; i < ENV_TOP; i += 2)
sum += nvram_getshort(i);
return(sum);
}
/*
* update the nvram checksum
*/
static void
nvram_updatesum (void)
{
nvram_setshort(NVOFF_CSUM, nvram_calcsum());
}
/*
* test validity of nvram by checksumming it
*/
static int
nvram_isvalid(void)
{
static int is_valid;
if (is_valid)
return(1);
if (nvram_getshort(NVOFF_MAGIC) != NV_MAGIC) {
printk("nvram_isvalid FAILED\n");
//nvram_initenv();
}
is_valid = 1;
return(1);
}
/* return nvram address of environment string */
static int
nvram_matchenv(char *s)
{
int envsize, envp, n, i, varsize;
char *var;
envsize = nvram_getshort(NVOFF_ENVSIZE);
if (envsize > ENV_AVAIL)
return(0); /* sanity */
envp = ENV_BASE;
if ((n = strlen (s)) > 255)
return(0);
while (envsize > 0) {
varsize = nvram_getbyte(envp);
if (varsize == 0 || (envp + varsize) > ENV_TOP)
return(0); /* sanity */
for (i = envp + 1, var = s; i <= envp + n; i++, var++) {
char c1 = nvram_getbyte(i);
char c2 = *var;
if (islower(c1))
c1 = toupper(c1);
if (islower(c2))
c2 = toupper(c2);
if (c1 != c2)
break;
}
if (i > envp + n) { /* match so far */
if (n == varsize - 1) /* match on boolean */
return(envp);
if (nvram_getbyte(i) == '=') /* exact match on variable */
return(envp);
}
envsize -= varsize;
envp += varsize;
}
return(0);
}
static void nvram_initenv(void)
{
nvram_setshort(NVOFF_MAGIC, NV_MAGIC);
nvram_setshort(NVOFF_ENVSIZE, 0);
nvram_updatesum();
}
static void
nvram_delenv(char *s)
{
int nenvp, envp, envsize, nbytes;
envp = nvram_matchenv(s);
if (envp == 0)
return;
nenvp = envp + nvram_getbyte(envp);
envsize = nvram_getshort(NVOFF_ENVSIZE);
nbytes = envsize - (nenvp - ENV_BASE);
nvram_setshort(NVOFF_ENVSIZE, envsize - (nenvp - envp));
while (nbytes--) {
nvram_setbyte(envp, nvram_getbyte(nenvp));
envp++;
nenvp++;
}
nvram_updatesum();
}
static int
nvram_setenv(char *s, char *v)
{
int ns, nv, total;
int envp;
if (!nvram_isvalid())
return(-1);
nvram_delenv(s);
ns = strlen(s);
if (ns == 0)
return (-1);
if (v && *v) {
nv = strlen(v);
total = ns + nv + 2;
}
else {
nv = 0;
total = ns + 1;
}
if (total > 255 || total > ENV_AVAIL - nvram_getshort(NVOFF_ENVSIZE))
return(-1);
envp = ENV_BASE + nvram_getshort(NVOFF_ENVSIZE);
nvram_setbyte(envp, (unsigned char) total);
envp++;
while (ns--) {
nvram_setbyte(envp, *s);
envp++;
s++;
}
if (nv) {
nvram_setbyte(envp, '=');
envp++;
while (nv--) {
nvram_setbyte(envp, *v);
envp++;
v++;
}
}
nvram_setshort(NVOFF_ENVSIZE, envp-ENV_BASE);
nvram_updatesum();
return 0;
}
static char *
nvram_getenv(char *s)
{
static char buf[256]; /* FIXME: this cannot be static */
int envp, ns, nbytes, i;
if (!nvram_isvalid())
return "INVALID NVRAM"; //((char *)0);
envp = nvram_matchenv(s);
if (envp == 0)
return "NOT FOUND"; //((char *)0);
ns = strlen(s);
if (nvram_getbyte(envp) == ns + 1) /* boolean */
buf[0] = '\0';
else {
nbytes = nvram_getbyte(envp) - (ns + 2);
envp += ns + 2;
for (i = 0; i < nbytes; i++)
buf[i] = nvram_getbyte(envp++);
buf[i] = '\0';
}
return(buf);
}
static void
nvram_unsetenv(char *s)
{
if (!nvram_isvalid())
return;
nvram_delenv(s);
}
/*
* apply func to each string in environment
*/
static void
nvram_mapenv(int (*func)(char *, char *))
{
int envsize, envp, n, i, seeneql;
char name[256], value[256];
char c, *s;
if (!nvram_isvalid())
return;
envsize = nvram_getshort(NVOFF_ENVSIZE);
envp = ENV_BASE;
while (envsize > 0) {
value[0] = '\0';
seeneql = 0;
s = name;
n = nvram_getbyte(envp);
for (i = envp + 1; i < envp + n; i++) {
c = nvram_getbyte(i);
if ((c == '=') && !seeneql) {
*s = '\0';
s = value;
seeneql = 1;
continue;
}
*s++ = c;
}
*s = '\0';
(*func)(name, value);
envsize -= n;
envp += n;
}
}
#if 0
static unsigned int
digit(char c)
{
if ('0' <= c && c <= '9')
return (c - '0');
if ('A' <= c && c <= 'Z')
return (10 + c - 'A');
if ('a' <= c && c <= 'z')
return (10 + c - 'a');
return (~0);
}
#endif
/*
* Wrappers to allow 'special' environment variables to get processed
*/
void
setenv(char *e, char *v, int rewrite)
{
if (nvram_getenv(e) && !rewrite)
return;
nvram_setenv(e, v);
}
char *
getenv(char *e)
{
return(nvram_getenv(e));
}
void
unsetenv(char *e)
{
nvram_unsetenv(e);
}
void
purgeenv()
{
int i;
unsigned char* nvramDataPointer = (unsigned char*)(NVRAM_BASE);
for (i = ENV_BASE; i < ENV_TOP; i++)
*nvramDataPointer++ = 0;
nvram_setshort(NVOFF_MAGIC, NV_MAGIC);
nvram_setshort(NVOFF_ENVSIZE, 0);
nvram_setshort(NVOFF_CSUM, NV_MAGIC);
}
void
mapenv(int (*func)(char *, char *))
{
nvram_mapenv(func);
}

66
target/linux/aruba-2.6/files/arch/mips/aruba/nvram/nvram434.h Normal file
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/**************************************************************************
*
* BRIEF MODULE DESCRIPTION
* nvram definitions.
*
* Copyright 2004 IDT Inc. (rischelp@idt.com)
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
*
**************************************************************************
* May 2004 rkt, neb
*
* Initial Release
*
*
*
**************************************************************************
*/
#ifndef _NVRAM_
#define _NVRAM_
#define NVOFFSET 0 /* use all of NVRAM */
/* Offsets to reserved locations */
/* size description */
#define NVOFF_MAGIC (NVOFFSET + 0) /* 2 magic value */
#define NVOFF_CSUM (NVOFFSET + 2) /* 2 NVRAM environment checksum */
#define NVOFF_ENVSIZE (NVOFFSET + 4) /* 2 size of 'environment' */
#define NVOFF_TEST (NVOFFSET + 5) /* 1 cold start test byte */
#define NVOFF_ETHADDR (NVOFFSET + 6) /* 6 decoded ethernet address */
#define NVOFF_UNUSED (NVOFFSET + 12) /* 0 current end of table */
#define NV_MAGIC 0xdeaf /* nvram magic number */
#define NV_RESERVED 6 /* number of reserved bytes */
#undef NVOFF_ETHADDR
#define NVOFF_ETHADDR (NVOFFSET + NV_RESERVED - 6)
/* number of bytes available for environment */
#define ENV_BASE (NVOFFSET + NV_RESERVED)
#define ENV_TOP 0x2000
#define ENV_AVAIL (ENV_TOP - ENV_BASE)
#endif /* _NVRAM_ */

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/**************************************************************************
*
* BRIEF MODULE DESCRIPTION
* prom interface routines
*
* Copyright 2004 IDT Inc. (rischelp@idt.com)
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
*
**************************************************************************
* May 2004 rkt, neb
*
* Initial Release
*
*
*
**************************************************************************
*/
#include <linux/autoconf.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/string.h>
#include <linux/console.h>
#include <asm/bootinfo.h>
#include <linux/bootmem.h>
#include <linux/ioport.h>
#include <linux/serial.h>
#include <linux/serialP.h>
#include <asm/serial.h>
#include <linux/ioport.h>
unsigned int idt_cpu_freq;
EXPORT_SYMBOL(idt_cpu_freq);
unsigned int arch_has_pci=0;
/* Kernel Boot parameters */
static unsigned char bootparm[] =
"init=/etc/preinit noinitrd "
"mtdparts=physmap-flash.0:3520k@0x080000(kernel),2752k@0x140000(rootfs),8k@0x3f8000(NVRAM) "
"console=ttyS0,9600 root=/dev/mtdblock1 rootfstype=squashfs,jffs2 ";
extern unsigned long mips_machgroup;
extern unsigned long mips_machtype;
extern void setup_serial_port(void);
extern char * getenv(char *e);
/* IDT 79EB434 memory map -- we really should be auto sizing it */
#define RAM_SIZE 32*1024*1024
char *__init prom_getcmdline(void)
{
return &(arcs_cmdline[0]);
}
void __init prom_init(void)
{
char *boardname;
sprintf(arcs_cmdline, "%s", bootparm);
/* set our arch type */
mips_machgroup = MACH_GROUP_ARUBA;
mips_machtype = MACH_ARUBA_UNKNOWN;
boardname=getenv("boardname");
if (!strcmp(boardname,"Muscat")) {
mips_machtype = MACH_ARUBA_AP70;
idt_cpu_freq = 133000000;
arch_has_pci=1;
} else if (!strcmp(boardname,"Mataro")) {
mips_machtype = MACH_ARUBA_AP65;
idt_cpu_freq = 110000000;
} else if (!strcmp(boardname,"Merlot")) {
mips_machtype = MACH_ARUBA_AP60;
idt_cpu_freq = 90000000;
}
/* turn on the console */
setup_serial_port();
/*
* give all RAM to boot allocator,
* except where the kernel was loaded
*/
add_memory_region(0,RAM_SIZE,BOOT_MEM_RAM);
}
void prom_free_prom_memory(void)
{
printk("stubbed prom_free_prom_memory()\n");
}

94
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/**************************************************************************
*
* BRIEF MODULE DESCRIPTION
* Serial port initialisation.
*
* Copyright 2004 IDT Inc. (rischelp@idt.com)
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
*
**************************************************************************
* May 2004 rkt, neb
*
* Initial Release
*
*
*
**************************************************************************
*/
#include <linux/autoconf.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/pci.h>
#include <linux/interrupt.h>
#include <linux/tty.h>
#include <linux/serial.h>
#include <linux/serial_core.h>
#include <asm/time.h>
#include <asm/cpu.h>
#include <asm/bootinfo.h>
#include <asm/irq.h>
#include <asm/serial.h>
#include <asm/idt-boards/rc32434/rc32434.h>
extern int __init early_serial_setup(struct uart_port *port);
#define BASE_BAUD (1843200 / 16)
extern unsigned int idt_cpu_freq;
extern int __init setup_serial_port(void)
{
static struct uart_port serial_req[2];
memset(serial_req, 0, sizeof(serial_req));
serial_req[0].type = PORT_16550A;
serial_req[0].line = 0;
serial_req[0].flags = STD_COM_FLAGS;
serial_req[0].iotype = SERIAL_IO_MEM;
serial_req[0].regshift = 2;
switch (mips_machtype) {
case MACH_ARUBA_AP70:
serial_req[0].irq = 104;
serial_req[0].mapbase = KSEG1ADDR(0x18058003);
serial_req[0].membase = (char *) KSEG1ADDR(0x18058003);
serial_req[0].uartclk = idt_cpu_freq;
break;
case MACH_ARUBA_AP65:
case MACH_ARUBA_AP60:
default:
serial_req[0].irq = 12;
serial_req[0].mapbase = KSEG1ADDR(0xbc000003);
serial_req[0].membase = (char *) KSEG1ADDR(0xbc000003);
serial_req[0].uartclk = idt_cpu_freq / 2;
break;
}
early_serial_setup(&serial_req[0]);
return(0);
}

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/**************************************************************************
*
* BRIEF MODULE DESCRIPTION
* setup routines for IDT EB434 boards
*
* Copyright 2004 IDT Inc. (rischelp@idt.com)
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
*
**************************************************************************
* May 2004 rkt, neb
*
* Initial Release
*
*
*
**************************************************************************
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/mm.h>
#include <linux/sched.h>
#include <linux/irq.h>
#include <asm/bootinfo.h>
#include <asm/io.h>
#include <linux/ioport.h>
#include <asm/mipsregs.h>
#include <asm/pgtable.h>
#include <asm/reboot.h>
#include <asm/addrspace.h> /* for KSEG1ADDR() */
#include <asm/idt-boards/rc32434/rc32434.h>
#include <linux/pm.h>
extern char *__init prom_getcmdline(void);
extern void (*board_time_init) (void);
extern void aruba_time_init(void);
extern void aruba_reset(void);
#define epldMask ((volatile unsigned char *)0xB900000d)
static void aruba_machine_restart(char *command)
{
switch (mips_machtype) {
case MACH_ARUBA_AP70:
*(volatile u32 *)KSEG1ADDR(0x18008000) = 0x80000001;
break;
case MACH_ARUBA_AP65:
case MACH_ARUBA_AP60:
default:
/* Reset*/
*((volatile u32 *)KSEG1ADDR(0x1c003020)) = 0x00080350; // reset everything in sight
udelay(100);
*((volatile u32 *)KSEG1ADDR(0x1c003020)) = 0; // reset everything in sight
udelay(100);
*((volatile u32 *)KSEG1ADDR(0x1c003020)) = 0x3; // cold reset the cpu & system
break;
}
}
static void aruba_machine_halt(void)
{
for (;;) continue;
}
extern char * getenv(char *e);
extern void unlock_ap60_70_flash(void);
void __init plat_mem_setup(void)
{
board_time_init = aruba_time_init;
_machine_restart = aruba_machine_restart;
_machine_halt = aruba_machine_halt;
pm_power_off = aruba_machine_halt;
set_io_port_base(KSEG1);
/* Enable PCI interrupts in EPLD Mask register */
*epldMask = 0x0;
*(epldMask + 1) = 0x0;
write_c0_wired(0);
unlock_ap60_70_flash();
printk("BOARD - %s\n",getenv("boardname"));
}
int page_is_ram(unsigned long pagenr)
{
return 1;
}
const char *get_system_type(void)
{
switch (mips_machtype) {
case MACH_ARUBA_AP70:
return "Aruba AP70";
case MACH_ARUBA_AP65:
return "Aruba AP65";
case MACH_ARUBA_AP60:
return "Aruba AP60/AP61";
default:
return "Aruba UNKNOWN";
}
}
EXPORT_SYMBOL(get_system_type);

110
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/**************************************************************************
*
* BRIEF MODULE DESCRIPTION
* timer routines for IDT EB434 boards
*
* Copyright 2004 IDT Inc. (rischelp@idt.com)
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
*
**************************************************************************
* May 2004 rkt, neb
*
* Initial Release
*
*
*
**************************************************************************
*/
#include <linux/autoconf.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
#include <linux/sched.h>
#include <linux/spinlock.h>
#include <linux/mc146818rtc.h>
#include <linux/irq.h>
#include <linux/timex.h>
#include <linux/param.h>
#include <asm/mipsregs.h>
#include <asm/ptrace.h>
#include <asm/time.h>
#include <asm/hardirq.h>
#include <asm/mipsregs.h>
#include <asm/ptrace.h>
#include <asm/debug.h>
#include <asm/time.h>
#include <asm/idt-boards/rc32434/rc32434.h>
static unsigned long r4k_offset; /* Amount to incr compare reg each time */
static unsigned long r4k_cur; /* What counter should be at next timer irq */
extern unsigned int idt_cpu_freq;
static unsigned long __init cal_r4koff(void)
{
mips_hpt_frequency = idt_cpu_freq * IDT_CLOCK_MULT / 2;
return (mips_hpt_frequency / HZ);
}
void __init aruba_time_init(void)
{
unsigned int est_freq, flags;
local_irq_save(flags);
printk("calculating r4koff... ");
r4k_offset = cal_r4koff();
printk("%08lx(%d)\n", r4k_offset, (int)r4k_offset);
est_freq = 2 * r4k_offset * HZ;
est_freq += 5000; /* round */
est_freq -= est_freq % 10000;
printk("CPU frequency %d.%02d MHz\n", est_freq / 1000000,
(est_freq % 1000000) * 100 / 1000000);
local_irq_restore(flags);
}
void __init plat_timer_setup(struct irqaction *irq)
{
/* we are using the cpu counter for timer interrupts */
setup_irq(MIPS_CPU_TIMER_IRQ, irq);
/* to generate the first timer interrupt */
r4k_cur = (read_c0_count() + r4k_offset);
write_c0_compare(r4k_cur);
}
asmlinkage void aruba_timer_interrupt(struct pt_regs *regs)
{
int irq = MIPS_CPU_TIMER_IRQ;
irq_enter();
kstat_this_cpu.irqs[irq]++;
timer_interrupt(irq, NULL);
irq_exit();
}

115
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/**************************************************************************
*
* BRIEF MODULE DESCRIPTION
* PCI fixups for IDT EB434 board
*
* Copyright 2004 IDT Inc. (rischelp@idt.com)
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
*
**************************************************************************
* May 2004 rkt, neb
*
* Initial Release
*
*
*
**************************************************************************
*/
#include <linux/autoconf.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/idt-boards/rc32434/rc32434.h>
#include <asm/idt-boards/rc32434/rc32434_pci.h>
int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
if (dev->bus->number != 0) {
return 0;
}
slot = PCI_SLOT(dev->devfn);
dev->irq = 0;
if (slot > 0 && slot <= 15) {
#if 1
if(slot == 10) {
if(pin == 1) dev->irq = GROUP4_IRQ_BASE + 9; // intA
} else if(slot == 11) {
if(pin == 1) dev->irq = GROUP4_IRQ_BASE + 10; // intA
if(pin == 2) dev->irq = GROUP4_IRQ_BASE + 10; // intA
if(pin == 3) dev->irq = GROUP4_IRQ_BASE + 10; // intA
} else if(slot == 12) {
if(pin == 1) dev->irq = GROUP4_IRQ_BASE + 11; // intA
if(pin == 2) dev->irq = GROUP4_IRQ_BASE + 12; // intB
} else if (slot == 13) {
if(pin == 1) dev->irq = GROUP4_IRQ_BASE + 12; // intA
if(pin == 2) dev->irq = GROUP4_IRQ_BASE + 11; // intB
} else {
dev->irq = GROUP4_IRQ_BASE + 11;
}
#else
switch (pin) {
case 1: /* INTA*/
dev->irq = GROUP4_IRQ_BASE + 11;
break;
case 2: /* INTB */
dev->irq = GROUP4_IRQ_BASE + 11;
break;
case 3: /* INTC */
dev->irq = GROUP4_IRQ_BASE + 11;
break;
case 4: /* INTD */
dev->irq = GROUP4_IRQ_BASE + 11;
break;
default:
dev->irq = 0xff;
break;
}
#endif
#ifdef DEBUG
printk("irq fixup: slot %d, pin %d, irq %d\n",
slot, pin, dev->irq);
#endif
pci_write_config_byte(dev, PCI_INTERRUPT_LINE,dev->irq);
}
return (dev->irq);
}
struct pci_fixup pcibios_fixups[] = {
{0}
};

204
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/**************************************************************************
*
* BRIEF MODULE DESCRIPTION
* pci_ops for IDT EB434 board
*
* Copyright 2004 IDT Inc. (rischelp@idt.com)
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
*
**************************************************************************
* May 2004 rkt, neb
*
* Initial Release
*
*
*
**************************************************************************
*/
#include <linux/autoconf.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/types.h>
#include <linux/delay.h>
#include <asm/cpu.h>
#include <asm/io.h>
#include <asm/idt-boards/rc32434/rc32434.h>
#include <asm/idt-boards/rc32434/rc32434_pci.h>
#define PCI_ACCESS_READ 0
#define PCI_ACCESS_WRITE 1
#define PCI_CFG_SET(slot,func,off) \
(rc32434_pci->pcicfga = (0x80000000 | ((slot)<<11) | \
((func)<<8) | (off)))
static int config_access(unsigned char access_type, struct pci_bus *bus,
unsigned int devfn, unsigned char where,
u32 * data)
{
/*
* config cycles are on 4 byte boundary only
*/
unsigned int slot = PCI_SLOT(devfn);
u8 func = PCI_FUNC(devfn);
if (slot < 2 || slot > 15) {
*data = 0xFFFFFFFF;
return -1;
}
/* Setup address */
PCI_CFG_SET(slot, func, where);
rc32434_sync();
if (access_type == PCI_ACCESS_WRITE) {
rc32434_sync();
rc32434_pci->pcicfgd = *data;
} else {
rc32434_sync();
*data = rc32434_pci->pcicfgd;
}
rc32434_sync();
return 0;
}
/*
* We can't address 8 and 16 bit words directly. Instead we have to
* read/write a 32bit word and mask/modify the data we actually want.
*/
static int read_config_byte(struct pci_bus *bus, unsigned int devfn,
int where, u8 * val)
{
u32 data;
int ret;
ret = config_access(PCI_ACCESS_READ, bus, devfn, where, &data);
*val = (data >> ((where & 3) << 3)) & 0xff;
return ret;
}
static int read_config_word(struct pci_bus *bus, unsigned int devfn,
int where, u16 * val)
{
u32 data;
int ret;
ret = config_access(PCI_ACCESS_READ, bus, devfn, where, &data);
*val = (data >> ((where & 3) << 3)) & 0xffff;
return ret;
}
static int read_config_dword(struct pci_bus *bus, unsigned int devfn,
int where, u32 * val)
{
int ret;
ret = config_access(PCI_ACCESS_READ, bus, devfn, where, val);
return ret;
}
static int
write_config_byte(struct pci_bus *bus, unsigned int devfn, int where,
u8 val)
{
u32 data = 0;
if (config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
return -1;
data = (data & ~(0xff << ((where & 3) << 3))) |
(val << ((where & 3) << 3));
if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data))
return -1;
return PCIBIOS_SUCCESSFUL;
}
static int
write_config_word(struct pci_bus *bus, unsigned int devfn, int where,
u16 val)
{
u32 data = 0;
if (config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
return -1;
data = (data & ~(0xffff << ((where & 3) << 3))) |
(val << ((where & 3) << 3));
if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data))
return -1;
return PCIBIOS_SUCCESSFUL;
}
static int
write_config_dword(struct pci_bus *bus, unsigned int devfn, int where,
u32 val)
{
if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &val))
return -1;
return PCIBIOS_SUCCESSFUL;
}
static int pci_config_read(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 * val)
{
switch (size) {
case 1:
return read_config_byte(bus, devfn, where, (u8 *) val);
case 2:
return read_config_word(bus, devfn, where, (u16 *) val);
default:
return read_config_dword(bus, devfn, where, val);
}
}
static int pci_config_write(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 val)
{
switch (size) {
case 1:
return write_config_byte(bus, devfn, where, (u8) val);
case 2:
return write_config_word(bus, devfn, where, (u16) val);
default:
return write_config_dword(bus, devfn, where, val);
}
}
struct pci_ops rc32434_pci_ops = {
.read = pci_config_read,
.write = pci_config_write,
};

235
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/**************************************************************************
*
* BRIEF MODULE DESCRIPTION
* PCI initialization for IDT EB434 board
*
* Copyright 2004 IDT Inc. (rischelp@idt.com)
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
*
**************************************************************************
* May 2004 rkt, neb
*
* Initial Release
*
*
*
**************************************************************************
*/
#include <linux/autoconf.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/idt-boards/rc32434/rc32434.h>
#include <asm/idt-boards/rc32434/rc32434_pci.h>
#define PCI_ACCESS_READ 0
#define PCI_ACCESS_WRITE 1
#undef DEBUG
#ifdef DEBUG
#define DBG(x...) printk(x)
#else
#define DBG(x...)
#endif
/* define an unsigned array for the PCI registers */
unsigned int korinaCnfgRegs[25] = {
KORINA_CNFG1, KORINA_CNFG2, KORINA_CNFG3, KORINA_CNFG4,
KORINA_CNFG5, KORINA_CNFG6, KORINA_CNFG7, KORINA_CNFG8,
KORINA_CNFG9, KORINA_CNFG10, KORINA_CNFG11, KORINA_CNFG12,
KORINA_CNFG13, KORINA_CNFG14, KORINA_CNFG15, KORINA_CNFG16,
KORINA_CNFG17, KORINA_CNFG18, KORINA_CNFG19, KORINA_CNFG20,
KORINA_CNFG21, KORINA_CNFG22, KORINA_CNFG23, KORINA_CNFG24
};
static struct resource rc32434_res_pci_mem2;
static struct resource rc32434_res_pci_mem1 = {
.name = "PCI MEM1",
.start = 0x50000000,
.end = 0x5FFFFFFF,
.flags = IORESOURCE_MEM,
.child = &rc32434_res_pci_mem2,
};
static struct resource rc32434_res_pci_mem2 = {
.name = "PCI MEM2",
.start = 0x60000000,
.end = 0x6FFFFFFF,
.flags = IORESOURCE_MEM,
.parent = &rc32434_res_pci_mem1,
};
static struct resource rc32434_res_pci_io1 = {
.name = "PCI I/O1",
.start = 0x18800000,
.end = 0x188FFFFF,
.flags = IORESOURCE_IO,
};
extern struct pci_ops rc32434_pci_ops;
struct pci_controller rc32434_controller = {
.pci_ops = &rc32434_pci_ops,
.mem_resource = &rc32434_res_pci_mem1,
.io_resource = &rc32434_res_pci_io1,
.mem_offset = 0x00000000UL,
.io_offset = 0x00000000UL,
};
extern unsigned int arch_has_pci;
static int __init rc32434_pcibridge_init(void)
{
unsigned int pciConfigAddr = 0;/*used for writing pci config values */
int loopCount=0 ;/*used for the loop */
unsigned int pcicValue, pcicData=0;
unsigned int dummyRead, pciCntlVal = 0;
if (!arch_has_pci) return 0;
printk("PCI: Initializing PCI\n");
/* Disable the IP bus error for PCI scaning */
pciCntlVal=rc32434_pci->pcic;
pciCntlVal &= 0xFFFFFF7;
rc32434_pci->pcic = pciCntlVal;
ioport_resource.start = rc32434_res_pci_io1.start;
ioport_resource.end = rc32434_res_pci_io1.end;
/*
iomem_resource.start = rc32434_res_pci_mem1.start;
iomem_resource.end = rc32434_res_pci_mem1.end;
*/
pcicValue = rc32434_pci->pcic;
pcicValue = (pcicValue >> PCIM_SHFT) & PCIM_BIT_LEN;
if (!((pcicValue == PCIM_H_EA) ||
(pcicValue == PCIM_H_IA_FIX) ||
(pcicValue == PCIM_H_IA_RR))) {
/* Not in Host Mode, return ERROR */
return -1;
}
/* Enables the Idle Grant mode, Arbiter Parking */
pcicData |=(PCIC_igm_m|PCIC_eap_m|PCIC_en_m);
rc32434_pci->pcic = pcicData; /* Enable the PCI bus Interface */
/* Zero out the PCI status & PCI Status Mask */
for(;;) {
pcicData = rc32434_pci->pcis;
if (!(pcicData & PCIS_rip_m))
break;
}
rc32434_pci->pcis = 0;
rc32434_pci->pcism = 0xFFFFFFFF;
/* Zero out the PCI decoupled registers */
rc32434_pci->pcidac=0; /* disable PCI decoupled accesses at initialization */
rc32434_pci->pcidas=0; /* clear the status */
rc32434_pci->pcidasm=0x0000007F; /* Mask all the interrupts */
/* Mask PCI Messaging Interrupts */
rc32434_pci_msg->pciiic = 0;
rc32434_pci_msg->pciiim = 0xFFFFFFFF;
rc32434_pci_msg->pciioic = 0;
rc32434_pci_msg->pciioim = 0;
/* Setup PCILB0 as Memory Window */
rc32434_pci->pcilba[0].a = (unsigned int) (PCI_ADDR_START);
/* setup the PCI map address as same as the local address */
rc32434_pci->pcilba[0].m = (unsigned int) (PCI_ADDR_START);
/* Setup PCILBA1 as MEM */
#ifdef __MIPSEB__
rc32434_pci->pcilba[0].c = ( ((SIZE_16MB & 0x1f) << PCILBAC_size_b) | PCILBAC_sb_m);
#else
rc32434_pci->pcilba[0].c = ( ((SIZE_16MB & 0x1f) << PCILBAC_size_b));
#endif
dummyRead = rc32434_pci->pcilba[0].c; /* flush the CPU write Buffers */
rc32434_pci->pcilba[1].a = 0x60000000;
rc32434_pci->pcilba[1].m = 0x60000000;
/* setup PCILBA2 as IO Window*/
#ifdef __MIPSEB__
rc32434_pci->pcilba[1].c = ( ((SIZE_256MB & 0x1f) << PCILBAC_size_b) | PCILBAC_sb_m);
#else
rc32434_pci->pcilba[1].c = ((SIZE_256MB & 0x1f) << PCILBAC_size_b);
#endif
dummyRead = rc32434_pci->pcilba[1].c; /* flush the CPU write Buffers */
rc32434_pci->pcilba[2].a = 0x18C00000;
rc32434_pci->pcilba[2].m = 0x18FFFFFF;
/* setup PCILBA2 as IO Window*/
#ifdef __MIPSEB__
rc32434_pci->pcilba[2].c = ( ((SIZE_4MB & 0x1f) << PCILBAC_size_b) | PCILBAC_sb_m);
#else
rc32434_pci->pcilba[2].c = ((SIZE_4MB & 0x1f) << PCILBAC_size_b);
#endif
dummyRead = rc32434_pci->pcilba[2].c; /* flush the CPU write Buffers */
rc32434_pci->pcilba[3].a = 0x18800000;
rc32434_pci->pcilba[3].m = 0x18800000;
/* Setup PCILBA3 as IO Window */
#ifdef __MIPSEB__
rc32434_pci->pcilba[3].c = ( (((SIZE_1MB & 0x1ff) << PCILBAC_size_b) | PCILBAC_msi_m) | PCILBAC_sb_m);
#else
rc32434_pci->pcilba[3].c = (((SIZE_1MB & 0x1ff) << PCILBAC_size_b) | PCILBAC_msi_m);
#endif
dummyRead = rc32434_pci->pcilba[2].c; /* flush the CPU write Buffers */
pciConfigAddr = (unsigned int)(0x80000004);
for(loopCount = 0; loopCount < 24; loopCount++){
rc32434_pci->pcicfga = pciConfigAddr;
dummyRead = rc32434_pci->pcicfga;
rc32434_pci->pcicfgd = korinaCnfgRegs[loopCount];
dummyRead=rc32434_pci->pcicfgd;
pciConfigAddr += 4;
}
rc32434_pci->pcitc=(unsigned int)((PCITC_RTIMER_VAL&0xff) << PCITC_rtimer_b) |
((PCITC_DTIMER_VAL&0xff)<<PCITC_dtimer_b);
pciCntlVal = rc32434_pci->pcic;
pciCntlVal &= ~(PCIC_tnr_m);
rc32434_pci->pcic = pciCntlVal;
pciCntlVal = rc32434_pci->pcic;
register_pci_controller(&rc32434_controller);
rc32434_sync();
return 0;
}
arch_initcall(rc32434_pcibridge_init);
/* Do platform specific device initialization at pci_enable_device() time */
int pcibios_plat_dev_init(struct pci_dev *dev)
{
return 0;
}