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make openwrt boot on ar9130 (currently no ethernet yet)
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@12463 3c298f89-4303-0410-b956-a3cf2f4a3e73
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@@ -103,14 +103,21 @@ extern u32 ar71xx_ddr_freq;
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#define PLL_REG_ETH_EXT_CLK 0x18
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#define PLL_REG_PCI_CLK 0x1c
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#define PLL_DIV_SHIFT 3
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#define PLL_DIV_MASK 0x1f
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#define CPU_DIV_SHIFT 16
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#define CPU_DIV_MASK 0x3
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#define DDR_DIV_SHIFT 18
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#define DDR_DIV_MASK 0x3
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#define AHB_DIV_SHIFT 20
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#define AHB_DIV_MASK 0x7
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#define AR71XX_PLL_DIV_SHIFT 3
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#define AR71XX_PLL_DIV_MASK 0x1f
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#define AR71XX_CPU_DIV_SHIFT 16
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#define AR71XX_CPU_DIV_MASK 0x3
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#define AR71XX_DDR_DIV_SHIFT 18
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#define AR71XX_DDR_DIV_MASK 0x3
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#define AR71XX_AHB_DIV_SHIFT 20
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#define AR71XX_AHB_DIV_MASK 0x7
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#define AR91XX_PLL_DIV_SHIFT 0
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#define AR91XX_PLL_DIV_MASK 0x3ff
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#define AR91XX_DDR_DIV_SHIFT 22
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#define AR91XX_DDR_DIV_MASK 0x3
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#define AR91XX_AHB_DIV_SHIFT 19
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#define AR91XX_AHB_DIV_MASK 0x1
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extern void __iomem *ar71xx_pll_base;
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@@ -306,6 +313,7 @@ extern void ar71xx_ddr_flush(u32 reg);
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#define REV_ID_CHIP_AR7130 0xa0
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#define REV_ID_CHIP_AR7141 0xa1
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#define REV_ID_CHIP_AR7161 0xa2
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#define REV_ID_CHIP_AR9130 0xb0
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#define REV_ID_REVISION_MASK 0x3
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#define REV_ID_REVISION_SHIFT 2
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