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mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2025-04-21 12:27:27 +03:00

add diag and switch support for brcm47xx-2.6

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@6562 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
nbd
2007-03-14 01:19:24 +00:00
parent 4339c8d6f9
commit c7a59f885d
8 changed files with 212 additions and 71 deletions

View File

@@ -1,5 +1,77 @@
#ifndef __DIAG_GPIO_H
#define __DIAG_GPIO_H
#include <linux/interrupt.h>
#ifndef BCMDRIVER
#include <linux/ssb/ssb.h>
#include <linux/ssb/ssb_driver_chipcommon.h>
#include <linux/ssb/ssb_driver_extif.h>
extern struct ssb_bus ssb;
#define gpio_op(op, param...) \
do { \
if (ssb.chipco.dev) \
return ssb_chipco_gpio_##op(&ssb.chipco, param); \
else if (ssb.extif.dev) \
return ssb_extif_gpio_##op(&ssb.extif, param); \
else \
return 0; \
} while (0);
static inline u32 gpio_in(void)
{
gpio_op(in, ~0);
}
static inline u32 gpio_out(u32 mask, u32 value)
{
gpio_op(out, mask, value);
}
static inline u32 gpio_outen(u32 mask, u32 value)
{
gpio_op(outen, mask, value);
}
static inline u32 gpio_control(u32 mask, u32 value)
{
if (ssb.chipco.dev)
return ssb_chipco_gpio_control(&ssb.chipco, mask, value);
else
return 0;
}
static inline u32 gpio_intmask(u32 mask, u32 value)
{
gpio_op(intmask, mask, value);
}
static inline u32 gpio_intpolarity(u32 mask, u32 value)
{
gpio_op(polarity, mask, value);
}
static void gpio_set_irqenable(int enabled, irqreturn_t (*handler)(int, void *, struct pt_regs *))
{
int irq;
if (ssb.chipco.dev)
irq = ssb_mips_irq(ssb.chipco.dev) + 2;
else if (ssb.extif.dev)
irq = ssb_mips_irq(ssb.extif.dev) + 2;
else return;
if (enabled)
request_irq(irq, handler, SA_SHIRQ | SA_SAMPLE_RANDOM, "gpio", handler);
else
free_irq(irq, handler);
gpio_intmask(1, (enabled ? 1 : 0));
}
#else
#include <typedefs.h>
#include <osl.h>
@@ -18,13 +90,6 @@
#define sbh_lock bcm947xx_sbh_lock
#endif
#define EXTIF_ADDR 0x1f000000
#define EXTIF_UART (EXTIF_ADDR + 0x00800000)
#define GPIO_TYPE_NORMAL (0x0 << 24)
#define GPIO_TYPE_EXTIF (0x1 << 24)
#define GPIO_TYPE_MASK (0xf << 24)
extern void *sbh;
extern spinlock_t sbh_lock;
@@ -65,6 +130,15 @@ static void gpio_set_irqenable(int enabled, irqreturn_t (*handler)(int, void *,
spin_unlock_irqrestore(sbh_lock, flags);
}
#endif /* BCMDRIVER */
#define EXTIF_ADDR 0x1f000000
#define EXTIF_UART (EXTIF_ADDR + 0x00800000)
#define GPIO_TYPE_NORMAL (0x0 << 24)
#define GPIO_TYPE_EXTIF (0x1 << 24)
#define GPIO_TYPE_MASK (0xf << 24)
static inline void gpio_set_extif(int gpio, int value)
{
volatile u8 *addr = (volatile u8 *) KSEG1ADDR(EXTIF_UART) + (gpio & ~GPIO_TYPE_MASK);
@@ -74,5 +148,4 @@ static inline void gpio_set_extif(int gpio, int value)
*addr;
}
#endif
#endif /* __DIAG_GPIO_H */