mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2025-04-21 12:27:27 +03:00
Upgrade to Linux 2.6.19
- Includes large parts of the patch from #1021 by dpalffy - Includes RB532 NAND driver changes by n0-1 git-svn-id: svn://svn.openwrt.org/openwrt/trunk@5789 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
nbd
@@ -11,9 +11,9 @@ BOARD:=x86
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BOARDNAME:=x86
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FEATURES:=jffs2 ext2
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LINUX_VERSION:=2.6.17
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LINUX_VERSION:=2.6.19
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LINUX_RELEASE:=1
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LINUX_KERNEL_MD5SUM:=37ddefe96625502161f075b9d907f21e
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LINUX_KERNEL_MD5SUM:=443c265b57e87eadc0c677c3acc37e20
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include $(INCLUDE_DIR)/kernel-build.mk
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File diff suppressed because it is too large
Load Diff
437
target/linux/x86-2.6/config-diff
Normal file
437
target/linux/x86-2.6/config-diff
Normal file
@@ -0,0 +1,437 @@
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# CONFIG_3C515 is not set
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# CONFIG_60XX_WDT is not set
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CONFIG_8139TOO=m
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# CONFIG_8139TOO_8129 is not set
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CONFIG_8139TOO_PIO=y
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# CONFIG_8139TOO_TUNE_TWISTER is not set
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||||
# CONFIG_8139_OLD_RX_RESET is not set
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||||
# CONFIG_AC3200 is not set
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||||
# CONFIG_ACPI is not set
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||||
# CONFIG_ACQUIRE_WDT is not set
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||||
# CONFIG_ADVANTECH_WDT is not set
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||||
# CONFIG_AGP is not set
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||||
# CONFIG_ALIM1535_WDT is not set
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||||
# CONFIG_ALIM7101_WDT is not set
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||||
# CONFIG_APRICOT is not set
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CONFIG_ARCH_MAY_HAVE_PC_FDC=y
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CONFIG_ARCH_POPULATES_NODE_MAP=y
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CONFIG_ARCH_SELECT_MEMORY_MODEL=y
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CONFIG_ARCH_SPARSEMEM_ENABLE=y
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# CONFIG_ARLAN is not set
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||||
# CONFIG_AT1700 is not set
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# CONFIG_B44 is not set
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CONFIG_BASE_SMALL=0
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# CONFIG_BINFMT_AOUT is not set
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# CONFIG_BLK_DEV_AEC62XX is not set
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# CONFIG_BLK_DEV_ALI15X3 is not set
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||||
# CONFIG_BLK_DEV_AMD74XX is not set
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# CONFIG_BLK_DEV_ATIIXP is not set
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# CONFIG_BLK_DEV_CMD640 is not set
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# CONFIG_BLK_DEV_CMD64X is not set
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# CONFIG_BLK_DEV_CS5520 is not set
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# CONFIG_BLK_DEV_CS5530 is not set
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# CONFIG_BLK_DEV_CS5535 is not set
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# CONFIG_BLK_DEV_CY82C693 is not set
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# CONFIG_BLK_DEV_FD is not set
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CONFIG_BLK_DEV_GENERIC=y
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# CONFIG_BLK_DEV_HD is not set
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# CONFIG_BLK_DEV_HD_IDE is not set
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# CONFIG_BLK_DEV_HPT34X is not set
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# CONFIG_BLK_DEV_HPT366 is not set
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CONFIG_BLK_DEV_IDE=y
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# CONFIG_BLK_DEV_IDECD is not set
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# CONFIG_BLK_DEV_IDECS is not set
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CONFIG_BLK_DEV_IDEDISK=y
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CONFIG_BLK_DEV_IDEDMA=y
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# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
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CONFIG_BLK_DEV_IDEDMA_PCI=y
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# CONFIG_BLK_DEV_IDEFLOPPY is not set
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CONFIG_BLK_DEV_IDEPCI=y
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# CONFIG_BLK_DEV_IDEPNP is not set
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# CONFIG_BLK_DEV_IDESCSI is not set
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# CONFIG_BLK_DEV_IDETAPE is not set
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# CONFIG_BLK_DEV_IDE_SATA is not set
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# CONFIG_BLK_DEV_IT821X is not set
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# CONFIG_BLK_DEV_JMICRON is not set
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# CONFIG_BLK_DEV_NS87415 is not set
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# CONFIG_BLK_DEV_OFFBOARD is not set
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# CONFIG_BLK_DEV_OPTI621 is not set
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# CONFIG_BLK_DEV_PDC202XX_NEW is not set
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# CONFIG_BLK_DEV_PDC202XX_OLD is not set
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# CONFIG_BLK_DEV_PIIX is not set
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# CONFIG_BLK_DEV_RZ1000 is not set
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CONFIG_BLK_DEV_SC1200=y
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# CONFIG_BLK_DEV_SIIMAGE is not set
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# CONFIG_BLK_DEV_SIS5513 is not set
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# CONFIG_BLK_DEV_SLC90E66 is not set
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# CONFIG_BLK_DEV_SVWKS is not set
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# CONFIG_BLK_DEV_TRIFLEX is not set
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# CONFIG_BLK_DEV_TRM290 is not set
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CONFIG_BLK_DEV_VIA82CXXX=y
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# CONFIG_BLK_DEV_XD is not set
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# CONFIG_CD_NO_IDESCSI is not set
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CONFIG_COMPAT_VDSO=y
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# CONFIG_CPU5_WDT is not set
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CONFIG_CPU_FREQ=y
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# CONFIG_CPU_FREQ_DEBUG is not set
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CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
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# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
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# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
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# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set
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CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
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# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
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# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
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CONFIG_CPU_FREQ_STAT=y
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CONFIG_CPU_FREQ_STAT_DETAILS=y
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CONFIG_CPU_FREQ_TABLE=y
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CONFIG_CRYPTO_AES_586=m
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# CONFIG_CRYPTO_DEV_PADLOCK is not set
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CONFIG_CRYPTO_TWOFISH_586=m
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# CONFIG_CS5535_GPIO is not set
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# CONFIG_CS89x0 is not set
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# CONFIG_DCDBAS is not set
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# CONFIG_DEBUG_BUGVERBOSE is not set
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# CONFIG_DELL_RBU is not set
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# CONFIG_DEPCA is not set
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# CONFIG_DMASCC is not set
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CONFIG_DMI=y
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CONFIG_DOUBLEFAULT=y
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CONFIG_EARLY_PRINTK=y
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# CONFIG_EDAC is not set
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# CONFIG_EDD is not set
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# CONFIG_EISA is not set
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# CONFIG_EL1 is not set
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# CONFIG_EL16 is not set
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# CONFIG_EL2 is not set
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# CONFIG_EL3 is not set
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# CONFIG_ELPLUS is not set
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# CONFIG_EUROTECH_WDT is not set
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CONFIG_EXT2_FS=y
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# CONFIG_FIRMWARE_EDID is not set
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CONFIG_FS_POSIX_ACL=y
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# CONFIG_FTAPE is not set
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CONFIG_GENERIC_IOMAP=y
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CONFIG_GENERIC_ISA_DMA=y
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# CONFIG_HANGCHECK_TIMER is not set
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# CONFIG_HIGHMEM4G is not set
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# CONFIG_HIGHMEM64G is not set
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# CONFIG_HPET_TIMER is not set
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# CONFIG_HUGETLBFS is not set
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CONFIG_HW_RANDOM=y
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# CONFIG_HW_RANDOM_AMD is not set
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CONFIG_HW_RANDOM_GEODE=y
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# CONFIG_HW_RANDOM_INTEL is not set
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CONFIG_HW_RANDOM_VIA=y
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CONFIG_HZ=100
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CONFIG_HZ_100=y
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# CONFIG_HZ_250 is not set
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CONFIG_I2C=m
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CONFIG_I2C_ALGOBIT=m
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# CONFIG_I2C_ALGOPCA is not set
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# CONFIG_I2C_ALGOPCF is not set
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# CONFIG_I2C_ALI1535 is not set
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# CONFIG_I2C_ALI1563 is not set
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# CONFIG_I2C_ALI15X3 is not set
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# CONFIG_I2C_AMD756 is not set
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# CONFIG_I2C_AMD8111 is not set
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CONFIG_I2C_CHARDEV=m
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# CONFIG_I2C_DEBUG_ALGO is not set
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# CONFIG_I2C_DEBUG_BUS is not set
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# CONFIG_I2C_DEBUG_CHIP is not set
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# CONFIG_I2C_DEBUG_CORE is not set
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# CONFIG_I2C_ELEKTOR is not set
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# CONFIG_I2C_I801 is not set
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# CONFIG_I2C_I810 is not set
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# CONFIG_I2C_NFORCE2 is not set
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# CONFIG_I2C_OCORES is not set
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# CONFIG_I2C_PARPORT_LIGHT is not set
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# CONFIG_I2C_PCA_ISA is not set
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# CONFIG_I2C_PIIX4 is not set
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# CONFIG_I2C_PROSAVAGE is not set
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# CONFIG_I2C_SAVAGE4 is not set
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# CONFIG_I2C_SIS5595 is not set
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# CONFIG_I2C_SIS630 is not set
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# CONFIG_I2C_SIS96X is not set
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# CONFIG_I2C_STUB is not set
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# CONFIG_I2C_VIA is not set
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# CONFIG_I2C_VIAPRO is not set
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# CONFIG_I2C_VOODOO3 is not set
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# CONFIG_I6300ESB_WDT is not set
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# CONFIG_I82365 is not set
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# CONFIG_I8K is not set
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# CONFIG_I8XX_TCO is not set
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# CONFIG_IB700_WDT is not set
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# CONFIG_IBMASR is not set
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# CONFIG_IBM_ASM is not set
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CONFIG_IDE=y
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# CONFIG_IDEDISK_MULTI_MODE is not set
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CONFIG_IDEDMA_AUTO=y
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# CONFIG_IDEDMA_IVB is not set
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# CONFIG_IDEDMA_ONLYDISK is not set
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CONFIG_IDEDMA_PCI_AUTO=y
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CONFIG_IDEPCI_SHARE_IRQ=y
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# CONFIG_IDE_ARM is not set
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# CONFIG_IDE_CHIPSETS is not set
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CONFIG_IDE_GENERIC=y
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CONFIG_IDE_MAX_HWIFS=4
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# CONFIG_IDE_TASK_IOCTL is not set
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CONFIG_INITRAMFS_ROOT_GID=0
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CONFIG_INITRAMFS_ROOT_UID=0
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CONFIG_INITRAMFS_SOURCE=""
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CONFIG_ISA=y
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CONFIG_ISAPNP=y
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CONFIG_ISA_DMA_API=y
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# CONFIG_ITCO_WDT is not set
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CONFIG_JFFS2_FS_DEBUG=0
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# CONFIG_KEXEC is not set
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CONFIG_KTIME_SCALAR=y
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# CONFIG_LANCE is not set
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CONFIG_LEDS_NET48XX=m
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# CONFIG_LEDS_TRIGGER_IDE_DISK is not set
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# CONFIG_M386 is not set
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CONFIG_M486=y
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# CONFIG_M586 is not set
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# CONFIG_M586MMX is not set
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# CONFIG_M586TSC is not set
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# CONFIG_M686 is not set
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# CONFIG_MACHZ_WDT is not set
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# CONFIG_MATH_EMULATION is not set
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# CONFIG_MCA is not set
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# CONFIG_MCRUSOE is not set
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# CONFIG_MCYRIXIII is not set
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# CONFIG_MEFFICEON is not set
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# CONFIG_MGEODEGX1 is not set
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# CONFIG_MGEODE_LX is not set
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# CONFIG_MICROCODE is not set
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CONFIG_MINI_FO=m
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# CONFIG_MIXCOMWD is not set
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# CONFIG_MK6 is not set
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# CONFIG_MK7 is not set
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# CONFIG_MK8 is not set
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# CONFIG_MPENTIUM4 is not set
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# CONFIG_MPENTIUMII is not set
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# CONFIG_MPENTIUMIII is not set
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# CONFIG_MPENTIUMM is not set
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CONFIG_MTD=y
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# CONFIG_MTD_ABSENT is not set
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CONFIG_MTD_BLOCK=y
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CONFIG_MTD_BLOCK2MTD=y
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# CONFIG_MTD_CFI is not set
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CONFIG_MTD_CFI_I1=y
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CONFIG_MTD_CFI_I2=y
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# CONFIG_MTD_CFI_I4 is not set
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# CONFIG_MTD_CFI_I8 is not set
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CONFIG_MTD_CHAR=y
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# CONFIG_MTD_CMDLINE_PARTS is not set
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# CONFIG_MTD_COMPLEX_MAPPINGS is not set
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# CONFIG_MTD_CONCAT is not set
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# CONFIG_MTD_DEBUG is not set
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# CONFIG_MTD_DOC2000 is not set
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# CONFIG_MTD_DOC2001 is not set
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# CONFIG_MTD_DOC2001PLUS is not set
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# CONFIG_MTD_JEDECPROBE is not set
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CONFIG_MTD_MAP_BANK_WIDTH_1=y
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# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
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||||
CONFIG_MTD_MAP_BANK_WIDTH_2=y
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# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
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CONFIG_MTD_MAP_BANK_WIDTH_4=y
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# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
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# CONFIG_MTD_MTDRAM is not set
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# CONFIG_MTD_NAND is not set
|
||||
# CONFIG_MTD_OBSOLETE_CHIPS is not set
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||||
# CONFIG_MTD_ONENAND is not set
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CONFIG_MTD_PARTITIONS=y
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# CONFIG_MTD_PHRAM is not set
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||||
# CONFIG_MTD_PLATRAM is not set
|
||||
# CONFIG_MTD_PMC551 is not set
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||||
# CONFIG_MTD_RAM is not set
|
||||
# CONFIG_MTD_REDBOOT_PARTS is not set
|
||||
# CONFIG_MTD_ROM is not set
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||||
# CONFIG_MTD_SLRAM is not set
|
||||
# CONFIG_MTD_TS5500 is not set
|
||||
# CONFIG_MTRR is not set
|
||||
# CONFIG_MVIAC3_2 is not set
|
||||
# CONFIG_MWAVE is not set
|
||||
# CONFIG_MWINCHIP2 is not set
|
||||
# CONFIG_MWINCHIP3D is not set
|
||||
# CONFIG_MWINCHIPC6 is not set
|
||||
CONFIG_NATSEMI=m
|
||||
CONFIG_NE2K_PCI=m
|
||||
# CONFIG_NET_ISA is not set
|
||||
# CONFIG_NET_SB1000 is not set
|
||||
CONFIG_NET_VENDOR_3COM=y
|
||||
# CONFIG_NET_VENDOR_RACAL is not set
|
||||
# CONFIG_NET_VENDOR_SMC is not set
|
||||
CONFIG_NOHIGHMEM=y
|
||||
CONFIG_NSC_GPIO=m
|
||||
CONFIG_NVRAM=y
|
||||
CONFIG_PAGE_OFFSET=0xC0000000
|
||||
# CONFIG_PC8736x_GPIO is not set
|
||||
# CONFIG_PCIEPORTBUS is not set
|
||||
# CONFIG_PCIPCWATCHDOG is not set
|
||||
CONFIG_PCI_BIOS=y
|
||||
CONFIG_PCI_DIRECT=y
|
||||
CONFIG_PCI_GOANY=y
|
||||
# CONFIG_PCI_GOBIOS is not set
|
||||
# CONFIG_PCI_GODIRECT is not set
|
||||
# CONFIG_PCI_GOMMCONFIG is not set
|
||||
CONFIG_PCMCIA_ATMEL=m
|
||||
CONFIG_PCMCIA_PROBE=y
|
||||
# CONFIG_PCWATCHDOG is not set
|
||||
CONFIG_PHYSICAL_START=0x100000
|
||||
# CONFIG_PM is not set
|
||||
CONFIG_PNP=y
|
||||
# CONFIG_PNPBIOS is not set
|
||||
# CONFIG_PNP_DEBUG is not set
|
||||
# CONFIG_REGPARM is not set
|
||||
CONFIG_RTC=y
|
||||
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
|
||||
# CONFIG_SBC8360_WDT is not set
|
||||
# CONFIG_SBC_EPX_C3_WATCHDOG is not set
|
||||
CONFIG_SC1200_WDT=m
|
||||
# CONFIG_SC520_WDT is not set
|
||||
# CONFIG_SCC is not set
|
||||
# CONFIG_SCSI_7000FASST is not set
|
||||
# CONFIG_SCSI_ADVANSYS is not set
|
||||
# CONFIG_SCSI_AHA152X is not set
|
||||
# CONFIG_SCSI_AHA1542 is not set
|
||||
# CONFIG_SCSI_BUSLOGIC is not set
|
||||
# CONFIG_SCSI_DTC3280 is not set
|
||||
# CONFIG_SCSI_EATA is not set
|
||||
# CONFIG_SCSI_GDTH is not set
|
||||
# CONFIG_SCSI_GENERIC_NCR5380 is not set
|
||||
# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set
|
||||
# CONFIG_SCSI_IN2000 is not set
|
||||
# CONFIG_SCSI_NCR53C406A is not set
|
||||
# CONFIG_SCSI_PAS16 is not set
|
||||
# CONFIG_SCSI_PSI240I is not set
|
||||
# CONFIG_SCSI_QLOGIC_FAS is not set
|
||||
# CONFIG_SCSI_SYM53C416 is not set
|
||||
# CONFIG_SCSI_T128 is not set
|
||||
# CONFIG_SCSI_U14_34F is not set
|
||||
# CONFIG_SCSI_ULTRASTOR is not set
|
||||
CONFIG_SCx200=y
|
||||
CONFIG_SCx200HR_TIMER=y
|
||||
CONFIG_SCx200_ACB=m
|
||||
CONFIG_SCx200_GPIO=m
|
||||
CONFIG_SCx200_I2C=m
|
||||
CONFIG_SCx200_I2C_SCL=12
|
||||
CONFIG_SCx200_I2C_SDA=13
|
||||
CONFIG_SCx200_WDT=m
|
||||
# CONFIG_SECCOMP is not set
|
||||
CONFIG_SEMAPHORE_SLEEPERS=y
|
||||
# CONFIG_SENSORS_DS1337 is not set
|
||||
# CONFIG_SENSORS_DS1374 is not set
|
||||
# CONFIG_SENSORS_EEPROM is not set
|
||||
# CONFIG_SENSORS_MAX6875 is not set
|
||||
# CONFIG_SENSORS_PCA9539 is not set
|
||||
# CONFIG_SENSORS_PCF8574 is not set
|
||||
# CONFIG_SENSORS_PCF8591 is not set
|
||||
# CONFIG_SERIAL_8250_EXTENDED is not set
|
||||
# CONFIG_SERIAL_8250_PNP is not set
|
||||
# CONFIG_SMP is not set
|
||||
# CONFIG_SMSC37B787_WDT is not set
|
||||
# CONFIG_SND_AD1816A is not set
|
||||
# CONFIG_SND_AD1848 is not set
|
||||
# CONFIG_SND_ADLIB is not set
|
||||
# CONFIG_SND_ALS100 is not set
|
||||
# CONFIG_SND_ALS4000 is not set
|
||||
# CONFIG_SND_AZT2320 is not set
|
||||
# CONFIG_SND_CMI8330 is not set
|
||||
# CONFIG_SND_CS4231 is not set
|
||||
# CONFIG_SND_CS4232 is not set
|
||||
# CONFIG_SND_CS4236 is not set
|
||||
# CONFIG_SND_CS5535AUDIO is not set
|
||||
# CONFIG_SND_DT019X is not set
|
||||
# CONFIG_SND_ES1688 is not set
|
||||
# CONFIG_SND_ES18XX is not set
|
||||
# CONFIG_SND_ES968 is not set
|
||||
# CONFIG_SND_GUSCLASSIC is not set
|
||||
# CONFIG_SND_GUSEXTREME is not set
|
||||
# CONFIG_SND_GUSMAX is not set
|
||||
# CONFIG_SND_INTERWAVE is not set
|
||||
# CONFIG_SND_INTERWAVE_STB is not set
|
||||
# CONFIG_SND_MIRO is not set
|
||||
# CONFIG_SND_OPL3SA2 is not set
|
||||
# CONFIG_SND_OPTI92X_AD1848 is not set
|
||||
# CONFIG_SND_OPTI92X_CS4231 is not set
|
||||
# CONFIG_SND_OPTI93X is not set
|
||||
# CONFIG_SND_RTCTIMER is not set
|
||||
# CONFIG_SND_SB16 is not set
|
||||
# CONFIG_SND_SB8 is not set
|
||||
# CONFIG_SND_SBAWE is not set
|
||||
# CONFIG_SND_SGALAXY is not set
|
||||
# CONFIG_SND_SSCAPE is not set
|
||||
# CONFIG_SND_USB_USX2Y is not set
|
||||
# CONFIG_SND_WAVEFRONT is not set
|
||||
CONFIG_SOFT_WATCHDOG=m
|
||||
CONFIG_SPARSEMEM_STATIC=y
|
||||
# CONFIG_TCIC is not set
|
||||
# CONFIG_TELCLOCK is not set
|
||||
# CONFIG_TOSHIBA is not set
|
||||
# CONFIG_TYPHOON is not set
|
||||
CONFIG_UID16=y
|
||||
# CONFIG_UNUSED_SYMBOLS is not set
|
||||
# CONFIG_UNWIND_INFO is not set
|
||||
# CONFIG_USBPCWATCHDOG is not set
|
||||
CONFIG_USB_EHCI_HCD=m
|
||||
# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
|
||||
# CONFIG_USB_EHCI_SPLIT_ISO is not set
|
||||
# CONFIG_USB_EHCI_TT_NEWSCHED is not set
|
||||
# CONFIG_USB_STORAGE_ISD200 is not set
|
||||
CONFIG_USB_UHCI_HCD=m
|
||||
CONFIG_VIA_RHINE=m
|
||||
# CONFIG_VIA_RHINE_MMIO is not set
|
||||
CONFIG_VIA_RHINE_NAPI=y
|
||||
# CONFIG_VM86 is not set
|
||||
# CONFIG_VMSPLIT_1G is not set
|
||||
# CONFIG_VMSPLIT_2G is not set
|
||||
CONFIG_VMSPLIT_3G=y
|
||||
# CONFIG_VMSPLIT_3G_OPT is not set
|
||||
CONFIG_VORTEX=m
|
||||
# CONFIG_W83627HF_WDT is not set
|
||||
# CONFIG_W83697HF_WDT is not set
|
||||
# CONFIG_W83877F_WDT is not set
|
||||
# CONFIG_W83977F_WDT is not set
|
||||
# CONFIG_WAFER_WDT is not set
|
||||
# CONFIG_WAVELAN is not set
|
||||
# CONFIG_WDT is not set
|
||||
CONFIG_X86=y
|
||||
CONFIG_X86_32=y
|
||||
CONFIG_X86_ALIGNMENT_16=y
|
||||
# CONFIG_X86_BIGSMP is not set
|
||||
CONFIG_X86_BIOS_REBOOT=y
|
||||
CONFIG_X86_BSWAP=y
|
||||
CONFIG_X86_CMPXCHG=y
|
||||
# CONFIG_X86_CPUFREQ_NFORCE2 is not set
|
||||
# CONFIG_X86_CPUID is not set
|
||||
# CONFIG_X86_ELAN is not set
|
||||
# CONFIG_X86_ES7000 is not set
|
||||
CONFIG_X86_F00F_BUG=y
|
||||
# CONFIG_X86_GENERIC is not set
|
||||
# CONFIG_X86_GENERICARCH is not set
|
||||
CONFIG_X86_GX_SUSPMOD=m
|
||||
CONFIG_X86_INVLPG=y
|
||||
CONFIG_X86_L1_CACHE_SHIFT=4
|
||||
# CONFIG_X86_LONGRUN is not set
|
||||
# CONFIG_X86_MCE is not set
|
||||
# CONFIG_X86_MSR is not set
|
||||
# CONFIG_X86_NUMAQ is not set
|
||||
# CONFIG_X86_P4_CLOCKMOD is not set
|
||||
CONFIG_X86_PC=y
|
||||
CONFIG_X86_POPAD_OK=y
|
||||
# CONFIG_X86_POWERNOW_K6 is not set
|
||||
# CONFIG_X86_POWERNOW_K7 is not set
|
||||
# CONFIG_X86_POWERNOW_K8 is not set
|
||||
CONFIG_X86_PPRO_FENCE=y
|
||||
# CONFIG_X86_REBOOTFIXUPS is not set
|
||||
# CONFIG_X86_SPEEDSTEP_CENTRINO is not set
|
||||
# CONFIG_X86_SPEEDSTEP_ICH is not set
|
||||
# CONFIG_X86_SPEEDSTEP_LIB is not set
|
||||
# CONFIG_X86_SPEEDSTEP_SMI is not set
|
||||
# CONFIG_X86_SUMMIT is not set
|
||||
# CONFIG_X86_UP_APIC is not set
|
||||
# CONFIG_X86_VISWS is not set
|
||||
# CONFIG_X86_VOYAGER is not set
|
||||
CONFIG_X86_WP_WORKS_OK=y
|
||||
CONFIG_X86_XADD=y
|
||||
@@ -1,320 +0,0 @@
|
||||
SCx200 High Resolution Timer Patch for Linux 2.6
|
||||
http://www.gnusto.com/scx200-hr-timer.html
|
||||
|
||||
diff -Naurp linux-2.6.12-rc6.orig/arch/i386/Kconfig linux-2.6.12-rc6/arch/i386/Kconfig
|
||||
--- linux-2.6.12-rc6.orig/arch/i386/Kconfig 2005-06-07 14:56:02.000000000 +0100
|
||||
+++ linux-2.6.12-rc6/arch/i386/Kconfig 2005-06-07 16:43:19.000000000 +0100
|
||||
@@ -458,6 +458,17 @@ config HPET_EMULATE_RTC
|
||||
bool "Provide RTC interrupt"
|
||||
depends on HPET_TIMER && RTC=y
|
||||
|
||||
+config SCx200HR_TIMER
|
||||
+ bool "NatSemi SCx200 27MHz High-Resolution Timer Support"
|
||||
+ help
|
||||
+ Some of the AMD (formerly National Semiconductor) Geode
|
||||
+ processors, notably the SC1100, suffer from a buggy time
|
||||
+ stamp counter which causes them to lose time when the
|
||||
+ processor is sleeping. Enable this option to use the
|
||||
+ on-board 27Mz high-resolution timer to keep time instead.
|
||||
+ depends on (SCx200)
|
||||
+ default n
|
||||
+
|
||||
config SMP
|
||||
bool "Symmetric multi-processing support"
|
||||
---help---
|
||||
diff -Naurp linux-2.6.12-rc6.orig/arch/i386/kernel/scx200.c linux-2.6.12-rc6/arch/i386/kernel/scx200.c
|
||||
--- linux-2.6.12-rc6.orig/arch/i386/kernel/scx200.c 2005-06-07 14:56:02.000000000 +0100
|
||||
+++ linux-2.6.12-rc6/arch/i386/kernel/scx200.c 2005-06-07 16:43:19.000000000 +0100
|
||||
@@ -27,6 +27,10 @@ long scx200_gpio_shadow[2];
|
||||
|
||||
unsigned scx200_cb_base = 0;
|
||||
|
||||
+#ifdef CONFIG_SCx200HR_TIMER
|
||||
+extern void __devinit scx200hr_timer_enable(void);
|
||||
+#endif
|
||||
+
|
||||
static struct pci_device_id scx200_tbl[] = {
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_BRIDGE) },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE) },
|
||||
@@ -83,6 +87,9 @@ static int __devinit scx200_probe(struct
|
||||
printk(KERN_INFO NAME ": Configuration Block base 0x%x\n", scx200_cb_base);
|
||||
}
|
||||
|
||||
+#ifdef CONFIG_SCx200HR_TIMER
|
||||
+ scx200hr_timer_enable();
|
||||
+#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
diff -Naurp linux-2.6.12-rc6.orig/arch/i386/kernel/timers/Makefile linux-2.6.12-rc6/arch/i386/kernel/timers/Makefile
|
||||
--- linux-2.6.12-rc6.orig/arch/i386/kernel/timers/Makefile 2004-03-11 18:21:13.000000000 +0000
|
||||
+++ linux-2.6.12-rc6/arch/i386/kernel/timers/Makefile 2005-06-07 16:43:19.000000000 +0100
|
||||
@@ -5,5 +5,6 @@
|
||||
obj-y := timer.o timer_none.o timer_tsc.o timer_pit.o common.o
|
||||
|
||||
obj-$(CONFIG_X86_CYCLONE_TIMER) += timer_cyclone.o
|
||||
+obj-$(CONFIG_SCx200HR_TIMER) += timer_scx200hr.o
|
||||
obj-$(CONFIG_HPET_TIMER) += timer_hpet.o
|
||||
obj-$(CONFIG_X86_PM_TIMER) += timer_pm.o
|
||||
diff -Naurp linux-2.6.12-rc6.orig/arch/i386/kernel/timers/timer.c linux-2.6.12-rc6/arch/i386/kernel/timers/timer.c
|
||||
--- linux-2.6.12-rc6.orig/arch/i386/kernel/timers/timer.c 2004-12-26 14:07:37.000000000 +0000
|
||||
+++ linux-2.6.12-rc6/arch/i386/kernel/timers/timer.c 2005-06-07 16:43:19.000000000 +0100
|
||||
@@ -13,6 +13,9 @@
|
||||
#endif
|
||||
/* list of timers, ordered by preference, NULL terminated */
|
||||
static struct init_timer_opts* __initdata timers[] = {
|
||||
+#ifdef CONFIG_SCx200HR_TIMER
|
||||
+ &timer_scx200hr_init,
|
||||
+#endif
|
||||
#ifdef CONFIG_X86_CYCLONE_TIMER
|
||||
&timer_cyclone_init,
|
||||
#endif
|
||||
diff -Naurp linux-2.6.12-rc6.orig/arch/i386/kernel/timers/timer_scx200hr.c linux-2.6.12-rc6/arch/i386/kernel/timers/timer_scx200hr.c
|
||||
--- linux-2.6.12-rc6.orig/arch/i386/kernel/timers/timer_scx200hr.c 1970-01-01 01:00:00.000000000 +0100
|
||||
+++ linux-2.6.12-rc6/arch/i386/kernel/timers/timer_scx200hr.c 2005-06-07 16:43:19.000000000 +0100
|
||||
@@ -0,0 +1,220 @@
|
||||
+/*
|
||||
+ * Copyright (C) 2005 Ted Phelps
|
||||
+ *
|
||||
+ * This is a clock driver for the Geode SCx200's 27MHz high-resolution
|
||||
+ * timer as the system clock replacing its buggy time stamp counter.
|
||||
+ *
|
||||
+ * Based on parts of timer_hpet.c, timer_tsc.c and timer_pit.c.
|
||||
+ *
|
||||
+ * This program is free software; you can redistribute it and/or
|
||||
+ * modify it under the terms of the GNU General Public License as
|
||||
+ * published by the Free Software Foundation; either version 2 of the
|
||||
+ * License, or (at your option) any later version.
|
||||
+ */
|
||||
+
|
||||
+#include <asm/timer.h>
|
||||
+#include <linux/init.h>
|
||||
+#include <linux/pci.h>
|
||||
+#include <linux/seq_file.h>
|
||||
+#include <linux/scx200.h>
|
||||
+
|
||||
+#define NAME "scx200hr"
|
||||
+
|
||||
+/* Read the clock */
|
||||
+#define SCx200HR_CLOCK() inl(scx200_cb_base + SCx200_TIMER_OFFSET)
|
||||
+
|
||||
+/* High-resolution timer configuration address */
|
||||
+#define SCx200_TMCNFG_OFFSET (SCx200_TIMER_OFFSET + 5)
|
||||
+
|
||||
+/* Set this bit to disable the 27 MHz input clock */
|
||||
+#define HR_TM27MPD (1 << 2)
|
||||
+
|
||||
+/* Set this bit to update the count-up timer once per cycle of the
|
||||
+ * 27MHz timer, clear it to update the timer once every 27 cycles
|
||||
+ * (effectively producing a 1MHz counter) */
|
||||
+#define HR_TMCLKSEL (1 << 1)
|
||||
+
|
||||
+/* Set this bit to enable the high-resolution timer interrupt */
|
||||
+#define HR_TMEN (1 << 0)
|
||||
+
|
||||
+/* The frequency of the timer. Change this to 27000000 and set
|
||||
+ * HR_TMCLKSEL in scx200hr_enable to run at the faster clock rate. At
|
||||
+ * this point in time there is no point in doing so since times are
|
||||
+ * recorded in usec except for the monotonic clock, which is only used
|
||||
+ * by the hangcheck-timer. */
|
||||
+#define HR_FREQ 1000000
|
||||
+
|
||||
+/* The number of cycles of the high-resolution timer we expect to see
|
||||
+ * in a single tick. Note that the result is <<8 for greater precision*/
|
||||
+#define HR_CYCLES_PER_TICK \
|
||||
+ (SH_DIV(HR_FREQ / 1000000 * TICK_NSEC, 1000, 8))
|
||||
+
|
||||
+/* The number of cycles of the high-resolution timer we expect to see
|
||||
+ * in one microsecond, <<8 */
|
||||
+#define HR_CYCLES_PER_US ((HR_FREQ / 1000000) << 8)
|
||||
+
|
||||
+
|
||||
+/* The value of the timer at the last interrupt */
|
||||
+static u32 clock_at_last_interrupt;
|
||||
+
|
||||
+/* The number of high-resolution clock cycles beyond what we would
|
||||
+ have expected that the last tick occurred, <<8 for greater precision */
|
||||
+static long clock_delay;
|
||||
+
|
||||
+/* The total number of timer nanoseconds between the time the timer
|
||||
+ * went live and the most recent tick. */
|
||||
+static unsigned long long total_ns;
|
||||
+
|
||||
+/* A lock to guard access to the monotonic clock-related variables
|
||||
+ * (total_ns and clocal_at_last_interrupt). Note that these are also
|
||||
+ * protected by the xtime lock. */
|
||||
+static seqlock_t hr_lock = SEQLOCK_UNLOCKED;
|
||||
+
|
||||
+/* Nonzero if the timer has been selected */
|
||||
+static int enable_scx200hr;
|
||||
+
|
||||
+static int __init scx200hr_init(char *override)
|
||||
+{
|
||||
+ /* Watch for a command-line clock= override */
|
||||
+ if (override[0] && strncmp(override, NAME, sizeof(NAME) - 1) != 0) {
|
||||
+ return -ENODEV;
|
||||
+ }
|
||||
+
|
||||
+ /* Note that we should try to enable this timer once the
|
||||
+ * configuration block address is known */
|
||||
+ printk(KERN_WARNING NAME ": timer not yet accessible; will probe later.\n");
|
||||
+ enable_scx200hr = 1;
|
||||
+ return -EAGAIN;
|
||||
+}
|
||||
+
|
||||
+/* Called by the timer interrupt. The xtime_lock will be held. */
|
||||
+static void mark_offset_scx200hr(void)
|
||||
+{
|
||||
+ u32 now, delta;
|
||||
+
|
||||
+ /* Avoid races between the interrupt handler and monotonic_clock */
|
||||
+ write_seqlock(&hr_lock);
|
||||
+
|
||||
+ /* Determine how many cycles have elapsed since the last interrupt */
|
||||
+ now = SCx200HR_CLOCK();
|
||||
+ delta = (now - clock_at_last_interrupt) << 8;
|
||||
+ clock_at_last_interrupt = now;
|
||||
+
|
||||
+ /* Update the total us count and remainder */
|
||||
+ total_ns += (delta * 1000) / HR_CYCLES_PER_US;
|
||||
+
|
||||
+ /* The monotonic clock is safe now */
|
||||
+ write_sequnlock(&hr_lock);
|
||||
+
|
||||
+ /* Adjust for interrupt handling delay */
|
||||
+ delta += clock_delay;
|
||||
+
|
||||
+ /* The high-resolution timer is driven by a different crystal
|
||||
+ * to the main CPU, so there's no guarantee that the 1KHz
|
||||
+ * interrupt rate will coincide with the timer. This keeps
|
||||
+ * the jiffies count in line with the high-resolution timer,
|
||||
+ * which makes it possible for NTP to do its magic */
|
||||
+ if (delta < HR_CYCLES_PER_TICK) {
|
||||
+#if 1
|
||||
+ /* Didn't go over 1000us: decrement jiffies to balance
|
||||
+ * out increment in do_timer. This will cause some
|
||||
+ * jitter if the frequency offset is large, as that
|
||||
+ * adjustment will be applied about 1ms late. */
|
||||
+ jiffies_64--;
|
||||
+ clock_delay = delta;
|
||||
+#else /* !1 */
|
||||
+ clock_delay = 0;
|
||||
+#endif /* 1 */
|
||||
+ } else if (delta < (HR_CYCLES_PER_TICK << 1) + (HR_CYCLES_PER_TICK >> 1)) {
|
||||
+ clock_delay = delta - HR_CYCLES_PER_TICK;
|
||||
+ } else {
|
||||
+ jiffies_64 += delta / HR_CYCLES_PER_TICK - 2;
|
||||
+ clock_delay = HR_CYCLES_PER_TICK + delta % HR_CYCLES_PER_TICK;
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+/* Called by gettimeofday(). Returns the number of microseconds since
|
||||
+ * the last interrupt. This is called with the xtime_lock held.*/
|
||||
+static unsigned long get_offset_scx200hr(void)
|
||||
+{
|
||||
+ u32 delta;
|
||||
+
|
||||
+ /* Get the time now and determine how many cycles have
|
||||
+ * transpired since the interrupt, adjusting for timer
|
||||
+ * interrupt jitter. */
|
||||
+ delta = ((SCx200HR_CLOCK() - clock_at_last_interrupt) << 8) + clock_delay;
|
||||
+
|
||||
+ /* Convert from cycles<<8 to microseconds */
|
||||
+ return delta / HR_CYCLES_PER_US;
|
||||
+}
|
||||
+
|
||||
+/* Returns the number of nanoseconds since the init of the timer. */
|
||||
+static unsigned long long monotonic_clock_scx200hr(void)
|
||||
+{
|
||||
+ u32 delta, seq;
|
||||
+ unsigned long long ns;
|
||||
+
|
||||
+ /* This function is *not* called with xtime_lock held, so we
|
||||
+ * need to get the hr_lock to ensure we're not competing with
|
||||
+ * mark_offset_scx200hr. */
|
||||
+ do {
|
||||
+ seq = read_seqbegin(&hr_lock);
|
||||
+ ns = total_ns;
|
||||
+ delta = SCx200HR_CLOCK() - clock_at_last_interrupt;
|
||||
+ } while (read_seqretry(&hr_lock, seq));
|
||||
+
|
||||
+ /* Convert cycles to microseconds and add. */
|
||||
+ return ns + delta * 1000 / HR_CYCLES_PER_US;
|
||||
+}
|
||||
+
|
||||
+/* scx200hr timer_opts struct */
|
||||
+struct timer_opts timer_scx200hr = {
|
||||
+ .name = NAME,
|
||||
+ .mark_offset = mark_offset_scx200hr,
|
||||
+ .get_offset = get_offset_scx200hr,
|
||||
+ .monotonic_clock = monotonic_clock_scx200hr,
|
||||
+ .delay = NULL
|
||||
+};
|
||||
+
|
||||
+/* And the init_timer struct */
|
||||
+struct init_timer_opts __devinitdata timer_scx200hr_init = {
|
||||
+ .init = scx200hr_init,
|
||||
+ .opts = &timer_scx200hr
|
||||
+};
|
||||
+
|
||||
+
|
||||
+/* Switch from the original timer to the high-resolution timer */
|
||||
+void __devinit scx200hr_timer_enable(void)
|
||||
+{
|
||||
+ /* Make sure the timer was requested and that the
|
||||
+ * configuration block is present */
|
||||
+ if (!enable_scx200hr || !scx200_cb_present()) {
|
||||
+ return;
|
||||
+ }
|
||||
+
|
||||
+ /* Reserve the timer region for ourselves */
|
||||
+ if (!request_region(scx200_cb_base + SCx200_TIMER_OFFSET,
|
||||
+ SCx200_TIMER_SIZE,
|
||||
+ "NatSemi SCx200 High-Resolution Timer")) {
|
||||
+ printk(KERN_WARNING NAME ": unable to lock timer region\n");
|
||||
+ return;
|
||||
+ }
|
||||
+
|
||||
+ /* Configure the timer */
|
||||
+ outb(0, scx200_cb_base + SCx200_TMCNFG_OFFSET);
|
||||
+
|
||||
+ /* Record the current value of the timer. */
|
||||
+ clock_at_last_interrupt = SCx200HR_CLOCK();
|
||||
+
|
||||
+ /* Get the current value of the monotonic clock */
|
||||
+ total_ns = cur_timer->monotonic_clock();
|
||||
+
|
||||
+ /* Switch from the original timer functions to ours, but keep
|
||||
+ * the current delay function since loops_per_jiffy will have
|
||||
+ * been computed using that */
|
||||
+ timer_scx200hr.delay = cur_timer->delay;
|
||||
+ cur_timer = &timer_scx200hr;
|
||||
+
|
||||
+ printk(KERN_INFO "switching to scx200 high-resolution timer (%lu cpt)\n",
|
||||
+ HR_CYCLES_PER_TICK);
|
||||
+}
|
||||
diff -Naurp linux-2.6.12-rc6.orig/include/asm-i386/timer.h linux-2.6.12-rc6/include/asm-i386/timer.h
|
||||
--- linux-2.6.12-rc6.orig/include/asm-i386/timer.h 2005-06-07 14:56:11.000000000 +0100
|
||||
+++ linux-2.6.12-rc6/include/asm-i386/timer.h 2005-06-07 16:43:19.000000000 +0100
|
||||
@@ -50,6 +50,9 @@ extern struct init_timer_opts timer_tsc_
|
||||
#ifdef CONFIG_X86_CYCLONE_TIMER
|
||||
extern struct init_timer_opts timer_cyclone_init;
|
||||
#endif
|
||||
+#ifdef CONFIG_SCx200HR_TIMER
|
||||
+extern struct init_timer_opts timer_scx200hr_init;
|
||||
+#endif
|
||||
|
||||
extern unsigned long calibrate_tsc(void);
|
||||
extern void init_cpu_khz(void);
|
||||
diff -Naurp linux-2.6.12-rc6.orig/include/linux/scx200.h linux-2.6.12-rc6/include/linux/scx200.h
|
||||
--- linux-2.6.12-rc6.orig/include/linux/scx200.h 2005-06-07 14:56:11.000000000 +0100
|
||||
+++ linux-2.6.12-rc6/include/linux/scx200.h 2005-06-07 16:43:19.000000000 +0100
|
||||
@@ -32,7 +32,7 @@ extern unsigned scx200_cb_base;
|
||||
|
||||
/* High Resolution Timer */
|
||||
#define SCx200_TIMER_OFFSET 0x08
|
||||
-#define SCx200_TIMER_SIZE 0x05
|
||||
+#define SCx200_TIMER_SIZE 0x06
|
||||
|
||||
/* Clock Generators */
|
||||
#define SCx200_CLOCKGEN_OFFSET 0x10
|
||||
Reference in New Issue
Block a user