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[adm5120] rewrite of memory detection code, should be fix #1909
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@7819 3c298f89-4303-0410-b956-a3cf2f4a3e73
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@@ -93,10 +93,15 @@
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#define MEMCTRL_SDRS_64M 0x04
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#define MEMCTRL_SDRS_128M 0x05
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#define MEMCTRL_SDR1_ENABLE ONEBIT(5) /* enable SDRAM bank 1 */
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#define MEMCTRL_SR0S_MASK BITMASK(3) /* SRAM0 size */
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#define MEMCTRL_SR0S_SHIFT 8
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#define MEMCTRL_SR1S_MASK BITMAKS(3) /* SRAM1 size */
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#define MEMCTRL_SR1S_SHIFT 16
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#define MEMCTRL_SRS0_SHIFT 8 /* shift for SRAM0 size */
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#define MEMCTRL_SRS1_SHIFT 16 /* shift for SRAM1 size */
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#define MEMCTRL_SRS_MASK BITMASK(3) /* SRAM size mask */
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#define MEMCTRL_SRS_DISABLED 0x00 /* Disabled */
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#define MEMCTRL_SRS_512K 0x01 /* 512KB*/
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#define MEMCTRL_SRS_1M 0x02 /* 1MB */
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#define MEMCTRL_SRS_2M 0x03 /* 2MB */
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#define MEMCTRL_SRS_4M 0x04 /* 4MB */
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/* GPIO_CONF0 register bits */
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#define GPIO_CONF0_MASK BITMASK(8)
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@@ -109,6 +114,15 @@
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#define GPIO_CONF0_OE_MASK (0xFF << GPIO_CONF0_OE_SHIFT)
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#define GPIO_CONF0_OV_MASK (0xFF << GPIO_CONF0_OV_SHIFT)
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/* TIMER_INT register bits */
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#define TIMER_INT_TOS ONEBIT(1) /* time-out status */
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#define TIMER_INT_TOM ONEBIT(16) /* mask time-out interrupt */
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/* TIMER register bits */
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#define TIMER_PERIOD_MASK BITMASK(16) /* mask for timer period */
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#define TIMER_PERIOD_DEFAULT 0xFFFF /* default timer period */
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#define TIMER_TE ONEBIT(16) /* timer enable bit */
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/* PORTx_LED register bits */
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#define LED_MODE_MASK BITMASK(4)
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#define LED_MODE_INPUT 0
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