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[xburst] Add per board struct describing the external clock setup.

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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@19783 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
lars 2010-02-20 20:45:00 +00:00
parent 9380739d16
commit d0f76caa10
10 changed files with 47 additions and 55 deletions
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5
target/linux/xburst/files-2.6.32/arch/mips/include/asm/mach-jz4740/board-qi_lb60.h
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@ -20,11 +20,6 @@
#define __ASM_JZ4740_QI_LB60_H__
#include <linux/gpio.h>
/*
* Frequencies of on-board oscillators
*/
#define JZ_EXTAL 12000000 /* Main extal freq: 12 MHz */
#define JZ_EXTAL_RTC 32768 /* RTC extal freq: 32.768 KHz */
/*
* GPIO

1
target/linux/xburst/files-2.6.32/arch/mips/include/asm/mach-jz4740/clock.h
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@ -23,7 +23,6 @@ enum jz4740_wait_mode
JZ4740_WAIT_MODE_SLEEP,
};
int jz_init_clocks(unsigned long ext_rate);
void jz4740_clock_set_wait_mode(enum jz4740_wait_mode mode);
void jz4740_clock_udc_enable_auto_suspend(void);

3
target/linux/xburst/files-2.6.32/arch/mips/include/asm/mach-jz4740/jz4740.h
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@ -26,9 +26,6 @@
#include <asm/mach-jz4740/board-qi_lb60.h>
#endif
/* Add other platform definition here ... */
/*------------------------------------------------------------------
* Follows are related to platform definitions
*/

45
target/linux/xburst/files-2.6.32/arch/mips/jz4740/board-n526.c
View File

@ -22,7 +22,6 @@
#include <linux/mtd/jz4740_nand.h>
#include <linux/jz4740_fb.h>
#include <linux/power_supply.h>
#include <linux/power/jz4740-battery.h>
#include <linux/mmc/jz4740_mmc.h>
#include <video/broadsheetfb.h>
@ -35,6 +34,8 @@
#include <linux/i2c.h>
#include <linux/i2c-gpio.h>
#include "clock.h"
/* NAND */
static struct nand_ecclayout n526_ecclayout = {
.eccbytes = 36,
@ -73,19 +74,6 @@ static struct jz_nand_platform_data n526_nand_pdata = {
.busy_gpio = 94,
};
/* Battery */
/*static struct jz_batt_info n526_battery_pdata = {
.dc_dect_gpio = GPIO_DC_DETE_N,
.usb_dect_gpio = GPIO_USB_DETE,
.charg_stat_gpio = GPIO_CHARG_STAT_N,
.min_voltag = 3600000,
.max_voltag = 4200000,
.batt_tech = POWER_SUPPLY_TECHNOLOGY_LIPO,
};*/
static struct jz4740_mmc_platform_data n526_mmc_pdata = {
.gpio_card_detect = JZ_GPIO_PORTD(7),
.card_detect_active_low = 1,
@ -144,7 +132,6 @@ value)
static int n526_eink_wait(struct broadsheetfb_par *par)
{
int i = 0;
wait_event(par->waitq, gpio_get_value(JZ_GPIO_PORTB(17)));
return 0;
@ -171,36 +158,35 @@ static void n526_eink_set_hdb(struct broadsheetfb_par *par, u16 value)
static int n526_eink_init(struct broadsheetfb_par *par)
{
int i = 0;
int i;
gpio_request(JZ_GPIO_PORTD(1), "display reset?");
gpio_request(JZ_GPIO_PORTD(1), "display reset");
gpio_direction_output(JZ_GPIO_PORTD(1), 1);
mdelay(10);
gpio_set_value(JZ_GPIO_PORTD(1), 0);
gpio_request(JZ_GPIO_PORTB(18), "foobar");
gpio_request(JZ_GPIO_PORTB(18), "eink enable");
gpio_direction_output(JZ_GPIO_PORTB(18), 0);
gpio_request(JZ_GPIO_PORTB(29), "foobar");
gpio_direction_output(JZ_GPIO_PORTB(29), 1);
for(i = 1; i < ARRAY_SIZE(n526_eink_ctrl_gpios); ++i) {
gpio_request(n526_eink_ctrl_gpios[i], "foobar");
gpio_request(n526_eink_ctrl_gpios[i], "eink display ctrl");
gpio_direction_output(n526_eink_ctrl_gpios[i], 0);
}
gpio_request(JZ_GPIO_PORTC(22), "foobar");
gpio_direction_input(JZ_GPIO_PORTC(22));
gpio_request(JZ_GPIO_PORTC(21), "foobar");
gpio_request(JZ_GPIO_PORTC(21), "eink nRD");
gpio_direction_output(JZ_GPIO_PORTC(21), 1);
for(i = 0; i < 16; ++i) {
gpio_request(JZ_GPIO_PORTC(i), "display data");
gpio_request(JZ_GPIO_PORTC(i), "eink display data");
}
jz_gpio_port_direction_output(JZ_GPIO_PORTC(0), 0xffff);
gpio_direction_output(JZ_GPIO_PORTB(18), 1);
gpio_set_value(JZ_GPIO_PORTB(18), 1);
return 0;
}
@ -218,12 +204,12 @@ static int n526_eink_setup_irq(struct fb_info *info)
int ret;
struct broadsheetfb_par *par = info->par;
gpio_request(JZ_GPIO_PORTB(17), "foobar");
gpio_request(JZ_GPIO_PORTB(17), "eink busy");
gpio_direction_input(JZ_GPIO_PORTB(17));
ret = request_irq(gpio_to_irq(JZ_GPIO_PORTB(17)), n526_eink_busy_irq,
IRQF_DISABLED | IRQF_TRIGGER_RISING,
"eInk busyline", par);
"eink busyline", par);
if (ret)
printk("n526 display: Failed to request busyline irq: %d\n", ret);
return 0;
@ -294,7 +280,6 @@ static struct i2c_board_info n526_i2c_board_info = {
.addr = 0x54,
};
static struct platform_device *jz_platform_devices[] __initdata = {
&jz4740_usb_ohci_device,
&jz4740_usb_gdt_device,
@ -314,7 +299,6 @@ static int __init n526_init_platform_devices(void)
{
jz4740_nand_device.dev.platform_data = &n526_nand_pdata;
/* jz4740_battery_device.dev.platform_data = &n526_battery_pdata;*/
jz4740_mmc_device.dev.platform_data = &n526_mmc_pdata;
n526_i2c_board_info.irq = gpio_to_irq(JZ_GPIO_PORTD(14)),
@ -325,16 +309,19 @@ static int __init n526_init_platform_devices(void)
}
struct jz4740_clock_board_data jz4740_clock_bdata = {
.ext_rate = 12000000,
.rtc_rate = 32768,
};
extern int jz_gpiolib_init(void);
extern int jz_init_clocks(unsigned long extal);
static int __init n526_board_setup(void)
{
if (jz_gpiolib_init())
panic("Failed to initalize jz gpio\n");
jz_init_clocks(12000000);
jz4740_init_clocks();
board_gpio_setup();
if (n526_init_platform_devices())

12
target/linux/xburst/files-2.6.32/arch/mips/jz4740/board-qi_lb60.c
View File

@ -31,6 +31,7 @@
#include <linux/power/gpio-charger.h>
#include <linux/mmc/jz4740_mmc.h>
#include "clock.h"
/* NAND */
static struct nand_ecclayout qi_lb60_ecclayout_1gb = {
@ -118,7 +119,6 @@ static struct jz_nand_platform_data qi_lb60_nand_pdata = {
.busy_gpio = 94,
};
/* Keyboard*/
/* #define KEEP_UART_ALIVE
@ -387,12 +387,18 @@ static int __init qi_lb60_init_platform_devices(void)
ARRAY_SIZE(jz_platform_devices));
}
struct jz4740_clock_board_data jz4740_clock_bdata = {
.ext_rate = 12000000,
.rtc_rate = 32768,
};
extern int jz_gpiolib_init(void);
extern int jz_init_clocks(unsigned long extal);
static __init int board_avt2(char *str)
{
qi_lb60_mmc_pdata.card_detect_active_low = 1;
qi_lb60_mmc_pdata.power_active_low = 1;
return 1;
}
@ -404,8 +410,8 @@ static int __init qi_lb60_board_setup(void)
printk("Qi Hardware JZ4740 QI_LB60 setup\n");
if (jz_gpiolib_init())
panic("Failed to initalize jz gpio\n");
jz_init_clocks(12000000);
jz_init_clocks();
board_gpio_setup();
if (qi_lb60_init_platform_devices())

5
target/linux/xburst/files-2.6.32/arch/mips/jz4740/clock.c
View File

@ -873,7 +873,7 @@ void jz4740_clock_udc_enable_auto_suspend(void)
}
EXPORT_SYMBOL_GPL(jz4740_clock_udc_enable_auto_suspend);
int jz_init_clocks(unsigned long ext_rate)
int jz_init_clocks(void)
{
uint32_t val;
@ -883,7 +883,8 @@ int jz_init_clocks(unsigned long ext_rate)
spin_lock_init(&jz_clock_lock);
jz_clk_ext.rate = ext_rate;
jz_clk_ext.rate = jz4740_clock_bdata.ext_rate;
jz_clk_rtc.rate = jz4740_clock_bdata.rtc_rate;
val = jz_clk_reg_read(JZ_REG_CLOCK_SPI);

11
target/linux/xburst/files-2.6.32/arch/mips/jz4740/clock.h
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@ -16,6 +16,17 @@
#ifndef __JZ4740_CLOCK_H__
#define __JZ4740_CLOCK_H__
struct jz4740_clock_board_data {
unsigned long ext_rate;
unsigned long rtc_rate;
};
extern struct jz4740_clock_board_data jz4740_clock_bdata;
int jz_init_clocks(void);
struct clk;
struct clk_ops {
unsigned long (*get_rate)(struct clk* clk);
unsigned long (*round_rate)(struct clk *clk, unsigned long rate);

4
target/linux/xburst/files-2.6.32/arch/mips/jz4740/reset.c
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@ -21,12 +21,14 @@
#include <asm/mach-jz4740/timer.h>
#include <asm/mach-jz4740/jz4740.h>
#include "clock.h"
void jz_restart(char *command)
{
printk(KERN_NOTICE "Restarting after 4 ms\n");
REG_WDT_TCSR = WDT_TCSR_PRESCALE4 | WDT_TCSR_EXT_EN;
REG_WDT_TCNT = 0;
REG_WDT_TDR = JZ_EXTAL/1000; /* reset after 4ms */
REG_WDT_TDR = jz4740_clock_bdata.ext_rate / 1000; /* reset after 4ms */
jz4740_timer_enable_watchdog();
REG_WDT_TCER = WDT_TCER_TCEN; /* wdt start */
while (1);

6
target/linux/xburst/files-2.6.32/arch/mips/jz4740/setup.c
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@ -41,12 +41,12 @@
#include <asm/mach-jz4740/clock.h>
#include <asm/mach-jz4740/serial.h>
#include "clock.h"
extern char *__init prom_getcmdline(void);
extern void __init jz_board_setup(void);
extern void jz_restart(char *);
extern void jz_halt(void);
extern void jz_power_off(void);
extern void jz_time_init(void);
static void __init jz_serial_setup(void)
{
@ -57,7 +57,7 @@ static void __init jz_serial_setup(void)
s.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
s.iotype = SERIAL_IO_MEM;
s.regshift = 2;
s.uartclk = JZ_EXTAL;
s.uartclk = jz4740_clock_bdata.ext_rate;
s.line = 0;
s.membase = (u8 *)UART0_BASE;

10
target/linux/xburst/files-2.6.32/arch/mips/jz4740/time.c
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@ -22,6 +22,7 @@
#include <asm/mach-jz4740/irq.h>
#include <asm/mach-jz4740/jz4740.h>
#include <asm/time.h>
#include "clock.h"
#define JZ_REG_TIMER_STOP 0x1C
#define JZ_REG_TIMER_STOP_SET 0x2C
@ -216,7 +217,6 @@ void __init plat_time_init(void)
{
int ret;
uint32_t clk_rate;
struct clk *ext_clk;
jz4740_timer_base = ioremap(CPHYSADDR(TCU_BASE), 0x100);
@ -225,13 +225,7 @@ void __init plat_time_init(void)
return;
}
/*ext_clk = clk_get(NULL, "ext");
clk_rate = clk_get_rate(ext_clk) >> 4;
clk_put(ext_clk);*/
clk_rate = JZ_EXTAL >> 4;
clk_rate = jz4740_clock_bdata.ext_rate >> 4;
jz4740_jiffies_per_tick = DIV_ROUND_CLOSEST(clk_rate, HZ);
clockevent_set_clock(&jz4740_clockevent, clk_rate);