diff --git a/package/uboot-xburst/files/arch/mips/cpu/xburst/nanonote_gpm940b0.h b/package/uboot-xburst/files/arch/mips/cpu/xburst/nanonote_gpm940b0.h
index ab9e105eb..33ded23ff 100644
--- a/package/uboot-xburst/files/arch/mips/cpu/xburst/nanonote_gpm940b0.h
+++ b/package/uboot-xburst/files/arch/mips/cpu/xburst/nanonote_gpm940b0.h
@@ -24,10 +24,6 @@
 
 #include <asm/io.h>
 
-#define mdelay(n)	udelay((n)*1000)
-
-#define NR_PALETTE	256
-
 struct lcd_desc{
 	unsigned int next_desc; /* LCDDAx */
 	unsigned int databuf;   /* LCDSAx */
diff --git a/package/uboot-xburst/files/board/xburst/nanonote/nanonote.c b/package/uboot-xburst/files/board/xburst/nanonote/nanonote.c
index f312a33b5..ef9552a3c 100644
--- a/package/uboot-xburst/files/board/xburst/nanonote/nanonote.c
+++ b/package/uboot-xburst/files/board/xburst/nanonote/nanonote.c
@@ -51,7 +51,7 @@ static void gpio_init(void)
 	}
 
 	/* enable the TP4, TP5 as UART0 */
-	REG_GPIO_PXSELS(2) = 0x80000000;
+	__gpio_jtag_to_uart0();
 
 	/*
 	 * Initialize UART0 pins, in Ben NanoNote uart0 and keyin8 use the
diff --git a/package/uboot-xburst/files/nand_spl/nand_boot_jz4740.c b/package/uboot-xburst/files/nand_spl/nand_boot_jz4740.c
index fe68fa510..64cac97fe 100644
--- a/package/uboot-xburst/files/nand_spl/nand_boot_jz4740.c
+++ b/package/uboot-xburst/files/nand_spl/nand_boot_jz4740.c
@@ -348,6 +348,8 @@ static void gpio_init(void)
 	 * Initialize UART0 pins
 	 */
 	__gpio_as_uart0();
+
+	__gpio_jtag_to_uart0();
 }
 
 static int is_usb_boot()
@@ -372,10 +374,12 @@ void nand_boot(void)
 	 */
 	gpio_init();
 	pll_init();
-	REG_GPIO_PXSELS(2) = 0x80000000;
+
 	serial_init();
 	sdram_init();
-	serial_puts("\n\nNAND Secondary Program Loader\n\n");
+	jz_nand_init();
+
+	serial_puts("\nNAND Boot\n");
 
 #if defined(CONFIG_NANONOTE)
 	if(is_usb_boot()) {