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ramips: set clk_is_20mhz for rt2x00 on RT3352/RT5350
Signed-off-by: Daniel Golle <dgolle@allnet.de> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34270 3c298f89-4303-0410-b956-a3cf2f4a3e73
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@ -111,6 +111,8 @@
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#define RT5350_SYSCFG0_DRAM_SIZE_32M 3
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#define RT5350_SYSCFG0_DRAM_SIZE_64M 4
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#define RT3352_SYSCFG0_XTAL_SEL BIT(20)
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#define RT3352_SYSCFG1_USB0_HOST_MODE BIT(10)
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#define RT3352_CLKCFG1_UPHY0_CLK_EN BIT(18)
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@ -215,7 +215,15 @@ static struct platform_device rt305x_wifi_device = {
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void __init rt305x_register_wifi(void)
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{
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u32 t;
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rt305x_wifi_data.eeprom_file_name = "RT305X.eeprom";
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if (soc_is_rt3352() || soc_is_rt5350()) {
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t = rt305x_sysc_rr(SYSC_REG_SYSTEM_CONFIG);
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t &= RT3352_SYSCFG0_XTAL_SEL;
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if (!t)
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rt305x_wifi_data.clk_is_20mhz = 1;
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}
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platform_device_register(&rt305x_wifi_device);
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}
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