qi-hardware/openwrt-xburst
1
0
Fork 0
mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2024-11-24 00:30:16 +02:00
Code

[orion]: upgrade to 3.0-rc6 and optimize for armv5te again

Browse Source 
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@27592 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
kaloz 2011-07-11 20:35:16 +00:00
parent 554f9cd422
commit dc2c30ab96
2 changed files with 28 additions and 28 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
target/linux/orion/Makefile
View File

@ -10,10 +10,10 @@ ARCH:=arm
BOARD:=orion
BOARDNAME:=Marvell Orion
SUBTARGETS:=generic harddisk
CFLAGS=-Os -pipe -march=armv5t -mtune=xscale -fno-caller-saves
CFLAGS=-Os -pipe -march=armv5te -mtune=xscale -fno-caller-saves
MAINTAINER:=Imre Kaloz <kaloz@openwrt.org>
LINUX_VERSION:=2.6.37.6
LINUX_VERSION:=3.0-rc6
include $(INCLUDE_DIR)/target.mk

52
target/linux/orion/files/arch/arm/mach-orion5x/dt2-setup.c
View File

@ -119,11 +119,11 @@ void __init dt2_pci_preinit(void)
if (gpio_request(pin, "PCI IntA") == 0) {
if (gpio_direction_input(pin) == 0) {
irq = gpio_to_irq(pin);
set_irq_type(irq, IRQ_TYPE_LEVEL_LOW);
irq_set_irq_type(irq, IRQ_TYPE_LEVEL_LOW);
printk (KERN_INFO "PCI IntA IRQ: %d\n", irq);
} else {
printk(KERN_ERR "dt2_pci_preinit failed to "
"set_irq_type pin %d\n", pin);
"irq_set_irq_type pin %d\n", pin);
gpio_free(pin);
}
} else {
@ -134,11 +134,11 @@ void __init dt2_pci_preinit(void)
if (gpio_request(pin, "PCI IntB") == 0) {
if (gpio_direction_input(pin) == 0) {
irq = gpio_to_irq(pin);
set_irq_type(irq, IRQ_TYPE_LEVEL_LOW);
irq_set_irq_type(irq, IRQ_TYPE_LEVEL_LOW);
printk (KERN_INFO "PCI IntB IRQ: %d\n", irq);
} else {
printk(KERN_ERR "dt2_pci_preinit failed to "
"set_irq_type pin %d\n", pin);
"irq_set_irq_type pin %d\n", pin);
gpio_free(pin);
}
} else {
@ -240,28 +240,28 @@ static struct mv_sata_platform_data dt2_sata_data = {
/*****************************************************************************
* General Setup
****************************************************************************/
static struct orion5x_mpp_mode dt2_mpp_modes[] __initdata = {
{ 0, MPP_GPIO }, // RTC interrupt
{ 1, MPP_GPIO }, // 88e6131 interrupt
{ 2, MPP_GPIO }, // PCI_intB
{ 3, MPP_GPIO }, // PCI_intA
{ 4, MPP_GPIO }, // reset button switch
{ 5, MPP_GPIO },
{ 6, MPP_GPIO },
{ 7, MPP_GPIO },
{ 8, MPP_GPIO },
{ 9, MPP_GIGE }, /* GE_RXERR */
{ 10, MPP_GPIO }, // usb
{ 11, MPP_GPIO }, // usb
{ 12, MPP_GIGE }, // GE_TXD[4]
{ 13, MPP_GIGE }, // GE_TXD[5]
{ 14, MPP_GIGE }, // GE_TXD[6]
{ 15, MPP_GIGE }, // GE_TXD[7]
{ 16, MPP_GIGE }, // GE_RXD[4]
{ 17, MPP_GIGE }, // GE_RXD[5]
{ 18, MPP_GIGE }, // GE_RXD[6]
{ 19, MPP_GIGE }, // GE_RXD[7]
{ -1 },
static unsigned int dt2_mpp_modes[] __initdata = {
MPP0_GPIO, // RTC interrupt
MPP1_GPIO, // 88e6131 interrupt
MPP2_GPIO, // PCI_intB
MPP3_GPIO, // PCI_intA
MPP4_GPIO, // reset button switch
MPP5_GPIO,
MPP6_GPIO,
MPP7_GPIO,
MPP8_GPIO,
MPP9_GIGE, /* GE_RXERR */
MPP10_GPIO, // usb
MPP11_GPIO, // usb
MPP12_GIGE, // GE_TXD[4]
MPP13_GIGE, // GE_TXD[5]
MPP14_GIGE, // GE_TXD[6]
MPP15_GIGE, // GE_TXD[7]
MPP16_GIGE, // GE_RXD[4]
MPP17_GIGE, // GE_RXD[5]
MPP18_GIGE, // GE_RXD[6]
MPP19_GIGE, // GE_RXD[7]
0,
};
/*****************************************************************************