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mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2024-07-04 22:12:21 +03:00

add support for gigaset SX76X to uboot-lantiq

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@27488 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
blogic 2011-07-06 10:36:47 +00:00
parent f03072225e
commit dd809af4b3
4 changed files with 87 additions and 5 deletions

View File

@ -45,6 +45,9 @@ Package/uboot-lantiq-easy50812_DDR166M_ramboot=$(call Package/uboot-lantiq-templ
DDR_CONFIG_easy50712_DDR166M_ramboot:=easy50712_DDR166M DDR_CONFIG_easy50712_DDR166M_ramboot:=easy50712_DDR166M
DDR_CONFIG_easy50812_DDR166M_ramboot:=easy50812 DDR_CONFIG_easy50812_DDR166M_ramboot:=easy50812
#Siemens
Package/uboot-lantiq-gigaSX76X_DDRsamsung166=$(call Package/uboot-lantiq-template,gigaSX76X_DDRsamsung166,NOR)
#Arcadyan #Arcadyan
Package/uboot-lantiq-arv3527P_flash=$(call Package/uboot-lantiq-template,arv3527P_flash,NOR) Package/uboot-lantiq-arv3527P_flash=$(call Package/uboot-lantiq-template,arv3527P_flash,NOR)
Package/uboot-lantiq-arv3527P_ramboot=$(call Package/uboot-lantiq-template,arv3527P_ramboot,RAM) Package/uboot-lantiq-arv3527P_ramboot=$(call Package/uboot-lantiq-template,arv3527P_ramboot,RAM)
@ -137,6 +140,7 @@ $(eval $(call BuildPackage,uboot-lantiq-easy50712_DDR166M))
$(eval $(call BuildPackage,uboot-lantiq-easy50712_DDR166M_ramboot)) $(eval $(call BuildPackage,uboot-lantiq-easy50712_DDR166M_ramboot))
$(eval $(call BuildPackage,uboot-lantiq-easy50812_DDR166M)) $(eval $(call BuildPackage,uboot-lantiq-easy50812_DDR166M))
$(eval $(call BuildPackage,uboot-lantiq-easy50812_DDR166M_ramboot)) $(eval $(call BuildPackage,uboot-lantiq-easy50812_DDR166M_ramboot))
$(eval $(call BuildPackage,uboot-lantiq-gigaSX76X_DDRsamsung166))
#$(eval $(call BuildPackage,uboot-lantiq-arv3527P_flash)) #$(eval $(call BuildPackage,uboot-lantiq-arv3527P_flash))
#$(eval $(call BuildPackage,uboot-lantiq-arv3527P_brnboot)) #$(eval $(call BuildPackage,uboot-lantiq-arv3527P_brnboot))
#$(eval $(call BuildPackage,uboot-lantiq-arv3527P_ramboot)) #$(eval $(call BuildPackage,uboot-lantiq-arv3527P_ramboot))

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@ -180,6 +180,7 @@ int checkboard (void)
switch (part_num) switch (part_num)
{ {
case 0x129: case 0x129:
case 0x12B:
case 0x12D: case 0x12D:
puts("Danube/Twinpass/Vinax-VE "); puts("Danube/Twinpass/Vinax-VE ");
break; break;
@ -233,6 +234,19 @@ static int external_switch_init(void)
unsigned short chipid0=0xdead, chipid1=0xbeef; unsigned short chipid0=0xdead, chipid1=0xbeef;
static char * const name = "lq_cpe_eth"; static char * const name = "lq_cpe_eth";
#ifdef CONFIG_SWITCH_PORT0
*DANUBE_GPIO_P0_ALTSEL0 &= ~(1<<CONFIG_SWITCH_PIN);
*DANUBE_GPIO_P0_ALTSEL1 &= ~(1<<CONFIG_SWITCH_PIN);
*DANUBE_GPIO_P0_OD |= (1<<CONFIG_SWITCH_PIN);
*DANUBE_GPIO_P0_DIR |= (1<<CONFIG_SWITCH_PIN);
*DANUBE_GPIO_P0_OUT |= (1<<CONFIG_SWITCH_PIN);
#elif defined(CONFIG_SWITCH_PORT1)
*DANUBE_GPIO_P1_ALTSEL0 &= ~(1<<CONFIG_SWITCH_PIN);
*DANUBE_GPIO_P1_ALTSEL1 &= ~(1<<CONFIG_SWITCH_PIN);
*DANUBE_GPIO_P1_OD |= (1<<CONFIG_SWITCH_PIN);
*DANUBE_GPIO_P1_DIR |= (1<<CONFIG_SWITCH_PIN);
*DANUBE_GPIO_P1_OUT |= (1<<CONFIG_SWITCH_PIN);
#endif
#ifdef CLK_OUT2_25MHZ #ifdef CLK_OUT2_25MHZ
*DANUBE_GPIO_P0_DIR=0x0000ae78; *DANUBE_GPIO_P0_DIR=0x0000ae78;
*DANUBE_GPIO_P0_ALTSEL0=0x00008078; *DANUBE_GPIO_P0_ALTSEL0=0x00008078;
@ -245,12 +259,12 @@ static int external_switch_init(void)
/* earlier no valid response is available, at least on Twinpass & Tantos @ 111MHz, M4530 platform */ /* earlier no valid response is available, at least on Twinpass & Tantos @ 111MHz, M4530 platform */
udelay(100000); udelay(100000);
debug("\nsearching for Samurai switch ... "); printf("\nsearching for Samurai switch ... ");
if ( (miiphy_read(name, PHYADDR(SAMURAI_ID_REG0), &chipid0)==0) && if ( (miiphy_read(name, PHYADDR(SAMURAI_ID_REG0), &chipid0)==0) &&
(miiphy_read(name, PHYADDR(SAMURAI_ID_REG1), &chipid1)==0) ) { (miiphy_read(name, PHYADDR(SAMURAI_ID_REG1), &chipid1)==0) ) {
if (((chipid0 & 0xFFF0) == ID_SAMURAI_0) && if (((chipid0 & 0xFFF0) == ID_SAMURAI_0) &&
((chipid1 & 0x000F) == ID_SAMURAI_1)) { ((chipid1 & 0x000F) == ID_SAMURAI_1)) {
debug("found"); printf("found");
/* enable "Crossover Auto Detect" + defaults */ /* enable "Crossover Auto Detect" + defaults */
/* P0 */ /* P0 */
@ -274,10 +288,11 @@ static int external_switch_init(void)
} }
} }
debug("\nsearching for TANTOS switch ... "); printf("%04X %04x\n", chipid0, chipid1);
printf("\nsearching for TANTOS switch ... ");
if (miiphy_read(name, PHYADDR(0x101), &chipid0) == 0) { if (miiphy_read(name, PHYADDR(0x101), &chipid0) == 0) {
if (chipid0 == ID_TANTOS) { if (chipid0 == ID_TANTOS) {
debug("found"); printf("found");
/* P5 Basic Control: Force Link Up */ /* P5 Basic Control: Force Link Up */
miiphy_write(name, PHYADDR(0xA1), 0x0004); miiphy_write(name, PHYADDR(0xA1), 0x0004);
@ -315,8 +330,36 @@ static int external_switch_init(void)
} }
#endif /* CONFIG_EXTRA_SWITCH */ #endif /* CONFIG_EXTRA_SWITCH */
int board_gpio_init(void)
{
#ifdef CONFIG_BUTTON_PORT0
*DANUBE_GPIO_P0_ALTSEL0 &= ~(1<<CONFIG_BUTTON_PIN);
*DANUBE_GPIO_P0_ALTSEL1 &= ~(1<<CONFIG_BUTTON_PIN);
*DANUBE_GPIO_P0_DIR &= ~(1<<CONFIG_BUTTON_PIN);
if(!!(*DANUBE_GPIO_P0_IN & (1<<CONFIG_BUTTON_PIN)) == CONFIG_BUTTON_LEVEL)
{
printf("button is pressed\n");
setenv("bootdelay", "0");
setenv("bootcmd", "httpd");
}
#elif defined(CONFIG_BUTTON_PORT1)
*DANUBE_GPIO_P1_ALTSEL0 &= ~(1<<CONFIG_BUTTON_PIN);
*DANUBE_GPIO_P1_ALTSEL1 &= ~(1<<CONFIG_BUTTON_PIN);
*DANUBE_GPIO_P1_DIR &= ~(1<<CONFIG_BUTTON_PIN);
if(!!(*DANUBE_GPIO_P1_IN & (1<<CONFIG_BUTTON_PIN)) == CONFIG_BUTTON_LEVEL)
{
printf("button is pressed\n");
setenv("bootdelay", "0");
setenv("bootcmd", "httpd");
}
#endif
}
int board_eth_init(bd_t *bis) int board_eth_init(bd_t *bis)
{ {
board_gpio_init();
#if defined(CONFIG_IFX_ETOP) #if defined(CONFIG_IFX_ETOP)
*DANUBE_PMU_PWDCR &= 0xFFFFEFDF; *DANUBE_PMU_PWDCR &= 0xFFFFEFDF;

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@ -186,7 +186,7 @@
#define CONFIG_BOOTSTRAP_BAUDRATE CONFIG_BAUDRATE #define CONFIG_BOOTSTRAP_BAUDRATE CONFIG_BAUDRATE
#define CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_BOOTSTRAP_LZMA #define CONFIG_BOOTSTRAP_LZMA
#define CONFIG_BOOTSTRAP_SERIAL //#define CONFIG_BOOTSTRAP_SERIAL
#endif #endif
#endif /* __IFX_COMMON_H */ #endif /* __IFX_COMMON_H */

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@ -0,0 +1,35 @@
--- a/Makefile
+++ b/Makefile
@@ -3613,6 +3613,32 @@
$(eval $(call arcadyan, arv752DPW%config))
$(eval $(call arcadyan, arv752DPW22%config))
+gigaSX76X%config : unconfig
+ @mkdir -p $(obj)include
+ @mkdir -p $(obj)board/infineon/easy50712
+ @[ -z "$(findstring ramboot,$@)" ] || \
+ { echo "TEXT_BASE = 0xA0400000" >$(obj)board/infineon/easy50712/config.tmp ; \
+ echo "#define CONFIG_SYS_RAMBOOT" >>$(obj)include/config.h ; \
+ $(XECHO) "... with ramboot configuration" ; \
+ }
+ @if [ "$(findstring _DDR,$@)" -a -z "$(findstring ramboot,$@)" ] ; then \
+ echo "#define CONFIG_USE_DDR_RAM" >>$(obj)include/config.h ; \
+ echo "#define CONFIG_BOOTSTRAP" >>$(obj)include/config.h ; \
+ DDR=$(subst DDR,,$(filter DDR%,$(subst _, ,$@))); \
+ case "$${DDR}" in \
+ 111M|166M|e111M|e166M|promos400|samsung166|psc166) \
+ $(XECHO) "... with DDR RAM config $${DDR}" ; \
+ echo "#define CONFIG_USE_DDR_RAM_CFG_$${DDR}" >>$(obj)include/config.h ;; \
+ *) $(XECHO) "... DDR RAM config \\\"$${DDR}\\\" unknown, use default"; \
+ esac; \
+ fi
+ echo "#define CONFIG_SWITCH_PORT1 1" >>$(obj)include/config.h
+ echo "#define CONFIG_SWITCH_PIN 3" >>$(obj)include/config.h
+ echo "#define CONFIG_BUTTON_PORT0 1" >>$(obj)include/config.h
+ echo "#define CONFIG_BUTTON_PIN 14" >>$(obj)include/config.h
+ echo "#define CONFIG_BUTTON_LEVEL 1" >>$(obj)include/config.h
+ @$(MKCONFIG) -a easy50712 mips mips easy50712 infineon danube
+
easy50712%config : unconfig
@mkdir -p $(obj)include
@mkdir -p $(obj)board/infineon/easy50712