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Code

jz4740: strip lots of now unused defines regs.h

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This commit is contained in:
Lars-Peter Clausen 2010-01-11 03:20:39 +01:00
parent 6cafd0ed52
commit ded8f6c115
6 changed files with 160 additions and 1779 deletions
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2
target/linux/xburst/files-2.6.31/arch/mips/include/asm/mach-jz4740/clock.h
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@ -15,6 +15,8 @@
#ifndef __ASM_JZ4740_CLOCK_H__
#define __ASM_JZ4740_CLOCK_H__
#include <asm/mach-jz4740/regs.h>
#ifndef JZ_EXTAL
//#define JZ_EXTAL 3686400 /* 3.6864 MHz */
#define JZ_EXTAL 12000000 /* 3.6864 MHz */

1852
target/linux/xburst/files-2.6.31/arch/mips/include/asm/mach-jz4740/regs.h
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File diff suppressed because it is too large Load Diff

3
target/linux/xburst/files-2.6.31/arch/mips/jz4740/dma.c
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@ -18,10 +18,9 @@
#include <linux/spinlock.h>
#include <linux/interrupt.h>
#include <asm/mach-jz4740/regs.h>
#include <linux/dma-mapping.h>
#include <asm/mach-jz4740/dma.h>
#include <linux/delay.h>
#include <asm/mach-jz4740/regs.h>
#define JZ_REG_DMA_SRC_ADDR(x) (0x00 + (x) * 0x20)
#define JZ_REG_DMA_DST_ADDR(x) (0x04 + (x) * 0x20)

3
target/linux/xburst/files-2.6.31/arch/mips/jz4740/reset.c
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@ -18,6 +18,7 @@
#include <asm/reboot.h>
#include <asm/system.h>
#include <asm/mach-jz4740/regs.h>
#include <asm/mach-jz4740/timer.h>
#include <asm/mach-jz4740/jz4740.h>
void jz_restart(char *command)
@ -26,7 +27,7 @@ void jz_restart(char *command)
REG_WDT_TCSR = WDT_TCSR_PRESCALE4 | WDT_TCSR_EXT_EN;
REG_WDT_TCNT = 0;
REG_WDT_TDR = JZ_EXTAL/1000; /* reset after 4ms */
REG_TCU_TSCR = TCU_TSSR_WDTSC; /* enable wdt clock */
jz4740_timer_enable_watchdog();
REG_WDT_TCER = WDT_TCER_TCEN; /* wdt start */
while (1);
}

4
target/linux/xburst/files-2.6.31/arch/mips/jz4740/setup.c
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@ -23,7 +23,6 @@
#include <linux/string.h>
#include <linux/kernel.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/ioport.h>
#include <linux/tty.h>
#include <linux/serial.h>
@ -41,7 +40,7 @@
#include <asm/mach-jz4740/clock.h>
#include <asm/mach-jz4740/serial.h>
extern char * __init prom_getcmdline(void);
extern char *__init prom_getcmdline(void);
extern void __init jz_board_setup(void);
extern void jz_restart(char *);
extern void jz_halt(void);
@ -57,6 +56,7 @@ static void __init soc_cpm_setup(void)
__cpm_idle_mode();
}
static void __init jz_serial_setup(void)
{
#ifdef CONFIG_SERIAL_8250

75
target/linux/xburst/files-2.6.31/drivers/usb/gadget/jz4740_udc.c
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@ -37,7 +37,6 @@
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/system.h>
#include <asm/mach-jz4740/regs.h>
#include <asm/mach-jz4740/clock.h>
#include "jz4740_udc.h"
@ -49,7 +48,7 @@
#define JZ_REG_UDC_INTRINE 0x06 /* Intr IN enable 16-bit */
#define JZ_REG_UDC_INTROUTE 0x08 /* Intr OUT enable 16-bit */
#define JZ_REG_UDC_INTRUSB 0x0a /* Interrupt USB 8-bit */
#define JZ_REG_UDC_INTRUSBE 0x0b /* Interrupt USB Enable 8-bit */
#define JZ_REG_UDC_INTRUSBE 0x0b /* Interrupt USB Enable 8-bit */
#define JZ_REG_UDC_FRAME 0x0c /* Frame number 16-bit */
#define JZ_REG_UDC_INDEX 0x0e /* Index register 8-bit */
#define JZ_REG_UDC_TESTMODE 0x0f /* USB test mode 8-bit */
@ -76,6 +75,78 @@
#define JZ_REG_UDC_ADDR2 0x218 /* DMA channel 2 AHB memory addr */
#define JZ_REG_UDC_COUNT2 0x21c /* DMA channel 2 byte count */
/* Power register bit masks */
#define USB_POWER_SUSPENDM 0x01
#define USB_POWER_RESUME 0x04
#define USB_POWER_HSMODE 0x10
#define USB_POWER_HSENAB 0x20
#define USB_POWER_SOFTCONN 0x40
/* Interrupt register bit masks */
#define USB_INTR_SUSPEND 0x01
#define USB_INTR_RESUME 0x02
#define USB_INTR_RESET 0x04
#define USB_INTR_EP0 0x0001
#define USB_INTR_INEP1 0x0002
#define USB_INTR_INEP2 0x0004
#define USB_INTR_OUTEP1 0x0002
/* CSR0 bit masks */
#define USB_CSR0_OUTPKTRDY 0x01
#define USB_CSR0_INPKTRDY 0x02
#define USB_CSR0_SENTSTALL 0x04
#define USB_CSR0_DATAEND 0x08
#define USB_CSR0_SETUPEND 0x10
#define USB_CSR0_SENDSTALL 0x20
#define USB_CSR0_SVDOUTPKTRDY 0x40
#define USB_CSR0_SVDSETUPEND 0x80
/* Endpoint CSR register bits */
#define USB_INCSRH_AUTOSET 0x80
#define USB_INCSRH_ISO 0x40
#define USB_INCSRH_MODE 0x20
#define USB_INCSRH_DMAREQENAB 0x10
#define USB_INCSRH_DMAREQMODE 0x04
#define USB_INCSR_CDT 0x40
#define USB_INCSR_SENTSTALL 0x20
#define USB_INCSR_SENDSTALL 0x10
#define USB_INCSR_FF 0x08
#define USB_INCSR_UNDERRUN 0x04
#define USB_INCSR_FFNOTEMPT 0x02
#define USB_INCSR_INPKTRDY 0x01
#define USB_OUTCSRH_AUTOCLR 0x80
#define USB_OUTCSRH_ISO 0x40
#define USB_OUTCSRH_DMAREQENAB 0x20
#define USB_OUTCSRH_DNYT 0x10
#define USB_OUTCSRH_DMAREQMODE 0x08
#define USB_OUTCSR_CDT 0x80
#define USB_OUTCSR_SENTSTALL 0x40
#define USB_OUTCSR_SENDSTALL 0x20
#define USB_OUTCSR_FF 0x10
#define USB_OUTCSR_DATAERR 0x08
#define USB_OUTCSR_OVERRUN 0x04
#define USB_OUTCSR_FFFULL 0x02
#define USB_OUTCSR_OUTPKTRDY 0x01
/* Testmode register bits */
#define USB_TEST_SE0NAK 0x01
#define USB_TEST_J 0x02
#define USB_TEST_K 0x04
#define USB_TEST_PACKET 0x08
/* DMA control bits */
#define USB_CNTL_ENA 0x01
#define USB_CNTL_DIR_IN 0x02
#define USB_CNTL_MODE_1 0x04
#define USB_CNTL_INTR_EN 0x08
#define USB_CNTL_EP(n) ((n) << 4)
#define USB_CNTL_BURST_0 (0 << 9)
#define USB_CNTL_BURST_4 (1 << 9)
#define USB_CNTL_BURST_8 (2 << 9)
#define USB_CNTL_BURST_16 (3 << 9)
#ifndef DEBUG
# define DEBUG(fmt,args...) do {} while(0)
#endif