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ar71xx: fix MII clock settings for various chips, improves ethernet stability on AR934x

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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@31925 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
nbd
2012-05-27 21:02:41 +00:00
parent 295c63c334
commit dfea949949
4 changed files with 32 additions and 7 deletions
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16
target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
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@@ -199,17 +199,25 @@ void __init ath79_register_mdio(unsigned int id, u32 phy_mask)
switch (ath79_soc) {
case ATH79_SOC_AR7240:
case ATH79_SOC_AR7241:
case ATH79_SOC_AR9330:
case ATH79_SOC_AR9331:
mdio_data->is_ar7240 = 1;
/* fall through */
case ATH79_SOC_AR7241:
mdio_data->builtin_switch = 1;
break;
case ATH79_SOC_AR9330:
mdio_data->is_ar9330 = 1;
/* fall through */
case ATH79_SOC_AR9331:
mdio_data->builtin_switch = 1;
break;
case ATH79_SOC_AR9341:
case ATH79_SOC_AR9342:
case ATH79_SOC_AR9344:
if (id == 1)
mdio_data->is_ar7240 = 1;
mdio_data->builtin_switch = 1;
mdio_data->is_ar934x = 1;
break;
default: