qi-hardware/openwrt-xburst
1
0
Fork 0
mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2025-04-21 12:27:27 +03:00
Code Activity

ar71xx: fix MII clock settings for various chips, improves ethernet stability on AR934x

Browse Source 
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@31925 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
nbd
2012-05-27 21:02:41 +00:00
parent 295c63c334
commit dfea949949
4 changed files with 32 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h
View File

@@ -322,6 +322,14 @@ static inline int ag71xx_desc_pktlen(struct ag71xx_desc *desc)
#define MII_CFG_CLK_DIV_14 5
#define MII_CFG_CLK_DIV_20 6
#define MII_CFG_CLK_DIV_28 7
#define MII_CFG_CLK_DIV_34 8
#define MII_CFG_CLK_DIV_42 9
#define MII_CFG_CLK_DIV_50 10
#define MII_CFG_CLK_DIV_58 11
#define MII_CFG_CLK_DIV_66 12
#define MII_CFG_CLK_DIV_74 13
#define MII_CFG_CLK_DIV_82 14
#define MII_CFG_CLK_DIV_98 15
#define MII_CFG_RESET BIT(31)
#define MII_CMD_WRITE 0x0

10
target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c
View File

@@ -103,6 +103,12 @@ static int ag71xx_mdio_reset(struct mii_bus *bus)
if (am->pdata->is_ar7240)
t = MII_CFG_CLK_DIV_6;
else if (am->pdata->is_ar9330)
t = MII_CFG_CLK_DIV_98;
else if (am->pdata->builtin_switch && !am->pdata->is_ar934x)
t = MII_CFG_CLK_DIV_10;
else if (!am->pdata->builtin_switch && am->pdata->is_ar934x)
t = MII_CFG_CLK_DIV_58;
else
t = MII_CFG_CLK_DIV_28;
@@ -119,7 +125,7 @@ static int ag71xx_mdio_read(struct mii_bus *bus, int addr, int reg)
{
struct ag71xx_mdio *am = bus->priv;
if (am->pdata->is_ar7240)
if (am->pdata->builtin_switch)
return ar7240sw_phy_read(bus, addr, reg);
else
return ag71xx_mdio_mii_read(am, addr, reg);
@@ -129,7 +135,7 @@ static int ag71xx_mdio_write(struct mii_bus *bus, int addr, int reg, u16 val)
{
struct ag71xx_mdio *am = bus->priv;
if (am->pdata->is_ar7240)
if (am->pdata->builtin_switch)
ar7240sw_phy_write(bus, addr, reg, val);
else
ag71xx_mdio_mii_write(am, addr, reg, val);