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mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2024-12-26 18:54:37 +02:00

Merge commit 'nbd/master' into xburst

This commit is contained in:
Lars-Peter Clausen 2010-02-07 12:45:12 +01:00
commit e172152438
447 changed files with 10503 additions and 16742 deletions

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@ -22,9 +22,11 @@ update_libtool_ucxx=$(call replace,libtool,$(STAGING_DIR)/host/bin,$(CONFIGURE_P
# prevent libtool from linking against host development libraries
define libtool_fixup_libdir
find $(1) -name '*.la' | $(XARGS) \
$(SED) "s,\(^libdir='\| \|-L\|^dependency_libs='\)/usr/lib,\1$(STAGING_DIR)/usr/lib,g"
$(SED) "s,\(^libdir='\| \|-L\|^dependency_libs='\)/usr/lib,\1$(STAGING_DIR)/usr/lib,g" \
-e "s,$(STAGING_DIR)/usr/lib/\(libstdc++\|libsupc++\).la,$(TOOLCHAIN_DIR)/usr/lib/\1.la,g"
find $(2) -name '*.la' | $(XARGS) \
$(SED) "s,\(^libdir='\| \|-L\|^dependency_libs='\)/usr/lib,\1$(STAGING_DIR)/usr/lib,g"
$(SED) "s,\(^libdir='\| \|-L\|^dependency_libs='\)/usr/lib,\1$(STAGING_DIR)/usr/lib,g" \
-e "s,$(STAGING_DIR)/usr/lib/\(libstdc++\|libsupc++\).la,$(TOOLCHAIN_DIR)/usr/lib/\1.la,g"
endef
define remove_version_check

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@ -44,7 +44,7 @@ ifneq ($(KBUILD_VERBOSE),99)
SILENT:=
endif
export QUIET:=1
SUBMAKE=cmd() { $(SILENT) $(MAKE) -s $$* || { echo "make $$*: build failed. Please re-run make with V=99 to see what's going on"; false; } } 8>&1 9>&2; cmd
SUBMAKE=cmd() { $(SILENT) $(MAKE) -s $$* < /dev/null || { echo "make $$*: build failed. Please re-run make with V=99 to see what's going on"; false; } } 8>&1 9>&2; cmd
endif
.SILENT: $(MAKECMDGOALS)

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@ -0,0 +1,29 @@
Index: sangam_atm-D7.04.03.00/tn7dsl.c
===================================================================
--- sangam_atm-D7.04.03.00.orig/tn7dsl.c 2010-02-01 22:30:45.000000000 +0100
+++ sangam_atm-D7.04.03.00/tn7dsl.c 2010-02-01 22:32:41.000000000 +0100
@@ -3431,8 +3431,11 @@
*/
if(write)
{
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32)
ret = proc_dostring(ctl, write, filp, buffer, lenp, 0);
-
+#else
+ ret = proc_dostring(ctl, write, buffer, lenp, 0);
+#endif
switch (ctl->ctl_name)
{
case DEV_DSLMOD:
@@ -3517,7 +3520,11 @@
else
{
len += sprintf(info+len, mod_req);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32)
ret = proc_dostring(ctl, write, filp, buffer, lenp, 0);
+#else
+ ret = proc_dostring(ctl, write, buffer, lenp, 0);
+#endif
}
return ret;
}

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@ -10,7 +10,7 @@ include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/kernel.mk
PKG_NAME:=base-files
PKG_RELEASE:=37
PKG_RELEASE:=38
PKG_FILE_DEPENDS:=$(PLATFORM_DIR)/ $(GENERIC_PLATFORM_DIR)/base-files/

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@ -2,6 +2,7 @@
# Copyright (C) 2006 OpenWrt.org
START=10
STOP=98
system_config() {
local cfg="$1"
@ -80,3 +81,8 @@ start() {
load_modules /etc/modules.d/*
}
stop() {
killall -9 syslogd 2> /dev/null
}

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@ -2,7 +2,7 @@
# Copyright (C) 2006 OpenWrt.org
START=40
STOP=40
STOP=90
boot() {
setup_switch() { return 0; }

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@ -4,5 +4,5 @@
STOP=99
stop() {
sync
umount -a -r
umount -a -r -l
}

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@ -10,7 +10,7 @@ mount_no_mtd() {
check_for_mtd() {
check_skip || {
grep rootfs_data /proc/mtd >/dev/null 2>/dev/null || {
grep -qs rootfs_data /proc/mtd || {
mount_no_mtd && pi_mount_skip_next=true
}
}

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@ -9,19 +9,19 @@ preinit_ip() {
pi_ifname=$ifname
fi
[ -n "$pi_ifname" ] && grep "$pi_ifname" /proc/net/dev >/dev/null && {
[ -n "$pi_ifname" ] && grep -q "$pi_ifname" /proc/net/dev && {
ifconfig $pi_ifname $pi_ip netmask $pi_netmask broadcast $pi_broadcast up
}
}
preinit_ip_deconfig() {
[ -n "$pi_ifname" ] && grep "$pi_ifname" /proc/net/dev >/dev/null && {
[ -n "$pi_ifname" ] && grep -q "$pi_ifname" /proc/net/dev && {
ifconfig $pi_ifname 0.0.0.0 down
}
}
preinit_net_echo() {
[ -n "$pi_ifname" ] && grep "$pi_ifname" /proc/net/dev >/dev/null && {
[ -n "$pi_ifname" ] && grep -q "$pi_ifname" /proc/net/dev && {
{
[ "$pi_preinit_net_messages" = "y" ] || {
[ "$pi_failsafe_net_message" = "true" ] &&

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@ -15,7 +15,7 @@ do_mount_udev() {
}
choose_device_fs() {
if grep devfs /proc/filesystems > /dev/null; then
if grep -q devfs /proc/filesystems; then
do_mount_devfs
elif [ -x /sbin/hotplug2 ]; then
do_mount_hotplug

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@ -23,7 +23,7 @@ init_udev() {
init_device_fs() {
HOTPLUG=
if grep devfs /proc/filesystems > /dev/null; then
if grep -q devfs /proc/filesystems; then
init_devfs
elif [ -x /sbin/hotplug2 ]; then
init_hotplug2

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@ -7,7 +7,7 @@ choose_console() {
# that's why we use /dev/pty/m0 and m1 (or equivalent) as replacement
# for /dev/console if there's no serial console available
if grep devfs /proc/filesystems > /dev/null; then
if grep -q devfs /proc/filesystems; then
M0=/dev/pty/m0
M1=/dev/pty/m1
M2=/dev/pty/m1

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@ -84,7 +84,10 @@ wifi_fixup_hwmode() {
}
wifi_updown() {
[ enable = "$1" ] && wifi_updown disable "$2"
[ enable = "$1" ] && {
wifi_updown disable "$2"
scan_wifi
}
for device in ${2:-$DEVICES}; do (
config_get disabled "$device" disabled
[ 1 == "$disabled" ] && {
@ -134,7 +137,7 @@ set_wifi_down() {
local vifs vif vifstr
[ -f "/var/run/wifi-${cfg}.pid" ] &&
kill "$(cat "/var/run/wifi-${cfg}.pid")"
kill "$(cat "/var/run/wifi-${cfg}.pid")" 2>/dev/null
uci_revert_state wireless "$cfg"
config_get vifs "$cfg" vifs
for vif in $vifs; do
@ -144,11 +147,13 @@ set_wifi_down() {
scan_wifi() {
local cfgfile="$1"
DEVICES=
config_cb() {
config_get TYPE "$CONFIG_SECTION" TYPE
case "$TYPE" in
wifi-device)
append DEVICES "$CONFIG_SECTION"
config_set "$CONFIG_SECTION" vifs ""
;;
wifi-iface)
config_get device "$CONFIG_SECTION" device

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@ -31,7 +31,8 @@ setup_interface () {
config_get old_subnet "$ifc" netmask
}
[ "$ip" != "$old_ip" ] \
[ "$1" = "ifup" ] \
|| [ "$ip" != "$old_ip" ] \
|| [ "${broadcast:-+}" != "$old_broadcast" ] \
|| [ "${subnet:-255.255.255.0}" != "$old_subnet" ] && {
echo "udhcpc: ifconfig $interface $ip netmask ${subnet:-255.255.255.0} broadcast ${broadcast:-+}"

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@ -335,9 +335,9 @@ EOF
detect_broadcom() {
local i=0
local i=-1
while [ -f /proc/net/wl$((i++)) ]; do
while [ -f /proc/net/wl$((++i)) ]; do
config_get type wl${i} type
[ "$type" = broadcom ] && continue
cat <<EOF

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@ -5,6 +5,7 @@
NAME=dropbear
PROG=/usr/sbin/dropbear
START=50
STOP=50
PIDCOUNT=0
EXTRA_COMMANDS="killclients"
EXTRA_HELP=" killclients Kill ${NAME} processes except servers and yourself"

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@ -76,6 +76,7 @@ define Package/hostapd/Default
TITLE:=IEEE 802.1x Authenticator
URL:=http://hostap.epitest.fi/
DEPENDS:=@!TARGET_avr32 @!TARGET_etrax +PACKAGE_kmod-mac80211:libnl-tiny
MAINTAINER:=Felix Fietkau <nbd@openwrt.org>
endef
define Package/hostapd
@ -116,6 +117,7 @@ define Package/wpad/Default
TITLE:=IEEE 802.1x Authenticator/Supplicant
URL:=http://hostap.epitest.fi/
DEPENDS:=@!TARGET_avr32 @!TARGET_etrax +PACKAGE_kmod-mac80211:libnl-tiny
MAINTAINER:=Felix Fietkau <nbd@openwrt.org>
endef
define Package/wpad
@ -146,6 +148,7 @@ define Package/wpa-supplicant
URL:=http://hostap.epitest.fi/wpa_supplicant/
DEPENDS:=@!TARGET_avr32 @!TARGET_etrax +PACKAGE_kmod-mac80211:libnl-tiny
VARIANT:=supplicant-full
MAINTAINER:=Felix Fietkau <nbd@openwrt.org>
endef
define Package/wpa-supplicant/Description
@ -172,6 +175,7 @@ define Package/wpa-cli
CATEGORY:=Network
DEPENDS:=wpa-supplicant
TITLE:=WPA Supplicant command line interface
MAINTAINER:=Felix Fietkau <nbd@openwrt.org>
endef
define Package/wpa-cli/Description

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@ -735,7 +735,7 @@
NLA_PUT(msg, NL80211_ATTR_MAC, ETH_ALEN, addr);
NLA_PUT_U32(msg, NL80211_ATTR_STA_VLAN,
if_nametoindex(ifname));
@@ -4181,10 +4174,11 @@ static int i802_set_sta_vlan(void *priv,
@@ -4181,18 +4174,19 @@ static int i802_set_sta_vlan(void *priv,
static int i802_set_wds_sta(void *priv, const u8 *addr, int aid, int val)
{
@ -747,9 +747,10 @@
- os_snprintf(name, sizeof(name), "%s.sta%d", drv->ifname, aid);
+ os_snprintf(name, sizeof(name), "%s.sta%d", bss->ifname, aid);
if (val) {
if (nl80211_create_iface(priv, name, NL80211_IFTYPE_AP_VLAN,
- if (nl80211_create_iface(priv, name, NL80211_IFTYPE_AP_VLAN,
+ if (nl80211_create_iface(drv, name, NL80211_IFTYPE_AP_VLAN,
NULL, 1) < 0)
@@ -4192,7 +4186,7 @@ static int i802_set_wds_sta(void *priv,
return -1;
linux_set_iface_flags(drv->ioctl_sock, name, 1);
return i802_set_sta_vlan(priv, addr, name, 0);
} else {
@ -902,8 +903,12 @@
return -1;
}
@@ -4484,9 +4483,12 @@ static int wpa_driver_nl80211_if_add(con
os_free(bss);
@@ -4481,12 +4480,15 @@ static int wpa_driver_nl80211_if_add(con
if (type == WPA_IF_AP_BSS) {
if (linux_set_iface_flags(drv->ioctl_sock, ifname, 1)) {
nl80211_remove_iface(drv, ifidx);
- os_free(bss);
+ os_free(new_bss);
return -1;
}
- bss->ifindex = ifidx;

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@ -43,6 +43,29 @@ endef
$(eval $(call KernelPackage,atmtcp))
define KernelPackage/appletalk
SUBMENU:=$(NETWORK_SUPPORT_MENU)
TITLE:=Appletalk protocol support
DEPENDS:=@LINUX_2_6
KCONFIG:= \
CONFIG_ATALK \
CONFIG_DEV_APPLETALK \
CONFIG_IPDDP \
CONFIG_IPDDP_ENCAP=y \
CONFIG_IPDDP_DECAP=y
FILES:= \
$(LINUX_DIR)/net/appletalk/appletalk.$(LINUX_KMOD_SUFFIX) \
$(LINUX_DIR)/drivers/net/appletalk/ipddp.$(LINUX_KMOD_SUFFIX)
AUTOLOAD:=$(call AutoLoad,40,appletalk ipddp)
endef
define KernelPackage/appletalk/description
Kernel module for AppleTalk protocol.
endef
$(eval $(call KernelPackage,appletalk))
define KernelPackage/bonding
SUBMENU:=$(NETWORK_SUPPORT_MENU)
TITLE:=Ethernet bonding driver

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@ -785,6 +785,24 @@ endef
$(eval $(call KernelPackage,cs5535-gpio))
define KernelPackage/ixp4xx-beeper
SUBMENU:=$(OTHER_MENU)
TITLE:=IXP4XX Beeper support
DEPENDS:=@TARGET_ixp4xx +kmod-input-core
KCONFIG:= \
CONFIG_INPUT_MISC=y \
CONFIG_INPUT_IXP4XX_BEEPER
FILES:=$(LINUX_DIR)/drivers/input/misc/ixp4xx-beeper.$(LINUX_KMOD_SUFFIX)
AUTOLOAD:=$(call AutoLoad,50,ixp4xx-beeper)
endef
define KernelPackage/ixp4xx-beeper/description
IXP4XX Beeper support
endef
$(eval $(call KernelPackage,ixp4xx-beeper))
define KernelPackage/textsearch
SUBMENU:=$(OTHER_MENU)
TITLE:=Textsearch support is selected if needed

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@ -10,6 +10,15 @@
(rm -f $@ && cp ltmain.shT $@ && rm -f ltmain.shT)
--- a/ltmain.in
+++ b/ltmain.in
@@ -2827,7 +2827,7 @@ EOF
fi
else
# We cannot seem to hardcode it, guess we'll fake it.
- add_dir="-L$libdir"
+ add_dir="-L@GLOBAL_LIBDIR@"
# Try looking first in the location we're being installed to.
if test -n "$inst_prefix_dir"; then
case $libdir in
@@ -5669,7 +5669,7 @@ fi\
$echo "$modename: \`$deplib' is not a valid libtool archive" 1>&2
exit $EXIT_FAILURE

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@ -10,12 +10,12 @@ include $(INCLUDE_DIR)/kernel.mk
PKG_NAME:=mac80211
PKG_VERSION:=2010-01-25
PKG_RELEASE:=2
PKG_VERSION:=2010-02-02
PKG_RELEASE:=1
PKG_SOURCE_URL:=http://mirror2.openwrt.org/sources
# http://www.orbit-lab.org/kernel/compat-wireless-2.6/2010/11 \
# http://wireless.kernel.org/download/compat-wireless-2.6
PKG_MD5SUM:=66a1d519e7ebcbadd4e47e6e56f705af
PKG_MD5SUM:=32602171b840132cbaa62d4b67f32d2c
PKG_SOURCE:=compat-wireless-$(PKG_VERSION).tar.bz2
PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/compat-wireless-$(PKG_VERSION)
@ -33,6 +33,7 @@ WMENU:=Wireless Drivers
define KernelPackage/mac80211/Default
SUBMENU:=$(WMENU)
URL:=http://linuxwireless.org/
MAINTAINER:=Felix Fietkau <nbd@openwrt.org>
DEPENDS:=@LINUX_2_6 @!TARGET_avr32 @(!(TARGET_ep93xx||TARGET_ps3||TARGET_pxcab)||BROKEN)
endef

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@ -247,6 +247,7 @@ enable_mac80211() {
# Hostapd will handle recreating the interface and
# it's accompanying monitor
apidx="$(($apidx + 1))"
i=$(($i + 1))
[ "$apidx" -gt 1 ] || iw phy "$phy" interface add "$ifname" type managed
;;
mesh)

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@ -8,7 +8,7 @@
#include <asm/unaligned.h>
#include "hw.h"
@@ -437,8 +438,18 @@ static int ath9k_hw_init_macaddr(struct
@@ -441,8 +442,18 @@ static int ath9k_hw_init_macaddr(struct
common->macaddr[2 * i] = eeval >> 8;
common->macaddr[2 * i + 1] = eeval & 0xff;
}

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@ -8,7 +8,7 @@
#include "ath9k.h"
static struct pci_device_id ath_pci_id_table[] __devinitdata = {
@@ -61,21 +62,36 @@ static void ath_pci_cleanup(struct ath_c
@@ -52,21 +53,36 @@ static void ath_pci_read_cachesize(struc
static bool ath_pci_eeprom_read(struct ath_common *common, u32 off, u16 *data)
{

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@ -1,6 +1,6 @@
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -381,11 +381,8 @@ static void ath9k_hw_init_defaults(struc
@@ -385,11 +385,8 @@ static void ath9k_hw_init_defaults(struc
ah->hw_version.magic = AR5416_MAGIC;
ah->hw_version.subvendorid = 0;

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@ -11,7 +11,7 @@
#include "hw.h"
#include "rc.h"
#include "initvals.h"
@@ -424,17 +426,23 @@ static int ath9k_hw_rf_claim(struct ath_
@@ -428,17 +430,23 @@ static int ath9k_hw_rf_claim(struct ath_
static int ath9k_hw_init_macaddr(struct ath_hw *ah)
{
struct ath_common *common = ath9k_hw_common(ah);

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@ -1,6 +1,6 @@
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -2087,7 +2087,7 @@ int ath9k_hw_reset(struct ath_hw *ah, st
@@ -2092,7 +2092,7 @@ int ath9k_hw_reset(struct ath_hw *ah, st
if (ah->config.rx_intr_mitigation) {
REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_LAST, 500);

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@ -1,8 +1,8 @@
--- a/drivers/net/wireless/ath/ath9k/debug.c
+++ b/drivers/net/wireless/ath/ath9k/debug.c
@@ -75,6 +75,90 @@ static const struct file_operations fops
@@ -77,6 +77,90 @@ static const struct file_operations fops
#endif
#define DMA_BUF_LEN 1024
+static ssize_t read_file_tx_chainmask(struct file *file, char __user *user_buf,
+ size_t count, loff_t *ppos)
@ -91,7 +91,7 @@
static ssize_t read_file_dma(struct file *file, char __user *user_buf,
size_t count, loff_t *ppos)
{
@@ -710,6 +794,16 @@ int ath9k_init_debug(struct ath_hw *ah)
@@ -719,6 +803,16 @@ int ath9k_init_debug(struct ath_hw *ah)
goto err;
#endif
@ -108,7 +108,7 @@
sc->debug.debugfs_dma = debugfs_create_file("dma", S_IRUSR,
sc->debug.debugfs_phy, sc, &fops_dma);
if (!sc->debug.debugfs_dma)
@@ -760,6 +854,8 @@ void ath9k_exit_debug(struct ath_hw *ah)
@@ -769,6 +863,8 @@ void ath9k_exit_debug(struct ath_hw *ah)
struct ath_common *common = ath9k_hw_common(ah);
struct ath_softc *sc = (struct ath_softc *) common->priv;

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@ -1,6 +1,6 @@
--- a/drivers/net/wireless/ath/ath9k/debug.c
+++ b/drivers/net/wireless/ath/ath9k/debug.c
@@ -774,6 +774,86 @@ static const struct file_operations fops
@@ -783,6 +783,86 @@ static const struct file_operations fops
.owner = THIS_MODULE
};
@ -87,7 +87,7 @@
int ath9k_init_debug(struct ath_hw *ah)
{
struct ath_common *common = ath9k_hw_common(ah);
@@ -843,6 +923,17 @@ int ath9k_init_debug(struct ath_hw *ah)
@@ -852,6 +932,17 @@ int ath9k_init_debug(struct ath_hw *ah)
if (!sc->debug.debugfs_recv)
goto err;
@ -105,7 +105,7 @@
return 0;
err:
ath9k_exit_debug(ah);
@@ -856,6 +947,8 @@ void ath9k_exit_debug(struct ath_hw *ah)
@@ -865,6 +956,8 @@ void ath9k_exit_debug(struct ath_hw *ah)
debugfs_remove(sc->debug.debugfs_tx_chainmask);
debugfs_remove(sc->debug.debugfs_rx_chainmask);

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@ -1,6 +1,6 @@
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -1228,6 +1228,11 @@ void ath9k_hw_init_global_settings(struc
@@ -1233,6 +1233,11 @@ void ath9k_hw_init_global_settings(struc
/* As defined by IEEE 802.11-2007 17.3.8.6 */
slottime = ah->slottime + 3 * ah->coverage_class;
acktimeout = slottime + sifstime;

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@ -0,0 +1,20 @@
--- a/drivers/net/wireless/ath/ath9k/xmit.c
+++ b/drivers/net/wireless/ath/ath9k/xmit.c
@@ -1610,7 +1610,7 @@ static int ath_tx_setup_buffer(struct ie
bf->bf_frmlen -= padsize;
}
- if (conf_is_ht(&hw->conf) && !is_pae(skb))
+ if (conf_is_ht(&hw->conf))
bf->bf_state.bf_type |= BUF_HT;
bf->bf_flags = setup_tx_flags(sc, skb, txctl->txq);
@@ -1696,7 +1696,7 @@ static void ath_tx_start_dma(struct ath_
goto tx_done;
}
- if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
+ if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && !is_pae(skb)) {
/*
* Try aggregation if it's a unicast data frame
* and the destination is HT capable.

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@ -161,6 +161,7 @@ define KernelPackage/madwifi
SUBMENU:=Wireless Drivers
TITLE:=Driver for Atheros wireless chipsets
URL:=http://madwifi-project.org/
MAINTAINER:=Felix Fietkau <nbd@openwrt.org>
DEPENDS:=+wireless-tools @PCI_SUPPORT||TARGET_atheros @!TARGET_avr32 @!TARGET_etrax @!TARGET_sibyte @!TARGET_cobalt @!TARGET_octeon @LINUX_2_6 @(!(TARGET_ep93xx||TARGET_pxcab)||BROKEN)
FILES:=$(MADWIFI_FILES)
AUTOLOAD:=$(call AutoLoad,50,$(MADWIFI_AUTOLOAD))

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@ -18,7 +18,7 @@ define Package/nvram
SECTION:=utils
CATEGORY:=Base system
TITLE:=Userspace port of the Broadcom NVRAM manipulation tool
DEPENDS:=@TARGET_brcm_2_4||@TARGET_brcm47xx
DEPENDS:=@TARGET_brcm_2_4||@TARGET_brcm47xx||@TARGET_ar71xx
endef
define Package/nvram/description

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@ -2,7 +2,7 @@
* NVRAM variable manipulation (common)
*
* Copyright 2004, Broadcom Corporation
* Copyright 2009, OpenWrt.org
* Copyright 2009-2010, OpenWrt.org
* All Rights Reserved.
*
* THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
@ -357,7 +357,7 @@ nvram_handle_t * nvram_open(const char *file, int rdonly)
{
char *mmap_area = (char *) mmap(
NULL, nvram_erase_size, PROT_READ | PROT_WRITE,
( rdonly == NVRAM_RO ) ? MAP_PRIVATE : MAP_SHARED, fd, 0);
(( rdonly == NVRAM_RO ) ? MAP_PRIVATE : MAP_SHARED) | MAP_LOCKED, fd, 0);
if( mmap_area != MAP_FAILED )
{

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@ -30,6 +30,7 @@ define KernelPackage/wprobe
$(call Package/wprobe/Default)
SUBMENU:=Network Support
TITLE:=Wireless driver probe infrastructure
MAINTAINER:=Felix Fietkau <nbd@openwrt.org>
FILES:= \
$(PKG_BUILD_DIR)/kernel/wprobe.$(LINUX_KMOD_SUFFIX)
AUTOLOAD:=$(call AutoLoad,01,wprobe)

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@ -560,7 +560,9 @@ wprobe_msg_to_network(int socket, struct nl_msg *msg)
mhdr.status = WPROBE_MSG_DATA;
mhdr.len = buflen;
wprobe_swap_msg_hdr(&mhdr);
write(socket, &mhdr, sizeof(mhdr));
ret = write(socket, &mhdr, sizeof(mhdr));
if (ret < 0)
goto out;
memcpy(buf, nlh, buflen);
nlh = buf;
@ -572,6 +574,8 @@ wprobe_msg_to_network(int socket, struct nl_msg *msg)
swap_genlmsghdr(gnlh);
swap_nlmsghdr(nlh);
ret = write(socket, buf, buflen);
out:
free(buf);
return ret;

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@ -18,12 +18,4 @@ define Target/Description
Build firmware images for Infineon Amazon boards
endef
ifeq ($(KERNEL_PATCHVER),2.6.30)
define Kernel/Prepare
$(call Kernel/Prepare/Default)
mv $(LINUX_DIR)/include/asm-mips/mach-amazon $(LINUX_DIR)/arch/mips/include/asm/mach-amazon
mv $(LINUX_DIR)/drivers/char/watchdog/amazon_wdt.c $(LINUX_DIR)/drivers/watchdog/amazon_wdt.c
endef
endif
$(eval $(call BuildTarget))

View File

@ -1,28 +1,42 @@
CONFIG_32BIT=y
# CONFIG_64BIT is not set
# CONFIG_64BIT_PHYS_ADDR is not set
CONFIG_ADM6996_SUPPORT=y
# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
CONFIG_AMAZON=y
CONFIG_AMAZON_ASC_UART=y
CONFIG_AMAZON_MTD=y
CONFIG_AMAZON_NET_SW=y
CONFIG_AMAZON_PCI=y
CONFIG_AMAZON_WDT=y
CONFIG_AMAZON=y
# CONFIG_AR7 is not set
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_POPULATES_NODE_MAP=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
# CONFIG_BCM47XX is not set
# CONFIG_BCM63XX is not set
CONFIG_BITREVERSE=y
# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
CONFIG_CEVT_R4K=y
CONFIG_CEVT_R4K_LIB=y
CONFIG_CFG80211_DEFAULT_PS_VALUE=0
CONFIG_CMDLINE="console=ttyS0,115200 rootfstype=squashfs,jffs2 init=/bin/sh"
CONFIG_CPU_BIG_ENDIAN=y
CONFIG_CPU_HAS_LLSC=y
# CONFIG_CPU_CAVIUM_OCTEON is not set
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
# CONFIG_CPU_LOONGSON2E is not set
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS32_R1 is not set
CONFIG_CPU_MIPS32_R2=y
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR1=y
CONFIG_CPU_MIPSR2=y
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_R3000 is not set
@ -30,6 +44,7 @@ CONFIG_CPU_MIPSR1=y
# CONFIG_CPU_R4X00 is not set
# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_R5432 is not set
# CONFIG_CPU_R5500 is not set
# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_RM7000 is not set
@ -40,59 +55,52 @@ CONFIG_CPU_SUPPORTS_HIGHMEM=y
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_VR41XX is not set
# CONFIG_DDB5477 is not set
CONFIG_CSRC_R4K=y
CONFIG_CSRC_R4K_LIB=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DEVPORT=y
# CONFIG_DM9000 is not set
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_EARLY_PRINTK=y
# CONFIG_FSNOTIFY is not set
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
# CONFIG_GENERIC_GPIO is not set
# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set
# CONFIG_GEN_RTC is not set
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
CONFIG_HARDWARE_WATCHPOINTS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_HAVE_IDE=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HAVE_STD_PC_SERIAL_PORT=y
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=y
# CONFIG_IDE is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQ_CPU=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_KALLSYMS=y
# CONFIG_MACH_ALCHEMY is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_MACH_LOONGSON is not set
# CONFIG_MACH_TX39XX is not set
# CONFIG_MACH_TX49XX is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_BOSPORUS is not set
# CONFIG_MIKROTIK_RB532 is not set
CONFIG_MIPS=y
# CONFIG_MIPS_COBALT is not set
# CONFIG_MIPS_DB1000 is not set
# CONFIG_MIPS_DB1100 is not set
# CONFIG_MIPS_DB1200 is not set
# CONFIG_MIPS_DB1500 is not set
# CONFIG_MIPS_DB1550 is not set
# CONFIG_MIPS_EV64120 is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_MIPS_MACHINE is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_MIRAGE is not set
CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_MTX1 is not set
# CONFIG_MIPS_PB1000 is not set
# CONFIG_MIPS_PB1100 is not set
# CONFIG_MIPS_PB1200 is not set
# CONFIG_MIPS_PB1500 is not set
# CONFIG_MIPS_PB1550 is not set
# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MIPS_VPE_LOADER is not set
# CONFIG_MIPS_XXS1500 is not set
CONFIG_MIPS=y
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT is not set
CONFIG_MTD_AMAZON_BUS_WIDTH_16=y
# CONFIG_MTD_AMAZON_BUS_WIDTH_32 is not set
# CONFIG_MTD_AMAZON_BUS_WIDTH_8 is not set
@ -103,44 +111,44 @@ CONFIG_MTD_AMAZON_FLASH_SIZE_4=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
# CONFIG_MTD_CFI_GEOMETRY is not set
# CONFIG_MTD_CFI_INTELEXT is not set
# CONFIG_MTD_OBSOLETE_CHIPS is not set
CONFIG_MTD_PHYSMAP_BANKWIDTH=0
CONFIG_MTD_PHYSMAP_LEN=0x0
CONFIG_MTD_PHYSMAP_START=0x0
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-3
# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
CONFIG_MTD_REDBOOT_PARTS=y
# CONFIG_NET_PCI is not set
CONFIG_NET_SCH_FIFO=y
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_PCIPCWATCHDOG is not set
# CONFIG_NO_IOPORT is not set
# CONFIG_NXP_STB220 is not set
# CONFIG_NXP_STB225 is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PCI_DOMAINS=y
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_PNPACPI is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_RTC is not set
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
# CONFIG_PROBE_INITRD_HEADER is not set
CONFIG_SCHED_OMIT_FRAME_POINTER=y
# CONFIG_SCSI_DMA is not set
# CONFIG_SERIAL_8250 is not set
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP28 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SIBYTE_BIGSUR is not set
# CONFIG_SIBYTE_CARMEL is not set
# CONFIG_SIBYTE_CRHINE is not set
# CONFIG_SIBYTE_CRHONE is not set
# CONFIG_SIBYTE_LITTLESUR is not set
# CONFIG_SIBYTE_PTSWARM is not set
# CONFIG_SIBYTE_RHONE is not set
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_SWARM is not set
CONFIG_SWAP_IO_SPACE=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_CPU_MIPS32_R2=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_TOSHIBA_RBTX4927 is not set
# CONFIG_TOSHIBA_RBTX4938 is not set
CONFIG_TRAD_SIGNALS=y
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_TREE_PREEMPT_RCU is not set
CONFIG_TREE_RCU=y
CONFIG_USB_SUPPORT=y
CONFIG_ZONE_DMA_FLAG=0

View File

@ -1387,7 +1387,7 @@ static int dma_init(void)
AMAZON_DMA_EMSG("cannot register device dma-core!\n");
return result;
}
result = request_irq(AMAZON_DMA_INT, dma_interrupt, SA_INTERRUPT, "dma-core", (void *) &dma_interrupt);
result = request_irq(AMAZON_DMA_INT, dma_interrupt, IRQF_DISABLED, "dma-core", (void *) &dma_interrupt);
if (result) {
AMAZON_DMA_EMSG("error, cannot get dma_irq!\n");
free_irq(AMAZON_DMA_INT, (void *) &dma_interrupt);

View File

@ -109,8 +109,8 @@ static void amazon_end_irq(unsigned int irq)
}
}
static struct hw_interrupt_type amazon_irq_type = {
"AMAZON",
static struct irq_chip amazon_irq_type = {
.name = "AMAZON",
.startup = amazon_startup_irq,
.enable = amazon_enable_irq,
.disable = amazon_disable_irq,
@ -157,7 +157,7 @@ out:
static struct irqaction cascade = {
.handler = no_action,
.flags = SA_INTERRUPT,
.flags = IRQF_DISABLED,
.name = "cascade",
};
@ -177,10 +177,16 @@ void __init arch_init_irq(void)
setup_irq(i, &cascade);
}
for (i = INT_NUM_IRQ0; i <= INT_NUM_IM4_IRL31; i++) {
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = 0;
irq_desc[i].depth = 1;
set_irq_chip(i, &amazon_irq_type);
}
for (i = INT_NUM_IRQ0; i <= INT_NUM_IM4_IRL31; i++)
set_irq_chip_and_handler(i, &amazon_irq_type,
handle_level_irq);
set_c0_status(IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5);
}
void __cpuinit arch_fixup_c0_irqs(void)
{
/* FIXME: check for CPUID and only do fix for specific chips/versions */
cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ;
cp0_perfcount_irq = CP0_LEGACY_PERFCNT_IRQ;
}

View File

@ -39,33 +39,12 @@ void prom_putchar(char c)
amazon_writel(c, AMAZON_ASC_TBUF);
}
void prom_printf(const char * fmt, ...)
{
va_list args;
int l;
char *p, *buf_end;
char buf[1024];
va_start(args, fmt);
/* FIXME - hopefully i < sizeof(buf) */
l = vsprintf(buf, fmt, args);
va_end(args);
buf_end = buf + l;
for (p = buf; p < buf_end; p++)
prom_putchar(*p);
}
void __init prom_init(void)
{
char **envp = (char **) fw_arg2;
int memsize = 16; /* assume 16M as default */
mips_machgroup = MACH_GROUP_INFINEON;
mips_machtype = MACH_INFINEON_AMAZON;
envp = (char **)KSEG1ADDR((unsigned long)envp);
while (*envp) {
char *e = (char *)KSEG1ADDR(*envp);

View File

@ -36,7 +36,12 @@
#include <asm/amazon/irq.h>
#include <asm/amazon/model.h>
extern void prom_printf(const char * fmt, ...);
static unsigned int r4k_offset;
static unsigned int r4k_cur;
/* required in arch/mips/kernel/kspd.c */
unsigned long cpu_khz;
static void amazon_reboot_setup(void);
/* the CPU clock rate - lifted from u-boot */
@ -81,6 +86,7 @@ unsigned int amazon_get_fpi_hz(void)
/* '11' is reserved */
}
}
EXPORT_SYMBOL(amazon_get_fpi_hz);
/* this doesn't really belong here, but it's a convenient location */
unsigned int amazon_get_cpu_ver(void)
@ -91,35 +97,32 @@ unsigned int amazon_get_cpu_ver(void)
return cpu_ver;
}
void amazon_time_init(void)
static inline u32 amazon_get_counter_resolution(void)
{
mips_hpt_frequency = amazon_get_cpu_hz()/2;
u32 res;
__asm__ __volatile__(
".set push\n"
".set mips32r2\n"
".set noreorder\n"
"rdhwr %0, $3\n"
"ehb\n"
".set pop\n"
: "=&r" (res)
: /* no input */
: "memory");
instruction_hazard();
return res;
}
void __init plat_time_init(void)
{
mips_hpt_frequency = amazon_get_cpu_hz() / amazon_get_counter_resolution();
r4k_offset = mips_hpt_frequency / HZ;
printk("mips_hpt_frequency:%d\n", mips_hpt_frequency);
}
printk("r4k_offset: %08x(%d)\n", r4k_offset, r4k_offset);
extern int hr_time_resolution;
/* ISR GPTU Timer 6 for high resolution timer */
static void amazon_timer6_interrupt(int irq, void *dev_id)
{
timer_interrupt(AMAZON_TIMER6_INT, NULL);
}
static struct irqaction hrt_irqaction = {
.handler = amazon_timer6_interrupt,
.flags = SA_INTERRUPT,
.name = "hrt",
};
/*
* THe CPU counter for System timer, set to HZ
* GPTU Timer 6 for high resolution timer, set to hr_time_resolution
* Also misuse this routine to print out the CPU type and clock.
*/
void __init plat_timer_setup(struct irqaction *irq)
{
/* cpu counter for timer interrupts */
setup_irq(MIPS_CPU_TIMER_IRQ, irq);
r4k_cur = (read_c0_count() + r4k_offset);
write_c0_compare(r4k_cur);
/* enable the timer in the PMU */
amazon_writel(amazon_readl(AMAZON_PMU_PWDCR)| AMAZON_PMU_PWDCR_GPT|AMAZON_PMU_PWDCR_FPI, AMAZON_PMU_PWDCR);
@ -139,15 +142,14 @@ void __init plat_mem_setup(void)
part_no = AMAZON_MCD_CHIPID_PART_NUMBER_GET(chipid);
if(part_no == AMAZON_CHIPID_YANGTSE){
prom_printf("Yangtse Version\n");
printk("Yangtse Version\n");
} else if (part_no == AMAZON_CHIPID_STANDARD) {
prom_printf(SYSTEM_MODEL_NAME "\n");
printk(SYSTEM_MODEL_NAME "\n");
} else {
prom_printf("unknown version %8x\n",part_no);
printk("unknown version %8x\n",part_no);
}
amazon_reboot_setup();
board_time_init = amazon_time_init;
//stop reset TPE and DFE
amazon_writel(0, AMAZON_RST_REQ);

View File

@ -2404,13 +2404,13 @@ amazon_atm_dev_t * amazon_atm_create(void)
// Register interrupts for insertion and extraction
request_irq(AMAZON_SWIE_INT, amazon_atm_swie_isr, SA_INTERRUPT, "tpe_swie", NULL);
request_irq(AMAZON_CBM_INT, amazon_atm_cbm_isr, SA_INTERRUPT, "tpe_cbm", NULL);
request_irq(AMAZON_SWIE_INT, amazon_atm_swie_isr, IRQF_DISABLED, "tpe_swie", NULL);
request_irq(AMAZON_CBM_INT, amazon_atm_cbm_isr, IRQF_DISABLED, "tpe_cbm", NULL);
#ifdef AMAZON_ATM_DEBUG
request_irq(AMAZON_HTU_INT , amazon_atm_htu_isr, SA_INTERRUPT, "tpe_htu", NULL);
request_irq(AMAZON_HTU_INT , amazon_atm_htu_isr, IRQF_DISABLED, "tpe_htu", NULL);
#endif
#ifdef AMAZON_TPE_TEST_AAL5_INT
request_irq(AMAZON_AAL5_INT, amazon_atm_aal5_isr, SA_INTERRUPT, "tpe_aal5", NULL);
request_irq(AMAZON_AAL5_INT, amazon_atm_aal5_isr, IRQF_DISABLED, "tpe_aal5", NULL);
#endif
return &g_atm_dev;
}

View File

@ -778,6 +778,17 @@ int switch_set_mac_address(struct net_device *dev, void *p)
return OK;
}
static const struct net_device_ops amazon_mii_ops = {
.ndo_init = switch_init,
.ndo_open = switch_open,
.ndo_stop = switch_release,
.ndo_start_xmit = switch_tx,
.ndo_do_ioctl = switch_ioctl,
.ndo_get_stats = switch_stats,
.ndo_change_mtu = switch_change_mtu,
.ndo_set_mac_address = switch_set_mac_address,
.ndo_tx_timeout = switch_tx_timeout,
};
int switch_init(struct net_device *dev)
{
@ -787,14 +798,6 @@ int switch_init(struct net_device *dev)
struct switch_priv *priv;
ether_setup(dev); /* assign some of the fields */
printk(KERN_INFO "amazon_mii0: %s up using ", dev->name);
dev->open = switch_open;
dev->stop = switch_release;
dev->hard_start_xmit = switch_tx;
dev->do_ioctl = switch_ioctl;
dev->get_stats = switch_stats;
dev->change_mtu = switch_change_mtu;
dev->set_mac_address = switch_set_mac_address;
dev->tx_timeout = switch_tx_timeout;
dev->watchdog_timeo = timeout;
priv = netdev_priv(dev);
@ -836,7 +839,7 @@ static int amazon_mii_probe(struct platform_device *dev)
for (i = 0; i < AMAZON_SW_INT_NO; i++) {
switch_devs[i] = alloc_etherdev(sizeof(struct switch_priv));
switch_devs[i]->init = switch_init;
switch_devs[i]->netdev_ops = &amazon_mii_ops;
strcpy(switch_devs[i]->name, "eth%d");
priv = (struct switch_priv *) netdev_priv(switch_devs[i]);
priv->num = i;

View File

@ -68,11 +68,9 @@
#define SERIAL_AMAZONASC_NR UART_NR
static void amazonasc_tx_chars(struct uart_port *port);
extern void prom_printf(const char * fmt, ...);
static struct uart_port amazonasc_ports[UART_NR];
static struct uart_driver amazonasc_reg;
static unsigned int uartclk = 0;
extern unsigned int amazon_get_fpi_hz(void);
static void amazonasc_stop_tx(struct uart_port *port)
{
@ -108,10 +106,10 @@ static void amazonasc_enable_ms(struct uart_port *port)
static void
amazonasc_rx_chars(struct uart_port *port)
{
#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 26))
struct tty_struct *tty = port->info->port.tty;
#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 31))
struct tty_struct *tty = port->state->port.tty;
#else
struct tty_struct *tty = port->info->tty;
struct tty_struct *tty = port->info->port.tty;
#endif
unsigned int ch = 0, rsr = 0, fifocnt;
@ -169,7 +167,11 @@ amazonasc_rx_chars(struct uart_port *port)
static void amazonasc_tx_chars(struct uart_port *port)
{
#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 31))
struct circ_buf *xmit = &port->state->xmit;
#else
struct circ_buf *xmit = &port->info->xmit;
#endif
if (uart_tx_stopped(port)) {
amazonasc_stop_tx(port);
@ -654,13 +656,6 @@ static struct console amazonasc_console = {
data: &amazonasc_reg,
};
static int __init amazonasc_console_init(void)
{
register_console(&amazonasc_console);
return 0;
}
console_initcall(amazonasc_console_init);
static struct uart_driver amazonasc_reg = {
.owner = THIS_MODULE,
.driver_name = "serial",
@ -679,7 +674,7 @@ static int __init amazon_asc_probe(struct platform_device *dev)
return res;
}
static int __exit amazon_asc_remove(struct platform_device *dev)
static int amazon_asc_remove(struct platform_device *dev)
{
uart_unregister_driver(&amazonasc_reg);
return 0;

View File

@ -44,7 +44,6 @@
#undef AMAZON_WDT_DEBUG
extern unsigned int amazon_get_fpi_hz(void);
static int amazon_wdt_isopen = 0;
#ifdef AMAZON_WDT_DEBUG

View File

@ -29,6 +29,8 @@
#define amazon_writel(a,b) __raw_writel(a, ((u32*)(b)))
#define amazon_writel_masked(a,b,c) __raw_writel((__raw_readl(((u32*)(a))) & ~b) | (c & b), ((u32*)(a)))
unsigned int amazon_get_fpi_hz(void);
#define IOPORT_RESOURCE_START 0x10000000
#define IOPORT_RESOURCE_END 0xffffffff
#define IOMEM_RESOURCE_START 0x10000000

View File

@ -1,53 +0,0 @@
--- a/arch/mips/amazon/dma-core.c
+++ b/arch/mips/amazon/dma-core.c
@@ -1387,7 +1387,7 @@ static int dma_init(void)
AMAZON_DMA_EMSG("cannot register device dma-core!\n");
return result;
}
- result = request_irq(AMAZON_DMA_INT, dma_interrupt, SA_INTERRUPT, "dma-core", (void *) &dma_interrupt);
+ result = request_irq(AMAZON_DMA_INT, dma_interrupt, IRQF_DISABLED, "dma-core", (void *) &dma_interrupt);
if (result) {
AMAZON_DMA_EMSG("error, cannot get dma_irq!\n");
free_irq(AMAZON_DMA_INT, (void *) &dma_interrupt);
--- a/arch/mips/amazon/interrupt.c
+++ b/arch/mips/amazon/interrupt.c
@@ -157,7 +157,7 @@ out:
static struct irqaction cascade = {
.handler = no_action,
- .flags = SA_INTERRUPT,
+ .flags = IRQF_DISABLED,
.name = "cascade",
};
--- a/arch/mips/amazon/setup.c
+++ b/arch/mips/amazon/setup.c
@@ -107,7 +107,7 @@ static void amazon_timer6_interrupt(int
static struct irqaction hrt_irqaction = {
.handler = amazon_timer6_interrupt,
- .flags = SA_INTERRUPT,
+ .flags = IRQF_DISABLED,
.name = "hrt",
};
--- a/drivers/atm/amazon_tpe.c
+++ b/drivers/atm/amazon_tpe.c
@@ -2404,13 +2404,13 @@ amazon_atm_dev_t * amazon_atm_create(voi
// Register interrupts for insertion and extraction
- request_irq(AMAZON_SWIE_INT, amazon_atm_swie_isr, SA_INTERRUPT, "tpe_swie", NULL);
- request_irq(AMAZON_CBM_INT, amazon_atm_cbm_isr, SA_INTERRUPT, "tpe_cbm", NULL);
+ request_irq(AMAZON_SWIE_INT, amazon_atm_swie_isr, IRQF_DISABLED, "tpe_swie", NULL);
+ request_irq(AMAZON_CBM_INT, amazon_atm_cbm_isr, IRQF_DISABLED, "tpe_cbm", NULL);
#ifdef AMAZON_ATM_DEBUG
- request_irq(AMAZON_HTU_INT , amazon_atm_htu_isr, SA_INTERRUPT, "tpe_htu", NULL);
+ request_irq(AMAZON_HTU_INT , amazon_atm_htu_isr, IRQF_DISABLED, "tpe_htu", NULL);
#endif
#ifdef AMAZON_TPE_TEST_AAL5_INT
- request_irq(AMAZON_AAL5_INT, amazon_atm_aal5_isr, SA_INTERRUPT, "tpe_aal5", NULL);
+ request_irq(AMAZON_AAL5_INT, amazon_atm_aal5_isr, IRQF_DISABLED, "tpe_aal5", NULL);
#endif
return &g_atm_dev;
}

View File

@ -1,12 +0,0 @@
--- a/arch/mips/amazon/prom.c
+++ b/arch/mips/amazon/prom.c
@@ -63,9 +63,6 @@ void __init prom_init(void)
int memsize = 16; /* assume 16M as default */
- mips_machgroup = MACH_GROUP_INFINEON;
- mips_machtype = MACH_INFINEON_AMAZON;
-
envp = (char **)KSEG1ADDR((unsigned long)envp);
while (*envp) {
char *e = (char *)KSEG1ADDR(*envp);

View File

@ -1,93 +0,0 @@
--- a/arch/mips/amazon/setup.c
+++ b/arch/mips/amazon/setup.c
@@ -36,6 +36,12 @@
#include <asm/amazon/irq.h>
#include <asm/amazon/model.h>
+static unsigned int r4k_offset;
+static unsigned int r4k_cur;
+
+/* required in arch/mips/kernel/kspd.c */
+unsigned long cpu_khz;
+
extern void prom_printf(const char * fmt, ...);
static void amazon_reboot_setup(void);
@@ -91,35 +97,32 @@ unsigned int amazon_get_cpu_ver(void)
return cpu_ver;
}
-void amazon_time_init(void)
+static inline u32 amazon_get_counter_resolution(void)
{
- mips_hpt_frequency = amazon_get_cpu_hz()/2;
- printk("mips_hpt_frequency:%d\n", mips_hpt_frequency);
+ u32 res;
+ __asm__ __volatile__(
+ ".set push\n"
+ ".set mips32r2\n"
+ ".set noreorder\n"
+ "rdhwr %0, $3\n"
+ "ehb\n"
+ ".set pop\n"
+ : "=&r" (res)
+ : /* no input */
+ : "memory");
+ instruction_hazard();
+ return res;
}
-extern int hr_time_resolution;
-
-/* ISR GPTU Timer 6 for high resolution timer */
-static void amazon_timer6_interrupt(int irq, void *dev_id)
+void __init plat_time_init(void)
{
- timer_interrupt(AMAZON_TIMER6_INT, NULL);
-}
-
-static struct irqaction hrt_irqaction = {
- .handler = amazon_timer6_interrupt,
- .flags = IRQF_DISABLED,
- .name = "hrt",
-};
+ mips_hpt_frequency = amazon_get_cpu_hz() / amazon_get_counter_resolution();
+ r4k_offset = mips_hpt_frequency / HZ;
+ printk("mips_hpt_frequency:%d\n", mips_hpt_frequency);
+ printk("r4k_offset: %08x(%d)\n", r4k_offset, r4k_offset);
-/*
- * THe CPU counter for System timer, set to HZ
- * GPTU Timer 6 for high resolution timer, set to hr_time_resolution
- * Also misuse this routine to print out the CPU type and clock.
- */
-void __init plat_timer_setup(struct irqaction *irq)
-{
- /* cpu counter for timer interrupts */
- setup_irq(MIPS_CPU_TIMER_IRQ, irq);
+ r4k_cur = (read_c0_count() + r4k_offset);
+ write_c0_compare(r4k_cur);
/* enable the timer in the PMU */
amazon_writel(amazon_readl(AMAZON_PMU_PWDCR)| AMAZON_PMU_PWDCR_GPT|AMAZON_PMU_PWDCR_FPI, AMAZON_PMU_PWDCR);
@@ -147,7 +150,6 @@ void __init plat_mem_setup(void)
}
amazon_reboot_setup();
- board_time_init = amazon_time_init;
//stop reset TPE and DFE
amazon_writel(0, AMAZON_RST_REQ);
--- a/arch/mips/amazon/interrupt.c
+++ b/arch/mips/amazon/interrupt.c
@@ -184,3 +184,10 @@ void __init arch_init_irq(void)
set_irq_chip(i, &amazon_irq_type);
}
}
+
+void __cpuinit arch_fixup_c0_irqs(void)
+{
+ /* FIXME: check for CPUID and only do fix for specific chips/versions */
+ cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ;
+ cp0_perfcount_irq = CP0_LEGACY_PERFCNT_IRQ;
+}

View File

@ -1,20 +0,0 @@
--- a/arch/mips/amazon/interrupt.c
+++ b/arch/mips/amazon/interrupt.c
@@ -177,12 +177,11 @@ void __init arch_init_irq(void)
setup_irq(i, &cascade);
}
- for (i = INT_NUM_IRQ0; i <= INT_NUM_IM4_IRL31; i++) {
- irq_desc[i].status = IRQ_DISABLED;
- irq_desc[i].action = 0;
- irq_desc[i].depth = 1;
- set_irq_chip(i, &amazon_irq_type);
- }
+ for (i = INT_NUM_IRQ0; i <= INT_NUM_IM4_IRL31; i++)
+ set_irq_chip_and_handler(i, &amazon_irq_type,
+ handle_level_irq);
+
+ set_c0_status(IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5);
}
void __cpuinit arch_fixup_c0_irqs(void)

View File

@ -0,0 +1,32 @@
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1537,7 +1537,16 @@ void __cpuinit per_cpu_trap_init(void)
*/
if (cpu_has_mips_r2) {
cp0_compare_irq = (read_c0_intctl() >> 29) & 7;
+ if (!cp0_compare_irq)
+ cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ;
+
cp0_perfcount_irq = (read_c0_intctl() >> 26) & 7;
+ if (!cp0_perfcount_irq)
+ cp0_perfcount_irq = CP0_LEGACY_PERFCNT_IRQ;
+
+ if (arch_fixup_c0_irqs)
+ arch_fixup_c0_irqs();
+
if (cp0_perfcount_irq == cp0_compare_irq)
cp0_perfcount_irq = -1;
} else {
--- a/arch/mips/include/asm/irq.h
+++ b/arch/mips/include/asm/irq.h
@@ -158,8 +158,10 @@ extern void free_irqno(unsigned int irq)
* IE7. Since R2 their number has to be read from the c0_intctl register.
*/
#define CP0_LEGACY_COMPARE_IRQ 7
+#define CP0_LEGACY_PERFCNT_IRQ 7
extern int cp0_compare_irq;
extern int cp0_perfcount_irq;
+extern void __weak arch_fixup_c0_irqs(void);
#endif /* _ASM_IRQ_H */

View File

@ -0,0 +1,33 @@
--- a/arch/mips/kernel/cevt-r4k.c
+++ b/arch/mips/kernel/cevt-r4k.c
@@ -22,6 +22,22 @@
#ifndef CONFIG_MIPS_MT_SMTC
+/*
+ * Compare interrupt can be routed and latched outside the core,
+ * so a single execution hazard barrier may not be enough to give
+ * it time to clear as seen in the Cause register. 4 time the
+ * pipeline depth seems reasonably conservative, and empirically
+ * works better in configurations with high CPU/bus clock ratios.
+ */
+
+#define compare_change_hazard() \
+ do { \
+ irq_disable_hazard(); \
+ irq_disable_hazard(); \
+ irq_disable_hazard(); \
+ irq_disable_hazard(); \
+ } while (0)
+
static int mips_next_event(unsigned long delta,
struct clock_event_device *evt)
{
@@ -31,6 +47,7 @@ static int mips_next_event(unsigned long
cnt = read_c0_count();
cnt += delta;
write_c0_compare(cnt);
+ compare_change_hazard();
res = ((int)(read_c0_count() - cnt) > 0) ? -ETIME : 0;
return res;
}

View File

@ -0,0 +1,10 @@
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -113,6 +113,7 @@ obj-$(CONFIG_WDT_RM9K_GPI) += rm9k_wdt.o
obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o
obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
obj-$(CONFIG_TXX9_WDT) += txx9wdt.o
+obj-$(CONFIG_AMAZON_WDT) += amazon_wdt.o
# PARISC Architecture

View File

@ -0,0 +1,49 @@
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -96,6 +96,22 @@ config BCM63XX
help
Support for BCM63XX based boards
+config AMAZON
+ bool "Amazon support (EXPERIMENTAL)"
+ depends on EXPERIMENTAL
+ select DMA_NONCOHERENT
+ select IRQ_CPU
+ select CEVT_R4K
+ select CSRC_R4K
+ select SYS_HAS_CPU_MIPS32_R1
+ select SYS_HAS_CPU_MIPS32_R2
+ select HAVE_STD_PC_SERIAL_PORT
+ select SYS_SUPPORTS_BIG_ENDIAN
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_HAS_EARLY_PRINTK
+ select HW_HAS_PCI
+ select SWAP_IO_SPACE
+
config MIPS_COBALT
bool "Cobalt Server"
select CEVT_R4K
@@ -673,6 +689,7 @@ config CAVIUM_OCTEON_REFERENCE_BOARD
endchoice
+source "arch/mips/amazon/Kconfig"
source "arch/mips/alchemy/Kconfig"
source "arch/mips/basler/excite/Kconfig"
source "arch/mips/bcm63xx/Kconfig"
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -296,6 +296,13 @@ cflags-$(CONFIG_SOC_AU1X00) += -I$(srctr
#
+# Infineon AMAZON
+#
+core-$(CONFIG_AMAZON) += arch/mips/amazon/
+cflags-$(CONFIG_AMAZON) += -I$(srctree)/arch/mips/include/asm/mach-amazon
+load-$(CONFIG_AMAZON) += 0xffffffff80002000
+
+#
# Cobalt Server
#
core-$(CONFIG_MIPS_COBALT) += arch/mips/cobalt/

View File

@ -0,0 +1,7 @@
--- a/drivers/mtd/maps/Makefile
+++ b/drivers/mtd/maps/Makefile
@@ -61,3 +61,4 @@ obj-$(CONFIG_MTD_BFIN_ASYNC) += bfin-asy
obj-$(CONFIG_MTD_RBTX4939) += rbtx4939-flash.o
obj-$(CONFIG_MTD_VMU) += vmu-flash.o
obj-$(CONFIG_MTD_GPIO_ADDR) += gpio-addr-flash.o
+obj-$(CONFIG_AMAZON_MTD) += amazon.o

View File

@ -1,9 +1,9 @@
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -219,3 +219,6 @@ obj-$(CONFIG_NETCONSOLE) += netconsole.o
obj-$(CONFIG_FS_ENET) += fs_enet/
@@ -286,3 +286,6 @@ obj-$(CONFIG_VIRTIO_NET) += virtio_net.o
obj-$(CONFIG_SFC) += sfc/
obj-$(CONFIG_NETXEN_NIC) += netxen/
obj-$(CONFIG_WIMAX) += wimax/
+
+obj-$(CONFIG_AMAZON_NET_SW) += amazon_sw.o
+obj-$(CONFIG_ADM6996_SUPPORT) += admmod.o

View File

@ -1,10 +1,10 @@
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -5,6 +5,7 @@
@@ -3,6 +3,7 @@
#
obj-$(CONFIG_SERIAL_CORE) += serial_core.o
+obj-$(CONFIG_AMAZON_ASC_UART) += amazon_asc.o
obj-$(CONFIG_SERIAL_21285) += 21285.o
obj-$(CONFIG_SERIAL_8250) += 8250.o
obj-$(CONFIG_SERIAL_8250_PNP) += 8250_pnp.o
# These Sparc drivers have to appear before others such as 8250

View File

@ -0,0 +1,56 @@
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
@@ -1079,6 +1079,9 @@ static int __xipram do_write_oneword(str
int retry_cnt = 0;
adr += chip->start;
+#ifdef CONFIG_AMAZON
+ adr ^= 2;
+#endif
spin_lock(chip->mutex);
ret = get_chip(map, chip, adr, FL_WRITING);
@@ -1361,7 +1364,11 @@ static int __xipram do_write_buffer(stru
z = 0;
while(z < words * map_bankwidth(map)) {
datum = map_word_load(map, buf);
+#ifdef CONFIG_AMAZON
+ map_write(map, datum, (adr + z) ^ 0x2);
+#else
map_write(map, datum, adr + z);
+#endif
z += map_bankwidth(map);
buf += map_bankwidth(map);
@@ -1606,6 +1613,9 @@ static int __xipram do_erase_oneblock(st
int ret = 0;
adr += chip->start;
+#ifdef CONFIG_AMAZON
+ adr ^= 2;
+#endif
spin_lock(chip->mutex);
ret = get_chip(map, chip, adr, FL_ERASING);
@@ -1734,6 +1744,10 @@ static int do_atmel_lock(struct map_info
struct cfi_private *cfi = map->fldrv_priv;
int ret;
+#ifdef CONFIG_AMAZON
+ adr ^= 2;
+#endif
+
spin_lock(chip->mutex);
ret = get_chip(map, chip, adr + chip->start, FL_LOCKING);
if (ret)
@@ -1770,6 +1784,10 @@ static int do_atmel_unlock(struct map_in
struct cfi_private *cfi = map->fldrv_priv;
int ret;
+#ifdef CONFIG_AMAZON
+ adr ^= 2;
+#endif
+
spin_lock(chip->mutex);
ret = get_chip(map, chip, adr + chip->start, FL_UNLOCKING);
if (ret)

View File

@ -1,10 +0,0 @@
--- a/drivers/char/watchdog/Makefile
+++ b/drivers/char/watchdog/Makefile
@@ -74,6 +74,7 @@ obj-$(CONFIG_WATCHDOG_RTAS) += wdrtas.o
# MIPS Architecture
obj-$(CONFIG_INDYDOG) += indydog.o
obj-$(CONFIG_WDT_RM9K_GPI) += rm9k_wdt.o
+obj-$(CONFIG_AMAZON_WDT) += amazon_wdt.o
# S390 Architecture

View File

@ -1,59 +0,0 @@
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -159,6 +159,17 @@ config BASLER_EXCITE_PROTOTYPE
note that a kernel built with this option selected will not be
able to run on normal units.
+config AMAZON
+ bool "Amazon support (EXPERIMENTAL)"
+ depends on EXPERIMENTAL
+ select DMA_NONCOHERENT
+ select IRQ_CPU
+ select SYS_HAS_CPU_MIPS32_R1
+ select HAVE_STD_PC_SERIAL_PORT
+ select SYS_SUPPORTS_BIG_ENDIAN
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_HAS_EARLY_PRINTK
+
config MIPS_COBALT
bool "Cobalt Server"
select DMA_NONCOHERENT
@@ -823,6 +834,7 @@ config TOSHIBA_RBTX4938
endchoice
+source "arch/mips/amazon/Kconfig"
source "arch/mips/ddb5xxx/Kconfig"
source "arch/mips/gt64120/ev64120/Kconfig"
source "arch/mips/jazz/Kconfig"
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -267,6 +267,13 @@ libs-$(CONFIG_MIPS_XXS1500) += arch/mips
load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000
#
+# Infineon AMAZON
+#
+core-$(CONFIG_AMAZON) += arch/mips/amazon/
+cflags-$(CONFIG_AMAZON) += -Iinclude/asm-mips/mach-amazon
+load-$(CONFIG_AMAZON) += 0xffffffff80002000
+
+#
# Cobalt Server
#
core-$(CONFIG_MIPS_COBALT) += arch/mips/cobalt/
--- a/include/asm-mips/bootinfo.h
+++ b/include/asm-mips/bootinfo.h
@@ -213,6 +213,12 @@
#define MACH_GROUP_NEC_EMMA2RH 25 /* NEC EMMA2RH (was 23) */
#define MACH_NEC_MARKEINS 0 /* NEC EMMA2RH Mark-eins */
+/*
+ * Valid machtype for group Infineon
+ */
+#define MACH_GROUP_INFINEON 27
+#define MACH_INFINEON_AMAZON 0
+
#define CL_SIZE COMMAND_LINE_SIZE
const char *get_system_type(void);

View File

@ -1,7 +0,0 @@
--- a/drivers/mtd/maps/Makefile
+++ b/drivers/mtd/maps/Makefile
@@ -72,3 +72,4 @@ obj-$(CONFIG_MTD_PLATRAM) += plat-ram.o
obj-$(CONFIG_MTD_OMAP_NOR) += omap_nor.o
obj-$(CONFIG_MTD_MTX1) += mtx-1_flash.o
obj-$(CONFIG_MTD_TQM834x) += tqm834x.o
+obj-$(CONFIG_AMAZON_MTD) += amazon.o

View File

@ -1,25 +0,0 @@
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
@@ -1007,7 +1007,9 @@ static int __xipram do_write_oneword(str
int ret = 0;
map_word oldd;
int retry_cnt = 0;
-
+#ifdef CONFIG_AMAZON
+ adr ^= 2;
+#endif
adr += chip->start;
spin_lock(chip->mutex);
@@ -1291,7 +1293,11 @@ static int __xipram do_write_buffer(stru
z = 0;
while(z < words * map_bankwidth(map)) {
datum = map_word_load(map, buf);
+#ifdef CONFIG_AMAZON
+ map_write(map, datum, (adr + z) ^ 0x2);
+#else
map_write(map, datum, adr + z);
+#endif
z += map_bankwidth(map);
buf += map_bankwidth(map);

View File

@ -1,34 +1,39 @@
CONFIG_32BIT=y
# CONFIG_64BIT is not set
# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
CONFIG_AR7=y
CONFIG_AR7_GPIO=y
CONFIG_AR7_WDT=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_POPULATES_NODE_MAP=y
CONFIG_ARCH_REQUIRE_GPIOLIB=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
# CONFIG_BCM47XX is not set
# CONFIG_BINARY_PRINTF is not set
# CONFIG_BCM63XX is not set
CONFIG_BITREVERSE=y
CONFIG_BOOT_ELF32=y
# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_CEVT_R4K=y
CONFIG_CEVT_R4K_LIB=y
CONFIG_CMDLINE="console=ttyS1,57600 rootfstype=squashfs,jffs2"
CONFIG_CFG80211_DEFAULT_PS_VALUE=0
CONFIG_CMDLINE="rootfstype=squashfs,jffs2"
CONFIG_CPMAC=y
# CONFIG_CPU_BIG_ENDIAN is not set
# CONFIG_CPU_CAVIUM_OCTEON is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_LOONGSON2 is not set
# CONFIG_CPU_LOONGSON2E is not set
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS32_R1 is not set
CONFIG_CPU_MIPS32_R2=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR2=y
CONFIG_CPU_MIPSR1=y
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_R3000 is not set
@ -50,11 +55,12 @@ CONFIG_CPU_SUPPORTS_HIGHMEM=y
CONFIG_CSRC_R4K=y
CONFIG_CSRC_R4K_LIB=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DEVPORT=y
# CONFIG_DM9000 is not set
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_EARLY_PRINTK=y
CONFIG_FIXED_PHY=y
# CONFIG_FSNOTIFY is not set
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CMOS_UPDATE=y
@ -62,67 +68,54 @@ CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_SYSFS=y
CONFIG_HARDWARE_WATCHPOINTS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_HAVE_IDE=y
CONFIG_HAVE_MLOCK=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=m
CONFIG_HW_RANDOM=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQ_CPU=y
# CONFIG_ISDN is not set
# CONFIG_LEDS_GPIO is not set
# CONFIG_LEMOTE_FULONG is not set
CONFIG_KALLSYMS=y
CONFIG_LEDS_GPIO=y
# CONFIG_MACH_ALCHEMY is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_MACH_LOONGSON is not set
# CONFIG_MACH_TX39XX is not set
# CONFIG_MACH_TX49XX is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_MII is not set
# CONFIG_MIKROTIK_RB532 is not set
CONFIG_MIPS=y
# CONFIG_MIPS_COBALT is not set
CONFIG_MIPS_L1_CACHE_SHIFT=4
CONFIG_MIPS_MACHINE=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_MIPS_MACHINE is not set
# CONFIG_MIPS_MALTA is not set
CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
CONFIG_MIPS_RALINK=y
# CONFIG_MIPS_RAMIPS_NET is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MTD_CFI_INTELEXT is not set
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
CONFIG_MTD_AR7_PARTS=y
CONFIG_MTD_CFI_STAA=y
CONFIG_MTD_PHYSMAP=y
CONFIG_NO_EXCEPT_FILL=y
# CONFIG_NO_IOPORT is not set
# CONFIG_NXP_STB220 is not set
# CONFIG_NXP_STB225 is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PCI_DOMAINS=y
CONFIG_PHYLIB=y
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_PROBE_INITRD_HEADER is not set
CONFIG_RALINK_DEV_GPIO_LEDS=y
CONFIG_RALINK_RT288X=y
# CONFIG_RALINK_RT305X is not set
CONFIG_RT288X_MACH_RT_N15=y
CONFIG_RT288X_MACH_WZR_AGL300NH=y
CONFIG_SCHED_OMIT_FRAME_POINTER=y
# CONFIG_SCSI_DMA is not set
# CONFIG_SERIAL_8250_EXTENDED is not set
CONFIG_SERIAL_8250_NR_UARTS=4
CONFIG_SERIAL_8250_RT288X=y
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP28 is not set
@ -135,18 +128,14 @@ CONFIG_SERIAL_8250_RT288X=y
# CONFIG_SIBYTE_RHONE is not set
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_SWARM is not set
# CONFIG_SLAB is not set
# CONFIG_SLOW_WORK is not set
CONFIG_SLUB=y
CONFIG_SOC_RT288X=y
CONFIG_SWAP_IO_SPACE=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_CPU_MIPS32_R2=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
# CONFIG_TC35815 is not set
CONFIG_TRACING_SUPPORT=y
CONFIG_TRAD_SIGNALS=y
CONFIG_USB_SUPPORT=y
# CONFIG_TREE_PREEMPT_RCU is not set
CONFIG_TREE_RCU=y
CONFIG_VLYNQ=y
CONFIG_ZONE_DMA_FLAG=0

View File

@ -0,0 +1,158 @@
/*
* Copyright (C) 2007 Nicolas Thill <nico@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/device.h>
#include <linux/fs.h>
#include <linux/module.h>
#include <linux/errno.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/uaccess.h>
#include <linux/io.h>
#include <linux/types.h>
#include <linux/cdev.h>
#include <gpio.h>
#define DRVNAME "ar7_gpio"
#define LONGNAME "TI AR7 GPIOs Driver"
MODULE_AUTHOR("Nicolas Thill <nico@openwrt.org>");
MODULE_DESCRIPTION(LONGNAME);
MODULE_LICENSE("GPL");
static int ar7_gpio_major;
static ssize_t ar7_gpio_write(struct file *file, const char __user *buf,
size_t len, loff_t *ppos)
{
int pin = iminor(file->f_dentry->d_inode);
size_t i;
for (i = 0; i < len; ++i) {
char c;
if (get_user(c, buf + i))
return -EFAULT;
switch (c) {
case '0':
gpio_set_value(pin, 0);
break;
case '1':
gpio_set_value(pin, 1);
break;
case 'd':
case 'D':
ar7_gpio_disable(pin);
break;
case 'e':
case 'E':
ar7_gpio_enable(pin);
break;
case 'i':
case 'I':
case '<':
gpio_direction_input(pin);
break;
case 'o':
case 'O':
case '>':
gpio_direction_output(pin, 0);
break;
default:
return -EINVAL;
}
}
return len;
}
static ssize_t ar7_gpio_read(struct file *file, char __user *buf,
size_t len, loff_t *ppos)
{
int pin = iminor(file->f_dentry->d_inode);
int value;
value = gpio_get_value(pin);
if (put_user(value ? '1' : '0', buf))
return -EFAULT;
return 1;
}
static int ar7_gpio_open(struct inode *inode, struct file *file)
{
int m = iminor(inode);
if (m >= (ar7_is_titan() ? TITAN_GPIO_MAX : AR7_GPIO_MAX))
return -EINVAL;
return nonseekable_open(inode, file);
}
static int ar7_gpio_release(struct inode *inode, struct file *file)
{
return 0;
}
static const struct file_operations ar7_gpio_fops = {
.owner = THIS_MODULE,
.write = ar7_gpio_write,
.read = ar7_gpio_read,
.open = ar7_gpio_open,
.release = ar7_gpio_release,
.llseek = no_llseek,
};
static struct platform_device *ar7_gpio_device;
static int __init ar7_gpio_init(void)
{
int rc;
ar7_gpio_device = platform_device_alloc(DRVNAME, -1);
if (!ar7_gpio_device)
return -ENOMEM;
rc = platform_device_add(ar7_gpio_device);
if (rc < 0)
goto out_put;
rc = register_chrdev(ar7_gpio_major, DRVNAME, &ar7_gpio_fops);
if (rc < 0)
goto out_put;
ar7_gpio_major = rc;
rc = 0;
goto out;
out_put:
platform_device_put(ar7_gpio_device);
out:
return rc;
}
static void __exit ar7_gpio_exit(void)
{
unregister_chrdev(ar7_gpio_major, DRVNAME);
platform_device_unregister(ar7_gpio_device);
}
module_init(ar7_gpio_init);
module_exit(ar7_gpio_exit);

View File

@ -0,0 +1,11 @@
--- a/drivers/mtd/maps/physmap.c
+++ b/drivers/mtd/maps/physmap.c
@@ -80,7 +80,7 @@ static const char *rom_probe_types[] = {
"map_rom",
NULL };
#ifdef CONFIG_MTD_PARTITIONS
-static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", NULL };
+static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", "ar7part", NULL };
#endif
static int physmap_flash_probe(struct platform_device *dev)

View File

@ -0,0 +1,28 @@
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -987,6 +987,15 @@ config MWAVE
To compile this driver as a module, choose M here: the
module will be called mwave.
+config AR7_GPIO
+ tristate "TI AR7 GPIO Support"
+ depends on AR7
+ help
+ Give userspace access to the GPIO pins on the Texas Instruments AR7
+ processors.
+
+ If compiled as a module, it will be called ar7_gpio.
+
config SCx200_GPIO
tristate "NatSemi SCx200 GPIO Support"
depends on SCx200
--- a/drivers/char/Makefile
+++ b/drivers/char/Makefile
@@ -92,6 +92,7 @@ obj-$(CONFIG_HW_RANDOM) += hw_random/
obj-$(CONFIG_PPDEV) += ppdev.o
obj-$(CONFIG_NWBUTTON) += nwbutton.o
obj-$(CONFIG_NWFLASH) += nwflash.o
+obj-$(CONFIG_AR7_GPIO) += ar7_gpio.o
obj-$(CONFIG_SCx200_GPIO) += scx200_gpio.o
obj-$(CONFIG_PC8736x_GPIO) += pc8736x_gpio.o
obj-$(CONFIG_NSC_GPIO) += nsc_gpio.o

View File

@ -0,0 +1,28 @@
--- a/drivers/serial/8250.c
+++ b/drivers/serial/8250.c
@@ -296,6 +296,13 @@ static const struct serial8250_config ua
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
.flags = UART_CAP_FIFO | UART_CAP_AFE,
},
+ [PORT_AR7] = {
+ .name = "TI-AR7",
+ .fifo_size = 16,
+ .tx_loadsz = 16,
+ .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
+ .flags = UART_CAP_FIFO | UART_CAP_AFE,
+ },
};
#if defined (CONFIG_SERIAL_8250_AU1X00)
@@ -2712,7 +2719,11 @@ static void serial8250_console_putchar(s
{
struct uart_8250_port *up = (struct uart_8250_port *)port;
+#ifdef CONFIG_AR7
+ wait_for_xmitr(up, BOTH_EMPTY);
+#else
wait_for_xmitr(up, UART_LSR_THRE);
+#endif
serial_out(up, UART_TX, ch);
}

View File

@ -0,0 +1,772 @@
--- a/arch/mips/ar7/platform.c
+++ b/arch/mips/ar7/platform.c
@@ -131,6 +131,36 @@ static struct resource cpmac_high_res[]
},
};
+static struct resource cpmac_low_res_titan[] = {
+ {
+ .name = "regs",
+ .flags = IORESOURCE_MEM,
+ .start = TITAN_REGS_MAC0,
+ .end = TITAN_REGS_MAC0 + 0x7ff,
+ },
+ {
+ .name = "irq",
+ .flags = IORESOURCE_IRQ,
+ .start = 27,
+ .end = 27,
+ },
+};
+
+static struct resource cpmac_high_res_titan[] = {
+ {
+ .name = "regs",
+ .flags = IORESOURCE_MEM,
+ .start = TITAN_REGS_MAC1,
+ .end = TITAN_REGS_MAC1 + 0x7ff,
+ },
+ {
+ .name = "irq",
+ .flags = IORESOURCE_IRQ,
+ .start = 41,
+ .end = 41,
+ },
+};
+
static struct resource vlynq_low_res[] = {
{
.name = "regs",
@@ -185,6 +215,60 @@ static struct resource vlynq_high_res[]
},
};
+static struct resource vlynq_low_res_titan[] = {
+ {
+ .name = "regs",
+ .flags = IORESOURCE_MEM,
+ .start = TITAN_REGS_VLYNQ0,
+ .end = TITAN_REGS_VLYNQ0 + 0xff,
+ },
+ {
+ .name = "irq",
+ .flags = IORESOURCE_IRQ,
+ .start = 33,
+ .end = 33,
+ },
+ {
+ .name = "mem",
+ .flags = IORESOURCE_MEM,
+ .start = 0x0c000000,
+ .end = 0x0fffffff,
+ },
+ {
+ .name = "devirq",
+ .flags = IORESOURCE_IRQ,
+ .start = 80,
+ .end = 111,
+ },
+};
+
+static struct resource vlynq_high_res_titan[] = {
+ {
+ .name = "regs",
+ .flags = IORESOURCE_MEM,
+ .start = TITAN_REGS_VLYNQ1,
+ .end = TITAN_REGS_VLYNQ1 + 0xff,
+ },
+ {
+ .name = "irq",
+ .flags = IORESOURCE_IRQ,
+ .start = 34,
+ .end = 34,
+ },
+ {
+ .name = "mem",
+ .flags = IORESOURCE_MEM,
+ .start = 0x40000000,
+ .end = 0x43ffffff,
+ },
+ {
+ .name = "devirq",
+ .flags = IORESOURCE_IRQ,
+ .start = 112,
+ .end = 143,
+ },
+};
+
static struct resource usb_res[] = {
{
.name = "regs",
@@ -228,6 +312,18 @@ static struct plat_cpmac_data cpmac_high
.phy_mask = 0x7fffffff,
};
+static struct plat_cpmac_data cpmac_low_data_titan = {
+ .reset_bit = 17,
+ .power_bit = 20,
+ .phy_mask = 0x40000000,
+};
+
+static struct plat_cpmac_data cpmac_high_data_titan = {
+ .reset_bit = 21,
+ .power_bit = 22,
+ .phy_mask = 0x80000000,
+};
+
static struct plat_vlynq_data vlynq_low_data = {
.ops.on = vlynq_on,
.ops.off = vlynq_off,
@@ -242,6 +338,20 @@ static struct plat_vlynq_data vlynq_high
.gpio_bit = 19,
};
+static struct plat_vlynq_data vlynq_low_data_titan = {
+ .ops.on = vlynq_on,
+ .ops.off = vlynq_off,
+ .reset_bit = 15,
+ .gpio_bit = 14,
+};
+
+static struct plat_vlynq_data vlynq_high_data_titan = {
+ .ops.on = vlynq_on,
+ .ops.off = vlynq_off,
+ .reset_bit = 16,
+ .gpio_bit = 7,
+};
+
static struct platform_device physmap_flash = {
.id = 0,
.name = "physmap-flash",
@@ -275,6 +385,30 @@ static struct platform_device cpmac_high
.num_resources = ARRAY_SIZE(cpmac_high_res),
};
+static struct platform_device cpmac_low_titan = {
+ .id = 0,
+ .name = "cpmac",
+ .dev = {
+ .dma_mask = &cpmac_dma_mask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ .platform_data = &cpmac_low_data_titan,
+ },
+ .resource = cpmac_low_res_titan,
+ .num_resources = ARRAY_SIZE(cpmac_low_res_titan),
+};
+
+static struct platform_device cpmac_high_titan = {
+ .id = 1,
+ .name = "cpmac",
+ .dev = {
+ .dma_mask = &cpmac_dma_mask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ .platform_data = &cpmac_high_data_titan,
+ },
+ .resource = cpmac_high_res_titan,
+ .num_resources = ARRAY_SIZE(cpmac_high_res_titan),
+};
+
static struct platform_device vlynq_low = {
.id = 0,
.name = "vlynq",
@@ -291,6 +425,22 @@ static struct platform_device vlynq_high
.num_resources = ARRAY_SIZE(vlynq_high_res),
};
+static struct platform_device vlynq_low_titan = {
+ .id = 0,
+ .name = "vlynq",
+ .dev.platform_data = &vlynq_low_data_titan,
+ .resource = vlynq_low_res_titan,
+ .num_resources = ARRAY_SIZE(vlynq_low_res_titan),
+};
+
+static struct platform_device vlynq_high_titan = {
+ .id = 1,
+ .name = "vlynq",
+ .dev.platform_data = &vlynq_high_data_titan,
+ .resource = vlynq_high_res_titan,
+ .num_resources = ARRAY_SIZE(vlynq_high_res_titan),
+};
+
static struct gpio_led default_leds[] = {
{
@@ -300,6 +450,11 @@ static struct gpio_led default_leds[] =
},
};
+static struct gpio_led titan_leds[] = {
+ { .name = "status", .gpio = 8, .active_low = 1, },
+ { .name = "wifi", .gpio = 13, .active_low = 1, },
+};
+
static struct gpio_led dsl502t_leds[] = {
{
.name = "status",
@@ -496,6 +651,9 @@ static void __init detect_leds(void)
} else if (strstr(prid, "DG834")) {
ar7_led_data.num_leds = ARRAY_SIZE(dg834g_leds);
ar7_led_data.leds = dg834g_leds;
+ } else if (strstr(prid, "CYWM")) {
+ ar7_led_data.num_leds = ARRAY_SIZE(titan_leds);
+ ar7_led_data.leds = titan_leds;
}
}
@@ -541,14 +699,18 @@ static int __init ar7_register_devices(v
if (res)
return res;
- ar7_device_disable(vlynq_low_data.reset_bit);
- res = platform_device_register(&vlynq_low);
+ ar7_device_disable(ar7_is_titan() ? vlynq_low_data_titan.reset_bit :
+ vlynq_low_data.reset_bit);
+ res = platform_device_register(ar7_is_titan() ? &vlynq_low_titan :
+ &vlynq_low);
if (res)
return res;
if (ar7_has_high_vlynq()) {
- ar7_device_disable(vlynq_high_data.reset_bit);
- res = platform_device_register(&vlynq_high);
+ ar7_device_disable(ar7_is_titan() ? vlynq_high_data_titan.reset_bit :
+ vlynq_high_data.reset_bit);
+ res = platform_device_register(ar7_is_titan() ? &vlynq_high_titan :
+ &vlynq_high);
if (res)
return res;
}
--- a/arch/mips/ar7/gpio.c
+++ b/arch/mips/ar7/gpio.c
@@ -21,11 +21,11 @@
#include <asm/mach-ar7/gpio.h>
-static const char *ar7_gpio_list[AR7_GPIO_MAX];
+static const char *ar7_gpio_list[TITAN_GPIO_MAX];
int gpio_request(unsigned gpio, const char *label)
{
- if (gpio >= AR7_GPIO_MAX)
+ if (gpio >= (ar7_is_titan() ? TITAN_GPIO_MAX : AR7_GPIO_MAX))
return -EINVAL;
if (ar7_gpio_list[gpio])
--- a/arch/mips/ar7/setup.c
+++ b/arch/mips/ar7/setup.c
@@ -23,6 +23,9 @@
#include <asm/reboot.h>
#include <asm/mach-ar7/ar7.h>
#include <asm/mach-ar7/prom.h>
+#include <asm/mach-ar7/gpio.h>
+
+static int titan_variant;
static void ar7_machine_restart(char *command)
{
@@ -55,6 +58,18 @@ const char *get_system_type(void)
return "TI AR7 (TNETD7100)";
case AR7_CHIP_7200:
return "TI AR7 (TNETD7200)";
+ case AR7_CHIP_TITAN:
+ titan_variant = ar7_init_titan_variant();
+ switch (titan_variant /*(gpio_get_value_titan(1) >> 12) & 0xf*/) {
+ case TITAN_CHIP_1050:
+ return "TI AR7 (TNETV1050)";
+ case TITAN_CHIP_1055:
+ return "TI AR7 (TNETV1055)";
+ case TITAN_CHIP_1056:
+ return "TI AR7 (TNETV1056)";
+ case TITAN_CHIP_1060:
+ return "TI AR7 (TNETV1060)";
+ }
default:
return "TI AR7 (Unknown)";
}
--- a/arch/mips/include/asm/mach-ar7/ar7.h
+++ b/arch/mips/include/asm/mach-ar7/ar7.h
@@ -50,6 +50,11 @@
#define UR8_REGS_WDT (AR7_REGS_BASE + 0x0b00)
#define UR8_REGS_UART1 (AR7_REGS_BASE + 0x0f00)
+#define TITAN_REGS_MAC0 (0x08640000)
+#define TITAN_REGS_MAC1 (TITAN_REGS_MAC0 + 0x0800)
+#define TITAN_REGS_VLYNQ0 (AR7_REGS_BASE + 0x1c00)
+#define TITAN_REGS_VLYNQ1 (AR7_REGS_BASE + 0x1300)
+
#define AR7_RESET_PEREPHERIAL 0x0
#define AR7_RESET_SOFTWARE 0x4
#define AR7_RESET_STATUS 0x8
@@ -59,15 +64,30 @@
#define AR7_RESET_BIT_MDIO 22
#define AR7_RESET_BIT_EPHY 26
+#define TITAN_RESET_BIT_EPHY1 28
+
/* GPIO control registers */
#define AR7_GPIO_INPUT 0x0
#define AR7_GPIO_OUTPUT 0x4
#define AR7_GPIO_DIR 0x8
#define AR7_GPIO_ENABLE 0xc
+#define TITAN_GPIO_INPUT_0 0x0
+#define TITAN_GPIO_INPUT_1 0x4
+#define TITAN_GPIO_OUTPUT_0 0x8
+#define TITAN_GPIO_OUTPUT_1 0xc
+#define TITAN_GPIO_DIR_0 0x10
+#define TITAN_GPIO_DIR_1 0x14
+#define TITAN_GPIO_ENBL_0 0x18
+#define TITAN_GPIO_ENBL_1 0x1c
#define AR7_CHIP_7100 0x18
#define AR7_CHIP_7200 0x2b
#define AR7_CHIP_7300 0x05
+#define AR7_CHIP_TITAN 0x07
+#define TITAN_CHIP_1050 0x0f
+#define TITAN_CHIP_1055 0x0e
+#define TITAN_CHIP_1056 0x0d
+#define TITAN_CHIP_1060 0x07
/* Interrupts */
#define AR7_IRQ_UART0 15
@@ -95,14 +115,22 @@ struct plat_dsl_data {
extern int ar7_cpu_clock, ar7_bus_clock, ar7_dsp_clock;
+static inline int ar7_is_titan(void)
+{
+ return (readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x24)) & 0xffff) ==
+ AR7_CHIP_TITAN;
+}
+
static inline u16 ar7_chip_id(void)
{
- return readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x14)) & 0xffff;
+ return ar7_is_titan() ? AR7_CHIP_TITAN : (readl((void *)
+ KSEG1ADDR(AR7_REGS_GPIO + 0x14)) & 0xffff);
}
static inline u8 ar7_chip_rev(void)
{
- return (readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x14)) >> 16) & 0xff;
+ return (readl((void *)KSEG1ADDR(AR7_REGS_GPIO + (ar7_is_titan() ? 0x24 :
+ 0x14))) >> 16) & 0xff;
}
static inline int ar7_cpu_freq(void)
--- a/arch/mips/include/asm/mach-ar7/gpio.h
+++ b/arch/mips/include/asm/mach-ar7/gpio.h
@@ -20,14 +20,18 @@
#define __AR7_GPIO_H__
#include <asm/mach-ar7/ar7.h>
+#ifndef __AR7_TITAN_H__
+#include <asm/mach-ar7/titan.h>
+#endif
#define AR7_GPIO_MAX 32
+#define TITAN_GPIO_MAX 51
extern int gpio_request(unsigned gpio, const char *label);
extern void gpio_free(unsigned gpio);
/* Common GPIO layer */
-static inline int gpio_get_value(unsigned gpio)
+static inline int gpio_get_value_ar7(unsigned gpio)
{
void __iomem *gpio_in =
(void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_INPUT);
@@ -35,7 +39,23 @@ static inline int gpio_get_value(unsigne
return readl(gpio_in) & (1 << gpio);
}
-static inline void gpio_set_value(unsigned gpio, int value)
+static inline int gpio_get_value_titan(unsigned gpio)
+{
+ void __iomem *gpio_in0 =
+ (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_INPUT_0);
+ void __iomem *gpio_in1 =
+ (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_INPUT_1);
+
+ return readl(gpio >> 5 ? gpio_in1 : gpio_in0) & (1 << (gpio & 0x1f));
+}
+
+static inline int gpio_get_value(unsigned gpio)
+{
+ return ar7_is_titan() ? gpio_get_value_titan(gpio) :
+ gpio_get_value_ar7(gpio);
+}
+
+static inline void gpio_set_value_ar7(unsigned gpio, int value)
{
void __iomem *gpio_out =
(void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_OUTPUT);
@@ -47,7 +67,29 @@ static inline void gpio_set_value(unsign
writel(tmp, gpio_out);
}
-static inline int gpio_direction_input(unsigned gpio)
+static inline void gpio_set_value_titan(unsigned gpio, int value)
+{
+ void __iomem *gpio_out0 =
+ (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_OUTPUT_0);
+ void __iomem *gpio_out1 =
+ (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_OUTPUT_1);
+ unsigned tmp;
+
+ tmp = readl(gpio >> 5 ? gpio_out1 : gpio_out0) & ~(1 << (gpio & 0x1f));
+ if (value)
+ tmp |= 1 << (gpio & 0x1f);
+ writel(tmp, gpio >> 5 ? gpio_out1 : gpio_out0);
+}
+
+static inline void gpio_set_value(unsigned gpio, int value)
+{
+ if (ar7_is_titan())
+ gpio_set_value_titan(gpio, value);
+ else
+ gpio_set_value_ar7(gpio, value);
+}
+
+static inline int gpio_direction_input_ar7(unsigned gpio)
{
void __iomem *gpio_dir =
(void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_DIR);
@@ -60,7 +102,29 @@ static inline int gpio_direction_input(u
return 0;
}
-static inline int gpio_direction_output(unsigned gpio, int value)
+static inline int gpio_direction_input_titan(unsigned gpio)
+{
+ void __iomem *gpio_dir0 =
+ (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_DIR_0);
+ void __iomem *gpio_dir1 =
+ (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_DIR_1);
+
+ if (gpio >= TITAN_GPIO_MAX)
+ return -EINVAL;
+
+ writel(readl(gpio >> 5 ? gpio_dir1 : gpio_dir0) | (1 << (gpio & 0x1f)),
+ gpio >> 5 ? gpio_dir1 : gpio_dir0);
+
+ return 0;
+}
+
+static inline int gpio_direction_input(unsigned gpio)
+{
+ return ar7_is_titan() ? gpio_direction_input_titan(gpio) :
+ gpio_direction_input_ar7(gpio);
+}
+
+static inline int gpio_direction_output_ar7(unsigned gpio, int value)
{
void __iomem *gpio_dir =
(void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_DIR);
@@ -74,6 +138,29 @@ static inline int gpio_direction_output(
return 0;
}
+static inline int gpio_direction_output_titan(unsigned gpio, int value)
+{
+ void __iomem *gpio_dir0 =
+ (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_DIR_0);
+ void __iomem *gpio_dir1 =
+ (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_DIR_1);
+
+ if (gpio >= TITAN_GPIO_MAX)
+ return -EINVAL;
+
+ gpio_set_value_titan(gpio, value);
+ writel(readl(gpio >> 5 ? gpio_dir1 : gpio_dir0) & ~(1 <<
+ (gpio & 0x1f)), gpio >> 5 ? gpio_dir1 : gpio_dir0);
+
+ return 0;
+}
+
+static inline int gpio_direction_output(unsigned gpio, int value)
+{
+ return ar7_is_titan() ? gpio_direction_output_titan(gpio, value) :
+ gpio_direction_output_ar7(gpio, value);
+}
+
static inline int gpio_to_irq(unsigned gpio)
{
return -EINVAL;
@@ -85,7 +172,7 @@ static inline int irq_to_gpio(unsigned i
}
/* Board specific GPIO functions */
-static inline int ar7_gpio_enable(unsigned gpio)
+static inline int ar7_gpio_enable_ar7(unsigned gpio)
{
void __iomem *gpio_en =
(void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_ENABLE);
@@ -95,7 +182,26 @@ static inline int ar7_gpio_enable(unsign
return 0;
}
-static inline int ar7_gpio_disable(unsigned gpio)
+static inline int ar7_gpio_enable_titan(unsigned gpio)
+{
+ void __iomem *gpio_en0 =
+ (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_ENBL_0);
+ void __iomem *gpio_en1 =
+ (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_ENBL_1);
+
+ writel(readl(gpio >> 5 ? gpio_en1 : gpio_en0) | (1 << (gpio & 0x1f)),
+ gpio >> 5 ? gpio_en1 : gpio_en0);
+
+ return 0;
+}
+
+static inline int ar7_gpio_enable(unsigned gpio)
+{
+ return ar7_is_titan() ? ar7_gpio_enable_titan(gpio) :
+ ar7_gpio_enable_ar7(gpio);
+}
+
+static inline int ar7_gpio_disable_ar7(unsigned gpio)
{
void __iomem *gpio_en =
(void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_ENABLE);
@@ -105,6 +211,60 @@ static inline int ar7_gpio_disable(unsig
return 0;
}
+static inline int ar7_gpio_disable_titan(unsigned gpio)
+{
+ void __iomem *gpio_en0 =
+ (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_ENBL_0);
+ void __iomem *gpio_en1 =
+ (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_ENBL_1);
+
+ writel(readl(gpio >> 5 ? gpio_en1 : gpio_en0) & ~(1 << (gpio & 0x1f)),
+ gpio >> 5 ? gpio_en1 : gpio_en0);
+
+ return 0;
+}
+
+static inline int ar7_gpio_disable(unsigned gpio)
+{
+ return ar7_is_titan() ? ar7_gpio_disable_titan(gpio) :
+ ar7_gpio_disable_ar7(gpio);
+}
+
+static inline int ar7_init_titan_variant(void)
+{
+ /*UINT32 new_val;*/
+ unsigned new_val;
+
+ /* set GPIO 44 - 47 as input */
+ /*PAL_sysGpioCtrl(const int, GPIO_PIN, GPIO_INPUT_PIN); */
+ /*define titan_gpio_ctrl in titan.h*/
+ titan_gpio_ctrl(44, GPIO_PIN, GPIO_INPUT_PIN);
+ titan_gpio_ctrl(45, GPIO_PIN, GPIO_INPUT_PIN);
+ titan_gpio_ctrl(46, GPIO_PIN, GPIO_INPUT_PIN);
+ titan_gpio_ctrl(47, GPIO_PIN, GPIO_INPUT_PIN);
+
+ /* read GPIO to get Titan variant type */
+ /*fix this*/
+ titan_sysGpioInValue( &new_val, 1 );
+
+ new_val >>= 12;
+ new_val &= 0x0f;
+
+ switch ( new_val )
+ {
+ case TITAN_CHIP_1050:
+ case TITAN_CHIP_1055:
+ case TITAN_CHIP_1056:
+ case TITAN_CHIP_1060:
+ return new_val;
+
+ default:
+ break;
+ }
+ /* In case we get an invalid value, return the default Titan chip */
+ return TITAN_CHIP_1050;
+}
+
#include <asm-generic/gpio.h>
#endif
--- /dev/null
+++ b/arch/mips/include/asm/mach-ar7/titan.h
@@ -0,0 +1,176 @@
+/*
+ * Copyright (C) 2008 Stanley Pinchak <stanley_dot_pinchak_at_gmail_dot_com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+#ifndef __AR7_TITAN_H__
+#define __AR7_TITAN_H__
+
+#include <asm/mach-ar7/gpio.h>
+
+typedef enum TITAN_GPIO_PIN_MODE_tag
+{
+ FUNCTIONAL_PIN = 0,
+ GPIO_PIN = 1
+} TITAN_GPIO_PIN_MODE_T;
+
+typedef enum TITAN_GPIO_PIN_DIRECTION_tag
+{
+ GPIO_OUTPUT_PIN = 0,
+ GPIO_INPUT_PIN = 1
+} TITAN_GPIO_PIN_DIRECTION_T;
+
+/**********************************************************************
+ * GPIO Control
+ **********************************************************************/
+
+typedef struct
+{
+ int pinSelReg;
+ int shift;
+ int func;
+
+} GPIO_CFG;
+
+static GPIO_CFG gptable[]= {
+ /* PIN_SEL_REG, START_BIT, GPIO_CFG_MUX_VALUE */
+ {4,24,1},
+ {4,26,1},
+ {4,28,1},
+ {4,30,1},
+ {5,6,1},
+ {5,8,1},
+ {5,10,1},
+ {5,12,1},
+ {7,14,3},
+ {7,16,3},
+ {7,18,3},
+ {7,20,3},
+ {7,22,3},
+ {7,26,3},
+ {7,28,3},
+ {7,30,3},
+ {8,0,3},
+ {8,2,3},
+ {8,4,3},
+ {8,10,3},
+ {8,14,3},
+ {8,16,3},
+ {8,18,3},
+ {8,20,3},
+ {9,8,3},
+ {9,10,3},
+ {9,12,3},
+ {9,14,3},
+ {9,18,3},
+ {9,20,3},
+ {9,24,3},
+ {9,26,3},
+ {9,28,3},
+ {9,30,3},
+ {10,0,3},
+ {10,2,3},
+ {10,8,3},
+ {10,10,3},
+ {10,12,3},
+ {10,14,3},
+ {13,12,3},
+ {13,14,3},
+ {13,16,3},
+ {13,18,3},
+ {13,24,3},
+ {13,26,3},
+ {13,28,3},
+ {13,30,3},
+ {14,2,3},
+ {14,6,3},
+ {14,8,3},
+ {14,12,3}
+};
+
+typedef struct
+{
+ volatile unsigned int reg[21];
+}
+PIN_SEL_REG_ARRAY_T;
+
+typedef struct
+{
+ unsigned int data_in [2];
+ unsigned int data_out[2];
+ unsigned int dir[2];
+ unsigned int enable[2];
+
+} TITAN_GPIO_CONTROL_T;
+
+#define AVALANCHE_PIN_SEL_BASE 0xA861160C /*replace with KSEG1ADDR()*/
+
+static inline int titan_gpio_ctrl(unsigned int gpio_pin, TITAN_GPIO_PIN_MODE_T pin_mode,
+ TITAN_GPIO_PIN_DIRECTION_T pin_direction)
+{
+ int reg_index = 0;
+ int mux_status;
+ GPIO_CFG gpio_cfg;
+ volatile PIN_SEL_REG_ARRAY_T *pin_sel_array = (PIN_SEL_REG_ARRAY_T*) AVALANCHE_PIN_SEL_BASE;
+ volatile TITAN_GPIO_CONTROL_T *gpio_cntl = (TITAN_GPIO_CONTROL_T*) KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_INPUT_0);
+
+ if (gpio_pin > 51 )
+ return(-1);
+
+ gpio_cfg = gptable[gpio_pin];
+ mux_status = (pin_sel_array->reg[gpio_cfg.pinSelReg - 1] >> gpio_cfg.shift) & 0x3;
+ if(!((mux_status == 0 /* tri-stated */ ) || (mux_status == gpio_cfg.func /*GPIO functionality*/)))
+ {
+ return(-1); /* Pin have been configured for non GPIO funcs. */
+ }
+
+ /* Set the pin to be used as GPIO. */
+ pin_sel_array->reg[gpio_cfg.pinSelReg - 1] |= ((gpio_cfg.func & 0x3) << gpio_cfg.shift);
+
+ /* Check whether gpio refers to the first GPIO reg or second. */
+ if(gpio_pin > 31)
+ {
+ reg_index = 1;
+ gpio_pin -= 32;
+ }
+
+ if(pin_mode)
+ gpio_cntl->enable[reg_index] |= (1 << gpio_pin); /* Enable */
+ else
+ gpio_cntl->enable[reg_index] &= ~(1 << gpio_pin);
+
+ if(pin_direction)
+ gpio_cntl->dir[reg_index] |= (1 << gpio_pin); /* Input */
+ else
+ gpio_cntl->dir[reg_index] &= ~(1 << gpio_pin);
+
+ return(0);
+
+}/* end of function titan_gpio_ctrl */
+
+static inline int titan_sysGpioInValue(unsigned int *in_val, unsigned int reg_index)
+{
+ volatile TITAN_GPIO_CONTROL_T *gpio_cntl = (TITAN_GPIO_CONTROL_T*) KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_INPUT_0);
+
+ if(reg_index > 1)
+ return (-1);
+
+ *in_val = gpio_cntl->data_in[reg_index];
+
+ return (0);
+}
+
+
+#endif

View File

@ -0,0 +1,68 @@
--- a/arch/mips/ar7/platform.c
+++ b/arch/mips/ar7/platform.c
@@ -716,23 +716,35 @@ static int __init ar7_register_devices(v
}
if (ar7_has_high_cpmac()) {
- res = fixed_phy_add(PHY_POLL, cpmac_high.id, &fixed_phy_status);
+ res = fixed_phy_add(PHY_POLL, ar7_is_titan() ? cpmac_high_titan.id : cpmac_high.id,
+ &fixed_phy_status);
if (res && res != -ENODEV)
return res;
- cpmac_get_mac(1, cpmac_high_data.dev_addr);
- res = platform_device_register(&cpmac_high);
+
+ cpmac_get_mac(1, ar7_is_titan() ? cpmac_high_data_titan.dev_addr :
+ cpmac_high_data.dev_addr);
+ res = platform_device_register(ar7_is_titan() ? &cpmac_high_titan :
+ &cpmac_high);
+
if (res)
return res;
} else {
- cpmac_low_data.phy_mask = 0xffffffff;
+ if (ar7_is_titan())
+ cpmac_low_data_titan.phy_mask = 0xffffffff;
+ else
+ cpmac_low_data.phy_mask = 0xffffffff;
+
}
- res = fixed_phy_add(PHY_POLL, cpmac_low.id, &fixed_phy_status);
+ res = fixed_phy_add(PHY_POLL, ar7_is_titan() ? cpmac_low_titan.id :
+ cpmac_low.id, &fixed_phy_status);
if (res && res != -ENODEV)
return res;
- cpmac_get_mac(0, cpmac_low_data.dev_addr);
- res = platform_device_register(&cpmac_low);
+ cpmac_get_mac(0, ar7_is_titan() ? cpmac_low_data_titan.dev_addr :
+ cpmac_low_data.dev_addr);
+ res = platform_device_register(ar7_is_titan() ? &cpmac_low_titan :
+ &cpmac_low);
if (res)
return res;
--- a/drivers/net/cpmac.c
+++ b/drivers/net/cpmac.c
@@ -1243,6 +1243,10 @@ int __devinit cpmac_init(void)
ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
ar7_device_reset(AR7_RESET_BIT_EPHY);
+ if (ar7_is_titan()) {
+ ar7_device_reset(TITAN_RESET_BIT_EPHY1);
+ }
+
cpmac_mii->reset(cpmac_mii);
for (i = 0; i < 300; i++)
@@ -1257,7 +1261,8 @@ int __devinit cpmac_init(void)
mask = 0;
}
- cpmac_mii->phy_mask = ~(mask | 0x80000000);
+ cpmac_mii->phy_mask = ar7_is_titan()? ~(mask | 0x80000000 | 0x40000000):
+ ~(mask | 0x80000000);
snprintf(cpmac_mii->id, MII_BUS_ID_SIZE, "1");
res = mdiobus_register(cpmac_mii);

View File

@ -1,238 +0,0 @@
CONFIG_32BIT=y
# CONFIG_64BIT is not set
CONFIG_AG71XX=y
CONFIG_AG71XX_AR8216_SUPPORT=y
# CONFIG_AG71XX_DEBUG is not set
# CONFIG_AG71XX_DEBUG_FS is not set
CONFIG_AR71XX_DEV_AP91_PCI=y
CONFIG_AR71XX_DEV_AP94_PCI=y
CONFIG_AR71XX_DEV_AR913X_WMAC=y
CONFIG_AR71XX_DEV_DSA=y
CONFIG_AR71XX_DEV_GPIO_BUTTONS=y
CONFIG_AR71XX_DEV_LEDS_GPIO=y
CONFIG_AR71XX_DEV_M25P80=y
CONFIG_AR71XX_DEV_PB42_PCI=y
CONFIG_AR71XX_DEV_USB=y
CONFIG_AR71XX_MACH_AP81=y
CONFIG_AR71XX_MACH_AP83=y
CONFIG_AR71XX_MACH_AW_NR580=y
CONFIG_AR71XX_MACH_DIR_600_A1=y
CONFIG_AR71XX_MACH_DIR_615_C1=y
CONFIG_AR71XX_MACH_DIR_825_B1=y
CONFIG_AR71XX_MACH_MZK_W04NU=y
CONFIG_AR71XX_MACH_MZK_W300NH=y
CONFIG_AR71XX_MACH_PB42=y
CONFIG_AR71XX_MACH_PB44=y
CONFIG_AR71XX_MACH_RB_4XX=y
CONFIG_AR71XX_MACH_TEW_632BRP=y
CONFIG_AR71XX_MACH_TL_WR1043ND=y
CONFIG_AR71XX_MACH_TL_WR741ND=y
CONFIG_AR71XX_MACH_TL_WR841N_V1=y
CONFIG_AR71XX_MACH_TL_WR941ND=y
CONFIG_AR71XX_MACH_UBNT=y
CONFIG_AR71XX_MACH_WNDR3700=y
CONFIG_AR71XX_MACH_WNR2000=y
CONFIG_AR71XX_MACH_WP543=y
CONFIG_AR71XX_MACH_WRT160NL=y
CONFIG_AR71XX_MACH_WRT400N=y
CONFIG_AR71XX_MACH_WZR_HP_G300NH=y
CONFIG_AR71XX_NVRAM=y
CONFIG_AR71XX_WDT=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_ARCH_POPULATES_NODE_MAP=y
CONFIG_ARCH_REQUIRE_GPIOLIB=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ATHEROS_AR71XX=y
# CONFIG_BCM47XX is not set
# CONFIG_BINARY_PRINTF is not set
CONFIG_BITREVERSE=y
# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_CEVT_R4K=y
CONFIG_CEVT_R4K_LIB=y
CONFIG_CMDLINE="rootfstype=squashfs,yaffs,jffs2 noinitrd console=ttyS0,115200"
CONFIG_CPU_BIG_ENDIAN=y
# CONFIG_CPU_CAVIUM_OCTEON is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
# CONFIG_CPU_LOONGSON2 is not set
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS32_R1 is not set
CONFIG_CPU_MIPS32_R2=y
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR2=y
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_R4300 is not set
# CONFIG_CPU_R4X00 is not set
# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_R5432 is not set
# CONFIG_CPU_R5500 is not set
# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_VR41XX is not set
CONFIG_CSRC_R4K=y
CONFIG_CSRC_R4K_LIB=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DEVPORT=y
# CONFIG_DM9000 is not set
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_EARLY_PRINTK=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_NXP_74HC153=y
CONFIG_GPIO_PCF857X=y
CONFIG_GPIO_SYSFS=y
CONFIG_HARDWARE_WATCHPOINTS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
CONFIG_HAVE_IDE=y
CONFIG_HAVE_MLOCK=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HW_HAS_PCI=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
CONFIG_I2C_ALGOBIT=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_GPIO=y
CONFIG_ICPLUS_PHY=y
CONFIG_IMAGE_CMDLINE_HACK=y
CONFIG_INITRAMFS_ROOT_GID=0
CONFIG_INITRAMFS_ROOT_UID=0
CONFIG_INITRAMFS_SOURCE="../../root"
CONFIG_IRQ_CPU=y
# CONFIG_ISDN is not set
# CONFIG_LEDS_GPIO is not set
# CONFIG_LEDS_WNDR3700_USB is not set
# CONFIG_LEMOTE_FULONG is not set
# CONFIG_M25PXX_USE_FAST_READ is not set
# CONFIG_MACH_ALCHEMY is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_MACH_TX39XX is not set
# CONFIG_MACH_TX49XX is not set
# CONFIG_MACH_VR41XX is not set
CONFIG_MICREL_PHY=y
# CONFIG_MIKROTIK_RB532 is not set
CONFIG_MIPS=y
# CONFIG_MIPS_COBALT is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
CONFIG_MIPS_MACHINE=y
# CONFIG_MIPS_MALTA is not set
CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SIM is not set
CONFIG_MTD_AR91XX_FLASH=y
# CONFIG_MTD_CFI_INTELEXT is not set
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_JEDECPROBE=y
CONFIG_MTD_M25P80=y
CONFIG_MTD_MYLOADER_PARTS=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_RB4XX=y
CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-2
CONFIG_MTD_REDBOOT_PARTS=y
CONFIG_MTD_WRT160NL_PARTS=y
CONFIG_MYLOADER=y
CONFIG_NET_DSA=y
CONFIG_NET_DSA_MV88E6060=y
CONFIG_NET_DSA_MV88E6063=y
# CONFIG_NET_DSA_MV88E6123_61_65 is not set
# CONFIG_NET_DSA_MV88E6131 is not set
# CONFIG_NET_DSA_MV88E6XXX is not set
# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set
# CONFIG_NET_DSA_TAG_DSA is not set
# CONFIG_NET_DSA_TAG_EDSA is not set
CONFIG_NET_DSA_TAG_TRAILER=y
# CONFIG_NO_IOPORT is not set
# CONFIG_NXP_STB220 is not set
# CONFIG_NXP_STB225 is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
CONFIG_PCI_DOMAINS=y
CONFIG_PHYLIB=y
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_PROBE_INITRD_HEADER is not set
CONFIG_RTL8306_PHY=y
CONFIG_RTL8366S_PHY=y
CONFIG_RTL8366S_PHY_DEBUG_FS=y
CONFIG_RTL8366_SMI=y
CONFIG_SCHED_OMIT_FRAME_POINTER=y
# CONFIG_SCSI_DMA is not set
# CONFIG_SERIAL_8250_EXTENDED is not set
CONFIG_SERIAL_8250_NR_UARTS=1
CONFIG_SERIAL_8250_RUNTIME_UARTS=1
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP28 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SIBYTE_BIGSUR is not set
# CONFIG_SIBYTE_CARMEL is not set
# CONFIG_SIBYTE_CRHINE is not set
# CONFIG_SIBYTE_CRHONE is not set
# CONFIG_SIBYTE_LITTLESUR is not set
# CONFIG_SIBYTE_RHONE is not set
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_SWARM is not set
# CONFIG_SLAB is not set
# CONFIG_SLOW_WORK is not set
CONFIG_SLUB=y
CONFIG_SPI=y
CONFIG_SPI_AP83=y
CONFIG_SPI_AR71XX=y
CONFIG_SPI_BITBANG=y
CONFIG_SPI_GPIO=y
CONFIG_SPI_MASTER=y
CONFIG_SPI_PB44=y
# CONFIG_SPI_SPIDEV is not set
# CONFIG_SPI_VSC7385 is not set
CONFIG_SWCONFIG=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_CPU_MIPS32_R2=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
# CONFIG_TC35815 is not set
CONFIG_TRACING_SUPPORT=y
CONFIG_TRAD_SIGNALS=y
CONFIG_USB_SUPPORT=y
CONFIG_YAFFS_9BYTE_TAGS=y
CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED=y
CONFIG_YAFFS_AUTO_YAFFS2=y
# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
CONFIG_YAFFS_FS=y
CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
CONFIG_YAFFS_YAFFS1=y
CONFIG_YAFFS_YAFFS2=y
CONFIG_ZONE_DMA_FLAG=0

View File

@ -1,240 +0,0 @@
CONFIG_32BIT=y
# CONFIG_64BIT is not set
CONFIG_AG71XX=y
CONFIG_AG71XX_AR8216_SUPPORT=y
# CONFIG_AG71XX_DEBUG is not set
# CONFIG_AG71XX_DEBUG_FS is not set
# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
# CONFIG_AR7 is not set
CONFIG_AR71XX_DEV_AP91_PCI=y
CONFIG_AR71XX_DEV_AP94_PCI=y
CONFIG_AR71XX_DEV_AR913X_WMAC=y
CONFIG_AR71XX_DEV_DSA=y
CONFIG_AR71XX_DEV_GPIO_BUTTONS=y
CONFIG_AR71XX_DEV_LEDS_GPIO=y
CONFIG_AR71XX_DEV_M25P80=y
CONFIG_AR71XX_DEV_PB42_PCI=y
CONFIG_AR71XX_DEV_USB=y
CONFIG_AR71XX_MACH_AP81=y
CONFIG_AR71XX_MACH_AP83=y
CONFIG_AR71XX_MACH_AW_NR580=y
CONFIG_AR71XX_MACH_DIR_600_A1=y
CONFIG_AR71XX_MACH_DIR_615_C1=y
CONFIG_AR71XX_MACH_DIR_825_B1=y
CONFIG_AR71XX_MACH_MZK_W04NU=y
CONFIG_AR71XX_MACH_MZK_W300NH=y
CONFIG_AR71XX_MACH_PB42=y
CONFIG_AR71XX_MACH_PB44=y
CONFIG_AR71XX_MACH_RB_4XX=y
CONFIG_AR71XX_MACH_TEW_632BRP=y
CONFIG_AR71XX_MACH_TL_WR1043ND=y
CONFIG_AR71XX_MACH_TL_WR741ND=y
CONFIG_AR71XX_MACH_TL_WR841N_V1=y
CONFIG_AR71XX_MACH_TL_WR941ND=y
CONFIG_AR71XX_MACH_UBNT=y
CONFIG_AR71XX_MACH_WNDR3700=y
CONFIG_AR71XX_MACH_WNR2000=y
CONFIG_AR71XX_MACH_WP543=y
CONFIG_AR71XX_MACH_WRT160NL=y
CONFIG_AR71XX_MACH_WRT400N=y
CONFIG_AR71XX_MACH_WZR_HP_G300NH=y
CONFIG_AR71XX_NVRAM=y
CONFIG_AR71XX_WDT=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_POPULATES_NODE_MAP=y
CONFIG_ARCH_REQUIRE_GPIOLIB=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ATHEROS_AR71XX=y
# CONFIG_BCM47XX is not set
CONFIG_BITREVERSE=y
# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_CEVT_R4K=y
CONFIG_CEVT_R4K_LIB=y
CONFIG_CMDLINE="rootfstype=squashfs,yaffs,jffs2 noinitrd console=ttyS0,115200"
CONFIG_CPU_BIG_ENDIAN=y
# CONFIG_CPU_CAVIUM_OCTEON is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
# CONFIG_CPU_LOONGSON2 is not set
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS32_R1 is not set
CONFIG_CPU_MIPS32_R2=y
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR2=y
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_R4300 is not set
# CONFIG_CPU_R4X00 is not set
# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_R5432 is not set
# CONFIG_CPU_R5500 is not set
# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_VR41XX is not set
CONFIG_CSRC_R4K=y
CONFIG_CSRC_R4K_LIB=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DEVPORT=y
# CONFIG_DM9000 is not set
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_EARLY_PRINTK=y
# CONFIG_FSNOTIFY is not set
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_NXP_74HC153=y
CONFIG_GPIO_SYSFS=y
CONFIG_HARDWARE_WATCHPOINTS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
CONFIG_HAVE_IDE=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HW_HAS_PCI=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
CONFIG_I2C_ALGOBIT=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_GPIO=y
CONFIG_ICPLUS_PHY=y
CONFIG_IMAGE_CMDLINE_HACK=y
# CONFIG_INITRAMFS_COMPRESSION_LZO is not set
CONFIG_INITRAMFS_ROOT_GID=0
CONFIG_INITRAMFS_ROOT_UID=0
CONFIG_INITRAMFS_SOURCE="../../root"
CONFIG_IRQ_CPU=y
# CONFIG_ISDN is not set
# CONFIG_LEDS_GPIO is not set
# CONFIG_LEDS_WNDR3700_USB is not set
# CONFIG_LEMOTE_FULONG is not set
# CONFIG_M25PXX_USE_FAST_READ is not set
CONFIG_MAC80211_DEFAULT_PS_VALUE=0
# CONFIG_MACH_ALCHEMY is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_MACH_TX39XX is not set
# CONFIG_MACH_TX49XX is not set
# CONFIG_MACH_VR41XX is not set
CONFIG_MICREL_PHY=y
# CONFIG_MIKROTIK_RB532 is not set
CONFIG_MIPS=y
# CONFIG_MIPS_COBALT is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
CONFIG_MIPS_MACHINE=y
# CONFIG_MIPS_MALTA is not set
CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SIM is not set
CONFIG_MTD_AR91XX_FLASH=y
# CONFIG_MTD_CFI is not set
# CONFIG_MTD_CFI_INTELEXT is not set
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_JEDECPROBE=y
CONFIG_MTD_M25P80=y
CONFIG_MTD_MYLOADER_PARTS=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_RB4XX=y
CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-2
CONFIG_MTD_REDBOOT_PARTS=y
CONFIG_MTD_WRT160NL_PARTS=y
CONFIG_MYLOADER=y
CONFIG_NET_DSA=y
CONFIG_NET_DSA_MV88E6060=y
CONFIG_NET_DSA_MV88E6063=y
# CONFIG_NET_DSA_MV88E6123_61_65 is not set
# CONFIG_NET_DSA_MV88E6131 is not set
# CONFIG_NET_DSA_MV88E6XXX is not set
# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set
# CONFIG_NET_DSA_TAG_DSA is not set
# CONFIG_NET_DSA_TAG_EDSA is not set
CONFIG_NET_DSA_TAG_TRAILER=y
# CONFIG_NO_IOPORT is not set
# CONFIG_NXP_STB220 is not set
# CONFIG_NXP_STB225 is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
CONFIG_PCI_DOMAINS=y
CONFIG_PHYLIB=y
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_PROBE_INITRD_HEADER is not set
CONFIG_RTL8306_PHY=y
CONFIG_RTL8366S_PHY=y
# CONFIG_RTL8366S_PHY_DEBUG_FS is not set
CONFIG_RTL8366_SMI=y
CONFIG_SCHED_OMIT_FRAME_POINTER=y
# CONFIG_SCSI_DMA is not set
# CONFIG_SERIAL_8250_EXTENDED is not set
CONFIG_SERIAL_8250_NR_UARTS=1
CONFIG_SERIAL_8250_RUNTIME_UARTS=1
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP28 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SIBYTE_BIGSUR is not set
# CONFIG_SIBYTE_CARMEL is not set
# CONFIG_SIBYTE_CRHINE is not set
# CONFIG_SIBYTE_CRHONE is not set
# CONFIG_SIBYTE_LITTLESUR is not set
# CONFIG_SIBYTE_RHONE is not set
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_SWARM is not set
# CONFIG_SLAB is not set
CONFIG_SLUB=y
CONFIG_SPI=y
CONFIG_SPI_AP83=y
CONFIG_SPI_AR71XX=y
CONFIG_SPI_BITBANG=y
CONFIG_SPI_GPIO=y
CONFIG_SPI_MASTER=y
CONFIG_SPI_PB44=y
# CONFIG_SPI_SPIDEV is not set
# CONFIG_SPI_VSC7385 is not set
CONFIG_SWCONFIG=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_CPU_MIPS32_R2=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
# CONFIG_TC35815 is not set
CONFIG_TRAD_SIGNALS=y
CONFIG_USB_SUPPORT=y
CONFIG_YAFFS_9BYTE_TAGS=y
CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED=y
CONFIG_YAFFS_AUTO_YAFFS2=y
# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
CONFIG_YAFFS_FS=y
CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
CONFIG_YAFFS_YAFFS1=y
CONFIG_YAFFS_YAFFS2=y
CONFIG_ZONE_DMA_FLAG=0

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