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ar7: remove volatiles definitely
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@10762 3c298f89-4303-0410-b956-a3cf2f4a3e73
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@ -48,12 +48,12 @@
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#define TNETD7200_DEF_USB_CLK 48000000
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struct tnetd7300_clock {
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volatile u32 ctrl;
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u32 ctrl;
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#define PREDIV_MASK 0x001f0000
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#define PREDIV_SHIFT 16
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#define POSTDIV_MASK 0x0000001f
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u32 unused1[3];
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volatile u32 pll;
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u32 pll;
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#define MUL_MASK 0x0000f000
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#define MUL_SHIFT 12
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#define PLL_MODE_MASK 0x00000001
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@ -71,17 +71,17 @@ struct tnetd7300_clocks {
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};
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struct tnetd7200_clock {
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volatile u32 ctrl;
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u32 ctrl;
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u32 unused1[3];
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#define DIVISOR_ENABLE_MASK 0x00008000
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volatile u32 mul;
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volatile u32 prediv;
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volatile u32 postdiv;
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volatile u32 postdiv2;
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u32 mul;
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u32 prediv;
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u32 postdiv;
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u32 postdiv2;
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u32 unused2[6];
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volatile u32 cmd;
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volatile u32 status;
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volatile u32 cmden;
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u32 cmd;
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u32 status;
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u32 cmden;
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u32 padding[15];
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};
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@ -180,8 +180,8 @@ static int tnetd7300_get_clock(u32 shift, struct tnetd7300_clock *clock,
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{
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int product;
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int base_clock = AR7_REF_CLOCK;
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u32 ctrl = clock->ctrl;
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u32 pll = clock->pll;
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u32 ctrl = readl(&clock->ctrl);
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u32 pll = readl(&clock->pll);
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int prediv = ((ctrl & PREDIV_MASK) >> PREDIV_SHIFT) + 1;
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int postdiv = (ctrl & POSTDIV_MASK) + 1;
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int divisor = prediv * postdiv;
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@ -224,7 +224,6 @@ static int tnetd7300_get_clock(u32 shift, struct tnetd7300_clock *clock,
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static void tnetd7300_set_clock(u32 shift, struct tnetd7300_clock *clock,
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u32 *bootcr, u32 frequency)
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{
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u32 status;
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int prediv, postdiv, mul;
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int base_clock = ar7_bus_clock;
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@ -245,13 +244,11 @@ static void tnetd7300_set_clock(u32 shift, struct tnetd7300_clock *clock,
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calculate(base_clock, frequency, &prediv, &postdiv, &mul);
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clock->ctrl = ((prediv - 1) << PREDIV_SHIFT) | (postdiv - 1);
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writel(((prediv - 1) << PREDIV_SHIFT) | (postdiv - 1), &clock->ctrl);
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mdelay(1);
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clock->pll = 4;
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do
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status = clock->pll;
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while (status & PLL_STATUS);
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clock->pll = ((mul - 1) << MUL_SHIFT) | (0xff << 3) | 0x0e;
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writel(4, &clock->pll);
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while (readl(&clock->pll) & PLL_STATUS);
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writel(((mul - 1) << MUL_SHIFT) | (0xff << 3) | 0x0e, &clock->pll);
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mdelay(75);
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}
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@ -286,13 +283,13 @@ static void __init tnetd7300_init_clocks(void)
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static int tnetd7200_get_clock(int base, struct tnetd7200_clock *clock,
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u32 *bootcr, u32 bus_clock)
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{
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int divisor = ((clock->prediv & 0x1f) + 1) *
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((clock->postdiv & 0x1f) + 1);
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int divisor = ((readl(&clock->prediv) & 0x1f) + 1) *
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((readl(&clock->postdiv) & 0x1f) + 1);
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if (*bootcr & BOOT_PLL_BYPASS)
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return base / divisor;
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return base * ((clock->mul & 0xf) + 1) / divisor;
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return base * ((readl(&clock->mul) & 0xf) + 1) / divisor;
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}
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@ -304,29 +301,29 @@ static void tnetd7200_set_clock(int base, struct tnetd7200_clock *clock,
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"postdiv = %d, postdiv2 = %d, mul = %d\n",
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base, frequency, prediv, postdiv, postdiv2, mul);
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clock->ctrl = 0;
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clock->prediv = DIVISOR_ENABLE_MASK | ((prediv - 1) & 0x1F);
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clock->mul = ((mul - 1) & 0xF);
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writel(0, &clock->ctrl);
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writel(DIVISOR_ENABLE_MASK | ((prediv - 1) & 0x1F), &clock->prediv);
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writel((mul - 1) & 0xF, &clock->mul);
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for (mul = 0; mul < 2000; mul++) /* nop */;
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while (clock->status & 0x1) /* nop */;
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while (readl(&clock->status) & 0x1) /* nop */;
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clock->postdiv = DIVISOR_ENABLE_MASK | ((postdiv - 1) & 0x1F);
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writel(DIVISOR_ENABLE_MASK | ((postdiv - 1) & 0x1F), &clock->postdiv);
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clock->cmden |= 1;
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clock->cmd |= 1;
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writel(readl(&clock->cmden) | 1, &clock->cmden);
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writel(readl(&clock->cmd) | 1, &clock->cmd);
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while (clock->status & 0x1) /* nop */;
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while (readl(&clock->status) & 0x1) /* nop */;
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clock->postdiv2 = DIVISOR_ENABLE_MASK | ((postdiv2 - 1) & 0x1F);
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writel(DIVISOR_ENABLE_MASK | ((postdiv2 - 1) & 0x1F), &clock->postdiv2);
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clock->cmden |= 1;
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clock->cmd |= 1;
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writel(readl(&clock->cmden) | 1, &clock->cmden);
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writel(readl(&clock->cmd) | 1, &clock->cmd);
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while (clock->status & 0x1) /* nop */;
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while (readl(&clock->status) & 0x1) /* nop */;
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clock->ctrl |= 1;
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writel(readl(&clock->ctrl) | 1, &clock->ctrl);
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}
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static int tnetd7200_get_clock_base(int clock_id, u32 *bootcr)
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