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ar71xx: add platform data for the RB750 NAND driver
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@31022 3c298f89-4303-0410-b956-a3cf2f4a3e73
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580a413385
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@ -1,5 +1,5 @@
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/*
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* MikroTik RouterBOARD 750 support
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* MikroTik RouterBOARD 750/750GL support
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*
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* Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org>
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*
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@ -59,9 +59,13 @@ static struct platform_device rb750_leds_device = {
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}
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};
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static struct rb7xx_nand_platform_data rb750_nand_data;
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static struct platform_device rb750_nand_device = {
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.name = "rb750-nand",
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.id = -1,
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.dev = {
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.platform_data = &rb750_nand_data,
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}
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};
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int rb750_latch_change(u32 mask_clr, u32 mask_set)
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@ -113,19 +117,24 @@ unlock:
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}
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EXPORT_SYMBOL_GPL(rb750_latch_change);
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void rb750_nand_pins_enable(void)
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static void rb750_nand_enable_pins(void)
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{
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rb750_latch_change(RB750_LVC573_LE, 0);
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ath79_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE,
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AR724X_GPIO_FUNC_SPI_EN);
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}
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EXPORT_SYMBOL_GPL(rb750_nand_pins_enable);
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void rb750_nand_pins_disable(void)
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static void rb750_nand_disable_pins(void)
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{
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ath79_gpio_function_setup(AR724X_GPIO_FUNC_SPI_EN,
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AR724X_GPIO_FUNC_JTAG_DISABLE);
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rb750_latch_change(0, RB750_LVC573_LE);
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}
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static void rb750_nand_latch_change(u32 clear, u32 set)
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{
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rb750_latch_change(clear, set);
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}
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EXPORT_SYMBOL_GPL(rb750_nand_pins_disable);
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static void __init rb750_setup(void)
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{
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@ -147,6 +156,11 @@ static void __init rb750_setup(void)
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ath79_register_eth(0);
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platform_device_register(&rb750_leds_device);
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rb750_nand_data.nce_line = RB750_NAND_NCE;
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rb750_nand_data.enable_pins = rb750_nand_enable_pins;
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rb750_nand_data.disable_pins = rb750_nand_disable_pins;
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rb750_nand_data.latch_change = rb750_nand_latch_change;
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platform_device_register(&rb750_nand_device);
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}
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@ -43,6 +43,7 @@
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#define RB750_LED_PORT3 BIT(RB750_GPIO_LED_PORT3)
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#define RB750_LED_PORT4 BIT(RB750_GPIO_LED_PORT4)
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#define RB750_LED_PORT5 BIT(RB750_GPIO_LED_PORT5)
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#define RB750_NAND_NCE BIT(RB750_GPIO_NAND_NCE)
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#define RB750_LVC573_LE BIT(RB750_GPIO_LVC573_LE)
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@ -61,8 +62,14 @@ struct rb750_led_platform_data {
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struct rb750_led_data *leds;
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};
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struct rb7xx_nand_platform_data {
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u32 nce_line;
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void (*enable_pins)(void);
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void (*disable_pins)(void);
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void (*latch_change)(u32, u32);
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};
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int rb750_latch_change(u32 mask_clr, u32 mask_set);
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void rb750_nand_pins_enable(void);
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void rb750_nand_pins_disable(void);
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#endif /* _MACH_RB750_H */
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@ -31,20 +31,24 @@
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#define RB750_NAND_NRE BIT(RB750_GPIO_NAND_NRE)
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#define RB750_NAND_NWE BIT(RB750_GPIO_NAND_NWE)
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#define RB750_NAND_RDY BIT(RB750_GPIO_NAND_RDY)
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#define RB750_NAND_NCE BIT(RB750_GPIO_NAND_NCE)
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#define RB750_NAND_DATA_SHIFT 1
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#define RB750_NAND_DATA_BITS (0xff << RB750_NAND_DATA_SHIFT)
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#define RB750_NAND_INPUT_BITS (RB750_NAND_DATA_BITS | RB750_NAND_RDY)
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#define RB750_NAND_OUTPUT_BITS (RB750_NAND_ALE | RB750_NAND_CLE | \
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RB750_NAND_NRE | RB750_NAND_NWE | \
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RB750_NAND_NCE)
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RB750_NAND_NRE | RB750_NAND_NWE)
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struct rb750_nand_info {
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struct nand_chip chip;
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struct mtd_info mtd;
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struct rb7xx_nand_platform_data *pdata;
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};
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static inline struct rb750_nand_info *mtd_to_rbinfo(struct mtd_info *mtd)
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{
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return container_of(mtd, struct rb750_nand_info, mtd);
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}
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/*
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* We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader
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* will not be able to find the kernel that we load.
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@ -138,16 +142,12 @@ static int rb750_nand_read_verify(u8 *read_buf, unsigned len,
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static void rb750_nand_select_chip(struct mtd_info *mtd, int chip)
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{
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struct rb750_nand_info *rbinfo = mtd_to_rbinfo(mtd);
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void __iomem *base = ath79_gpio_base;
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u32 func;
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u32 t;
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func = __raw_readl(base + AR71XX_GPIO_REG_FUNC);
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if (chip >= 0) {
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/* disable latch */
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rb750_latch_change(RB750_LVC573_LE, 0);
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rb750_nand_pins_enable();
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rbinfo->pdata->enable_pins();
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/* set input mode for data lines */
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t = __raw_readl(base + AR71XX_GPIO_REG_OE);
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@ -161,10 +161,12 @@ static void rb750_nand_select_chip(struct mtd_info *mtd, int chip)
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(void) __raw_readl(base + AR71XX_GPIO_REG_SET);
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/* activate CE line */
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__raw_writel(RB750_NAND_NCE, base + AR71XX_GPIO_REG_CLEAR);
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__raw_writel(rbinfo->pdata->nce_line,
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base + AR71XX_GPIO_REG_CLEAR);
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} else {
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/* deactivate CE line */
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__raw_writel(RB750_NAND_NCE, base + AR71XX_GPIO_REG_SET);
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__raw_writel(rbinfo->pdata->nce_line,
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base + AR71XX_GPIO_REG_SET);
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/* flush write */
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(void) __raw_readl(base + AR71XX_GPIO_REG_SET);
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@ -172,10 +174,7 @@ static void rb750_nand_select_chip(struct mtd_info *mtd, int chip)
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__raw_writel(t | RB750_NAND_IO0 | RB750_NAND_RDY,
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base + AR71XX_GPIO_REG_OE);
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rb750_nand_pins_disable();
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/* enable latch */
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rb750_latch_change(0, RB750_LVC573_LE);
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rbinfo->pdata->disable_pins();
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}
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}
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@ -232,7 +231,7 @@ static int rb750_nand_verify_buf(struct mtd_info *mtd, const u8 *buf, int len)
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return rb750_nand_read_verify(NULL, len, buf);
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}
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static void __init rb750_nand_gpio_init(void)
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static void __init rb750_nand_gpio_init(struct rb750_nand_info *info)
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{
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void __iomem *base = ath79_gpio_base;
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u32 out;
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@ -253,19 +252,24 @@ static void __init rb750_nand_gpio_init(void)
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/* setup output lines */
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t = __raw_readl(base + AR71XX_GPIO_REG_OE);
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__raw_writel(t | RB750_NAND_OUTPUT_BITS, base + AR71XX_GPIO_REG_OE);
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t |= RB750_NAND_OUTPUT_BITS;
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t |= info->pdata->nce_line;
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__raw_writel(t, base + AR71XX_GPIO_REG_OE);
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rb750_latch_change(~out & RB750_NAND_IO0, out & RB750_NAND_IO0);
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info->pdata->latch_change(~out & RB750_NAND_IO0, out & RB750_NAND_IO0);
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}
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static int __devinit rb750_nand_probe(struct platform_device *pdev)
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{
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struct rb750_nand_info *info;
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struct rb7xx_nand_platform_data *pdata;
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int ret;
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printk(KERN_INFO DRV_DESC " version " DRV_VERSION "\n");
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rb750_nand_gpio_init();
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pdata = pdev->dev.platform_data;
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if (!pdata)
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return -EINVAL;
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info = kzalloc(sizeof(*info), GFP_KERNEL);
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if (!info)
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@ -287,8 +291,12 @@ static int __devinit rb750_nand_probe(struct platform_device *pdev)
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info->chip.ecc.mode = NAND_ECC_SOFT;
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info->chip.options |= NAND_NO_AUTOINCR;
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info->pdata = pdata;
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platform_set_drvdata(pdev, info);
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rb750_nand_gpio_init(info);
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ret = nand_scan_ident(&info->mtd, 1, NULL);
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if (ret) {
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ret = -ENXIO;
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