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ar71xx: define NAND controller base address and register size for AR934X/QCA955x

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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33382 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
juhosg
2012-09-12 19:06:38 +00:00
parent de071d14f7
commit e96ea88268
2 changed files with 23 additions and 13 deletions
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6
target/linux/ar71xx/patches-3.3/620-MIPS-ath79-OTP-support.patch
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@@ -149,9 +149,9 @@
#endif /* _ATH79_DEV_WMAC_H */
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -125,6 +125,14 @@
#define QCA955X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000)
#define QCA955X_GMAC_SIZE 0x40
@@ -129,6 +129,14 @@
#define QCA955X_NFC_BASE 0x1b000200
#define QCA955X_NFC_SIZE 0xb8
+#define AR9300_OTP_BASE 0x14000
+#define AR9300_OTP_STATUS 0x15f18