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[ar71xx] rename reset register definitions

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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@13516 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
juhosg
2008-12-04 16:55:43 +00:00
parent fdce38b54b
commit efbbbe4abd
5 changed files with 39 additions and 39 deletions
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28
target/linux/ar71xx/files/include/asm-mips/mach-ar71xx/ar71xx.h
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@@ -296,20 +296,20 @@ extern void ar71xx_ddr_flush(u32 reg);
/*
* RESET block
*/
#define RESET_REG_TIMER 0x00
#define RESET_REG_TIMER_RELOAD 0x04
#define RESET_REG_WDOG_CTRL 0x08
#define RESET_REG_WDOG 0x0c
#define RESET_REG_MISC_INT_STATUS 0x10
#define RESET_REG_MISC_INT_ENABLE 0x14
#define RESET_REG_PCI_INT_STATUS 0x18
#define RESET_REG_PCI_INT_ENABLE 0x1c
#define RESET_REG_GLOBAL_INT_STATUS 0x20
#define RESET_REG_RESET_MODULE 0x24
#define RESET_REG_PERFC_CTRL 0x2c
#define RESET_REG_PERFC0 0x30
#define RESET_REG_PERFC1 0x34
#define RESET_REG_REV_ID 0x90
#define AR71XX_RESET_REG_TIMER 0x00
#define AR71XX_RESET_REG_TIMER_RELOAD 0x04
#define AR71XX_RESET_REG_WDOG_CTRL 0x08
#define AR71XX_RESET_REG_WDOG 0x0c
#define AR71XX_RESET_REG_MISC_INT_STATUS 0x10
#define AR71XX_RESET_REG_MISC_INT_ENABLE 0x14
#define AR71XX_RESET_REG_PCI_INT_STATUS 0x18
#define AR71XX_RESET_REG_PCI_INT_ENABLE 0x1c
#define AR71XX_RESET_REG_GLOBAL_INT_STATUS 0x20
#define AR71XX_RESET_REG_RESET_MODULE 0x24
#define AR71XX_RESET_REG_PERFC_CTRL 0x2c
#define AR71XX_RESET_REG_PERFC0 0x30
#define AR71XX_RESET_REG_PERFC1 0x34
#define AR71XX_RESET_REG_REV_ID 0x90
#define WDOG_CTRL_LAST_RESET BIT(31)
#define WDOG_CTRL_ACTION_MASK 3