1
0
mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2024-11-18 07:54:59 +02:00

Serial patches for .21

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@7375 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
hcg 2007-05-28 14:47:05 +00:00
parent 97904f525f
commit f2765db8e6
2 changed files with 91 additions and 104 deletions

View File

@ -1,75 +1,72 @@
--- linux-2.6.19.2.old/drivers/serial/atmel_serial.c 2007-05-01 13:08:03.000000000 +0200 --- linux-2.6.21.1.orig/drivers/serial/atmel_serial.c 2007-05-28 12:22:29.000000000 +0200
+++ linux-2.6.19.2/drivers/serial/atmel_serial.c 2007-05-09 17:13:34.000000000 +0200 +++ linux-2.6.21.1/drivers/serial/atmel_serial.c 2007-05-28 16:39:09.000000000 +0200
@@ -173,6 +173,34 @@ @@ -174,7 +174,35 @@
at91_set_gpio_value(AT91_PIN_PA21, 0); at91_set_gpio_value(AT91_PIN_PA21, 0);
else else
at91_set_gpio_value(AT91_PIN_PA21, 1); at91_set_gpio_value(AT91_PIN_PA21, 1);
+ +
+ /* + /*
+ * FDL VersaLink adds GPIOS to provide full modem control on + * FDL VersaLink adds GPIOS to provide full modem control on
+ * USART 0 - Drive DTR and RI pins manually + * USART 0 - Drive DTR and RI pins manually
+ */ + */
+ if (mctrl & TIOCM_DTR) + if (mctrl & TIOCM_DTR)
+ at91_set_gpio_value(AT91_PIN_PB6, 0); + at91_set_gpio_value(AT91_PIN_PB6, 0);
+ else + else
+ at91_set_gpio_value(AT91_PIN_PB6, 1); + at91_set_gpio_value(AT91_PIN_PB6, 1);
+ if (mctrl & TIOCM_RI) + if (mctrl & TIOCM_RI)
+ at91_set_gpio_value(AT91_PIN_PB7, 0); + at91_set_gpio_value(AT91_PIN_PB7, 0);
+ else + else
+ at91_set_gpio_value(AT91_PIN_PB7, 1); + at91_set_gpio_value(AT91_PIN_PB7, 1);
+ }
+
+ /*
+ * FDL VersaLink adds GPIOS to provide full modem control on
+ * USART 3 - Drive DTR and RI pins manually
+ */
+ if (port->mapbase == AT91RM9200_BASE_US3) {
+ if (mctrl & TIOCM_DTR)
+ at91_set_gpio_value(AT91_PIN_PB29, 0);
+ else
+ at91_set_gpio_value(AT91_PIN_PB29, 1);
+ if (mctrl & TIOCM_RI)
+ at91_set_gpio_value(AT91_PIN_PB2, 0);
+ else
+ at91_set_gpio_value(AT91_PIN_PB2, 1);
} }
+
+ /*
+ * FDL VersaLink adds GPIOS to provide full modem control on
+ * USART 3 - Drive DTR and RI pins manually
+ */
+ if (port->mapbase == AT91RM9200_BASE_US3) {
+ if (mctrl & TIOCM_DTR)
+ at91_set_gpio_value(AT91_PIN_PB29, 0);
+ else
+ at91_set_gpio_value(AT91_PIN_PB29, 1);
+ if (mctrl & TIOCM_RI)
+ at91_set_gpio_value(AT91_PIN_PB2, 0);
+ else
+ at91_set_gpio_value(AT91_PIN_PB2, 1);
+ }
} }
#endif #endif
@@ -210,8 +238,14 @@
@@ -211,8 +239,10 @@
/* /*
* The control signals are active low. * The control signals are active low.
*/ */
- if (!(status & ATMEL_US_DCD)) - if (!(status & ATMEL_US_DCD))
- ret |= TIOCM_CD; - ret |= TIOCM_CD;
+ +
+ /* + if (!(port->mapbase == AT91RM9200_BASE_US0 || port->mapbase == AT91RM9200_BASE_US3))
+ * Ignore DCD reister for USARTS 0 and 3 as FDL Versalink uses
+ * GPIO's for these signals
+ */
+ if (!(port->mapbase == AT91RM9200_BASE_US0 || port->mapbase == AT91RM9200_BASE_US3))
+ if (!(status & ATMEL_US_DCD)) + if (!(status & ATMEL_US_DCD))
+ ret |= TIOCM_CD; + ret |= TIOCM_CD;
if (!(status & ATMEL_US_CTS)) if (!(status & ATMEL_US_CTS))
ret |= TIOCM_CTS; ret |= TIOCM_CTS;
if (!(status & ATMEL_US_DSR)) if (!(status & ATMEL_US_DSR))
@@ -219,6 +253,16 @@ @@ -220,6 +250,16 @@
if (!(status & ATMEL_US_RI)) if (!(status & ATMEL_US_RI))
ret |= TIOCM_RI; ret |= TIOCM_RI;
+ /* + /*
+ * Read the GPIO's for the FDL VersaLink special case + * Read the GPIO's for the FDL VersaLink special case
+ */ + */
+ if (port->mapbase == AT91RM9200_BASE_US0) + if (port->mapbase == AT91RM9200_BASE_US0)
+ if (!(at91_get_gpio_value(AT91_PIN_PA19))) + if (!(at91_get_gpio_value(AT91_PIN_PA19)))
+ ret |= TIOCM_CD; + ret |= TIOCM_CD;
+ if (port->mapbase == AT91RM9200_BASE_US3) + if (port->mapbase == AT91RM9200_BASE_US3)
+ if (!(at91_get_gpio_value(AT91_PIN_PA24))) + if (!(at91_get_gpio_value(AT91_PIN_PA24)))
+ ret |= TIOCM_CD; + ret |= TIOCM_CD;
+ +
return ret; return ret;
} }
@@ -510,6 +554,34 @@ @@ -511,6 +551,34 @@
} }
/* /*
@ -78,12 +75,12 @@
+ +
+static irqreturn_t atmel_u0_DCD_interrupt(int irq, void *dev_id) +static irqreturn_t atmel_u0_DCD_interrupt(int irq, void *dev_id)
+{ +{
+ struct uart_port *port = dev_id; + struct uart_port *port = dev_id;
+ int status = at91_get_gpio_value(irq); + int status = at91_get_gpio_value(irq);
+
+ uart_handle_dcd_change(port, !(status));
+ +
+ return IRQ_HANDLED; + uart_handle_dcd_change(port, !(status));
+
+ return IRQ_HANDLED;
+} +}
+ +
+/* +/*
@ -92,19 +89,19 @@
+ +
+static irqreturn_t atmel_u3_DCD_interrupt(int irq, void *dev_id) +static irqreturn_t atmel_u3_DCD_interrupt(int irq, void *dev_id)
+{ +{
+ struct uart_port *port = dev_id; + struct uart_port *port = dev_id;
+ int status = at91_get_gpio_value(irq); + int status = at91_get_gpio_value(irq);
+
+ uart_handle_dcd_change(port, !(status));
+ +
+ return IRQ_HANDLED; + uart_handle_dcd_change(port, !(status));
+
+ return IRQ_HANDLED;
+} +}
+ +
+/* +/*
* Interrupt handler * Interrupt handler
*/ */
static irqreturn_t atmel_interrupt(int irq, void *dev_id) static irqreturn_t atmel_interrupt(int irq, void *dev_id)
@@ -586,6 +658,24 @@ @@ -587,6 +655,23 @@
return retval; return retval;
} }
@ -125,40 +122,39 @@
+ } + }
+ } + }
+ +
+ /*
/*
* Initialize DMA (if necessary) * Initialize DMA (if necessary)
*/ */
@@ -602,6 +692,10 @@ @@ -603,6 +688,10 @@
kfree(atmel_port->pdc_rx[0].buf); kfree(atmel_port->pdc_rx[0].buf);
} }
free_irq(port->irq, port); free_irq(port->irq, port);
+ if (port->mapbase == AT91RM9200_BASE_US0) + if (port->mapbase == AT91RM9200_BASE_US0)
+ free_irq(AT91_PIN_PA19, port); + free_irq(AT91_PIN_PA19, port);
+ if (port->mapbase == AT91RM9200_BASE_US3) + if (port->mapbase == AT91RM9200_BASE_US3)
+ free_irq(AT91_PIN_PA24, port); + free_irq(AT91_PIN_PA24, port);
return -ENOMEM; return -ENOMEM;
} }
pdc->dma_addr = dma_map_single(port->dev, pdc->buf, PDC_BUFFER_SIZE, DMA_FROM_DEVICE); pdc->dma_addr = dma_map_single(port->dev, pdc->buf, PDC_BUFFER_SIZE, DMA_FROM_DEVICE);
@@ -635,6 +729,10 @@ @@ -636,6 +725,10 @@
retval = atmel_open_hook(port); retval = atmel_open_hook(port);
if (retval) { if (retval) {
free_irq(port->irq, port); free_irq(port->irq, port);
+ if (port->mapbase == AT91RM9200_BASE_US0) + if (port->mapbase == AT91RM9200_BASE_US0)
+ free_irq(AT91_PIN_PA19, port); + free_irq(AT91_PIN_PA19, port);
+ if (port->mapbase == AT91RM9200_BASE_US3) + if (port->mapbase == AT91RM9200_BASE_US3)
+ free_irq(AT91_PIN_PA24, port); + free_irq(AT91_PIN_PA24, port);
return retval; return retval;
} }
} }
@@ -694,6 +792,10 @@ @@ -701,6 +794,10 @@
* Free the interrupt * Free the interrupt
*/ */
free_irq(port->irq, port); free_irq(port->irq, port);
+ if (port->mapbase == AT91RM9200_BASE_US0) + if (port->mapbase == AT91RM9200_BASE_US0)
+ free_irq(AT91_PIN_PA19, port); + free_irq(AT91_PIN_PA19, port);
+ if (port->mapbase == AT91RM9200_BASE_US3) + if (port->mapbase == AT91RM9200_BASE_US3)
+ free_irq(AT91_PIN_PA24, port); + free_irq(AT91_PIN_PA24, port);
/* /*
* If there is a specific "close" function (to unregister * If there is a specific "close" function (to unregister

View File

@ -1,43 +1,34 @@
diff -urN linux-2.6.19.2.old/arch/arm/mach-at91rm9200/at91rm9200_devices.c linux-2.6.19.2/arch/arm/mach-at91rm9200/at91rm9200_devices.c --- linux-2.6.21.1.orig/arch/arm/mach-at91/at91rm9200_devices.c 2007-05-28 12:22:29.000000000 +0200
--- linux-2.6.19.2.old/arch/arm/mach-at91rm9200/at91rm9200_devices.c 2007-05-01 13:08:02.000000000 +0200 +++ linux-2.6.21.1/arch/arm/mach-at91/at91rm9200_devices.c 2007-05-28 16:44:36.000000000 +0200
+++ linux-2.6.19.2/arch/arm/mach-at91rm9200/at91rm9200_devices.c 2007-05-09 12:59:58.000000000 +0200 @@ -618,7 +618,6 @@
@@ -709,6 +709,10 @@
#if defined(CONFIG_NEW_LEDS)
-
static struct platform_device at91_leds = {
.name = "at91_leds",
.id = -1,
@@ -724,6 +723,10 @@
* We need to drive the pin manually. Default is off (RTS is active low). * We need to drive the pin manually. Default is off (RTS is active low).
*/ */
at91_set_gpio_output(AT91_PIN_PA21, 1); at91_set_gpio_output(AT91_PIN_PA21, 1);
+ at91_set_gpio_output(AT91_PIN_PB6, 1); /* DTR0 */ + at91_set_gpio_output(AT91_PIN_PB6, 1); /* DTR0 */
+ at91_set_gpio_output(AT91_PIN_PB7, 1); /* RI0 */ + at91_set_gpio_output(AT91_PIN_PB7, 1); /* RI0 */
+ at91_set_gpio_input(AT91_PIN_PA19, 1); /* DCD0 */ + at91_set_gpio_input(AT91_PIN_PA19, 1); /* DCD0 */
+ at91_set_deglitch(AT91_PIN_PA19, 1); + at91_set_deglitch(AT91_PIN_PA19, 1);
} }
static struct resource uart1_resources[] = { static struct resource uart1_resources[] = {
@@ -820,6 +824,12 @@ @@ -835,6 +838,12 @@
{ {
at91_set_B_periph(AT91_PIN_PA5, 1); /* TXD3 */ at91_set_B_periph(AT91_PIN_PA5, 1); /* TXD3 */
at91_set_B_periph(AT91_PIN_PA6, 0); /* RXD3 */ at91_set_B_periph(AT91_PIN_PA6, 0); /* RXD3 */
+ at91_set_B_periph(AT91_PIN_PB0, 0); /* RTS3 */ + at91_set_B_periph(AT91_PIN_PB0, 0); /* RTS3 */
+ at91_set_B_periph(AT91_PIN_PB1, 0); /* CTS3 */ + at91_set_B_periph(AT91_PIN_PB1, 0); /* CTS3 */
+ at91_set_gpio_output(AT91_PIN_PB29, 1); /* DTR0 */ + at91_set_gpio_output(AT91_PIN_PB29, 1); /* DTR0 */
+ at91_set_gpio_output(AT91_PIN_PB2, 1); /* RI0 */ + at91_set_gpio_output(AT91_PIN_PB2, 1); /* RI0 */
+ at91_set_gpio_input(AT91_PIN_PA24, 1); /* DCD0 */ + at91_set_gpio_input(AT91_PIN_PA24, 1); /* DCD0 */
+ at91_set_deglitch(AT91_PIN_PA24, 1); + at91_set_deglitch(AT91_PIN_PA24, 1);
} }
struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
diff -urN linux-2.6.19.2.old/arch/arm/mach-at91rm9200/vlink_leds.c linux-2.6.19.2/arch/arm/mach-at91rm9200/vlink_leds.c
--- linux-2.6.19.2.old/arch/arm/mach-at91rm9200/vlink_leds.c 2007-05-01 13:08:03.000000000 +0200
+++ linux-2.6.19.2/arch/arm/mach-at91rm9200/vlink_leds.c 2007-05-09 12:58:42.000000000 +0200
@@ -114,12 +114,6 @@
at91_set_gpio_input(AT91_PIN_PB8, 1); // JIGPRESENT
at91_set_gpio_input(AT91_PIN_PB22, 1); // PWR_IND
- at91_set_gpio_input(AT91_PIN_PA19, 1); // P1DTR
- at91_set_gpio_input(AT91_PIN_PA24, 1); // P2DTR
- at91_set_gpio_output(AT91_PIN_PB29, 1); // P2DCD
- at91_set_gpio_output(AT91_PIN_PB2, 1); // P2RI
- at91_set_gpio_output(AT91_PIN_PB6, 1); // P1DCD
- at91_set_gpio_output(AT91_PIN_PB7, 1); // P1RI
at91_set_gpio_input(AT91_PIN_PB27, 1); // UDB_CNX
at91_set_gpio_output(AT91_PIN_PB28, 1); // UDB_PUP