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Serial patches for .21
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@7375 3c298f89-4303-0410-b956-a3cf2f4a3e73
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@ -1,6 +1,6 @@
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--- linux-2.6.19.2.old/drivers/serial/atmel_serial.c 2007-05-01 13:08:03.000000000 +0200
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+++ linux-2.6.19.2/drivers/serial/atmel_serial.c 2007-05-09 17:13:34.000000000 +0200
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@@ -173,6 +173,34 @@
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--- linux-2.6.21.1.orig/drivers/serial/atmel_serial.c 2007-05-28 12:22:29.000000000 +0200
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+++ linux-2.6.21.1/drivers/serial/atmel_serial.c 2007-05-28 16:39:09.000000000 +0200
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@@ -174,7 +174,35 @@
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at91_set_gpio_value(AT91_PIN_PA21, 0);
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else
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at91_set_gpio_value(AT91_PIN_PA21, 1);
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@ -17,7 +17,7 @@
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+ at91_set_gpio_value(AT91_PIN_PB7, 0);
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+ else
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+ at91_set_gpio_value(AT91_PIN_PB7, 1);
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+ }
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}
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+
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+ /*
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+ * FDL VersaLink adds GPIOS to provide full modem control on
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@ -32,27 +32,24 @@
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+ at91_set_gpio_value(AT91_PIN_PB2, 0);
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+ else
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+ at91_set_gpio_value(AT91_PIN_PB2, 1);
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}
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+ }
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}
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#endif
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@@ -210,8 +238,14 @@
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@@ -211,8 +239,10 @@
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/*
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* The control signals are active low.
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*/
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- if (!(status & ATMEL_US_DCD))
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- ret |= TIOCM_CD;
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+
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+ /*
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+ * Ignore DCD reister for USARTS 0 and 3 as FDL Versalink uses
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+ * GPIO's for these signals
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+ */
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+ if (!(port->mapbase == AT91RM9200_BASE_US0 || port->mapbase == AT91RM9200_BASE_US3))
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+ if (!(status & ATMEL_US_DCD))
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+ ret |= TIOCM_CD;
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if (!(status & ATMEL_US_CTS))
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ret |= TIOCM_CTS;
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if (!(status & ATMEL_US_DSR))
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@@ -219,6 +253,16 @@
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@@ -220,6 +250,16 @@
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if (!(status & ATMEL_US_RI))
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ret |= TIOCM_RI;
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@ -69,7 +66,7 @@
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return ret;
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}
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@@ -510,6 +554,34 @@
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@@ -511,6 +551,34 @@
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}
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/*
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@ -104,7 +101,7 @@
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* Interrupt handler
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*/
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static irqreturn_t atmel_interrupt(int irq, void *dev_id)
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@@ -586,6 +658,24 @@
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@@ -587,6 +655,23 @@
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return retval;
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}
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@ -124,12 +121,11 @@
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+ return retval;
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+ }
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+ }
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+
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+
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/*
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* Initialize DMA (if necessary)
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*/
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@@ -602,6 +692,10 @@
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@@ -603,6 +688,10 @@
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kfree(atmel_port->pdc_rx[0].buf);
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}
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free_irq(port->irq, port);
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@ -140,7 +136,7 @@
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return -ENOMEM;
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}
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pdc->dma_addr = dma_map_single(port->dev, pdc->buf, PDC_BUFFER_SIZE, DMA_FROM_DEVICE);
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@@ -635,6 +729,10 @@
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@@ -636,6 +725,10 @@
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retval = atmel_open_hook(port);
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if (retval) {
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free_irq(port->irq, port);
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@ -151,7 +147,7 @@
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return retval;
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}
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}
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@@ -694,6 +792,10 @@
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@@ -701,6 +794,10 @@
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* Free the interrupt
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*/
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free_irq(port->irq, port);
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@ -1,7 +1,14 @@
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diff -urN linux-2.6.19.2.old/arch/arm/mach-at91rm9200/at91rm9200_devices.c linux-2.6.19.2/arch/arm/mach-at91rm9200/at91rm9200_devices.c
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--- linux-2.6.19.2.old/arch/arm/mach-at91rm9200/at91rm9200_devices.c 2007-05-01 13:08:02.000000000 +0200
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+++ linux-2.6.19.2/arch/arm/mach-at91rm9200/at91rm9200_devices.c 2007-05-09 12:59:58.000000000 +0200
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@@ -709,6 +709,10 @@
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--- linux-2.6.21.1.orig/arch/arm/mach-at91/at91rm9200_devices.c 2007-05-28 12:22:29.000000000 +0200
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+++ linux-2.6.21.1/arch/arm/mach-at91/at91rm9200_devices.c 2007-05-28 16:44:36.000000000 +0200
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@@ -618,7 +618,6 @@
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#if defined(CONFIG_NEW_LEDS)
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-
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static struct platform_device at91_leds = {
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.name = "at91_leds",
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.id = -1,
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@@ -724,6 +723,10 @@
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* We need to drive the pin manually. Default is off (RTS is active low).
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*/
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at91_set_gpio_output(AT91_PIN_PA21, 1);
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@ -12,7 +19,7 @@ diff -urN linux-2.6.19.2.old/arch/arm/mach-at91rm9200/at91rm9200_devices.c linux
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}
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static struct resource uart1_resources[] = {
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@@ -820,6 +824,12 @@
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@@ -835,6 +838,12 @@
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{
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at91_set_B_periph(AT91_PIN_PA5, 1); /* TXD3 */
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at91_set_B_periph(AT91_PIN_PA6, 0); /* RXD3 */
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@ -25,19 +32,3 @@ diff -urN linux-2.6.19.2.old/arch/arm/mach-at91rm9200/at91rm9200_devices.c linux
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}
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struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
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diff -urN linux-2.6.19.2.old/arch/arm/mach-at91rm9200/vlink_leds.c linux-2.6.19.2/arch/arm/mach-at91rm9200/vlink_leds.c
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--- linux-2.6.19.2.old/arch/arm/mach-at91rm9200/vlink_leds.c 2007-05-01 13:08:03.000000000 +0200
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+++ linux-2.6.19.2/arch/arm/mach-at91rm9200/vlink_leds.c 2007-05-09 12:58:42.000000000 +0200
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@@ -114,12 +114,6 @@
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at91_set_gpio_input(AT91_PIN_PB8, 1); // JIGPRESENT
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at91_set_gpio_input(AT91_PIN_PB22, 1); // PWR_IND
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- at91_set_gpio_input(AT91_PIN_PA19, 1); // P1DTR
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- at91_set_gpio_input(AT91_PIN_PA24, 1); // P2DTR
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- at91_set_gpio_output(AT91_PIN_PB29, 1); // P2DCD
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- at91_set_gpio_output(AT91_PIN_PB2, 1); // P2RI
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- at91_set_gpio_output(AT91_PIN_PB6, 1); // P1DCD
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- at91_set_gpio_output(AT91_PIN_PB7, 1); // P1RI
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at91_set_gpio_input(AT91_PIN_PB27, 1); // UDB_CNX
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at91_set_gpio_output(AT91_PIN_PB28, 1); // UDB_PUP
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