mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-03 21:24:06 +02:00
atheros: update to 3.3.4 (based on work by acoul), fix mvswitch driver for newer kernels
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@31625 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
nbd
parent
ee6dea474f
commit
f31721e174
@ -11,7 +11,7 @@ BOARD:=atheros
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BOARDNAME:=Atheros AR231x/AR5312
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FEATURES:=squashfs jffs2
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LINUX_VERSION:=2.6.37.6
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LINUX_VERSION:=3.3.4
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include $(INCLUDE_DIR)/target.mk
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@ -1,152 +0,0 @@
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CONFIG_32BIT=y
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# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
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CONFIG_AR231X_ETHERNET=y
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# CONFIG_AR7 is not set
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CONFIG_AR8216_PHY=y
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# CONFIG_ARCH_HAS_ILOG2_U32 is not set
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# CONFIG_ARCH_HAS_ILOG2_U64 is not set
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CONFIG_ARCH_HIBERNATION_POSSIBLE=y
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# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
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CONFIG_ARCH_POPULATES_NODE_MAP=y
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# CONFIG_ARCH_SUPPORTS_MSI is not set
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CONFIG_ARCH_SUPPORTS_OPROFILE=y
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CONFIG_ARCH_SUSPEND_POSSIBLE=y
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CONFIG_ATHEROS_AR2315=y
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CONFIG_ATHEROS_AR2315_PCI=y
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CONFIG_ATHEROS_AR231X=y
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CONFIG_ATHEROS_AR5312=y
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CONFIG_ATHEROS_WDT=y
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# CONFIG_BCM47XX is not set
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# CONFIG_BCM63XX is not set
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CONFIG_BITREVERSE=y
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CONFIG_CAVIUM_OCTEON_HELPER=y
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# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
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# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
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CONFIG_CC_OPTIMIZE_FOR_SIZE=y
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CONFIG_CEVT_R4K=y
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CONFIG_CEVT_R4K_LIB=y
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CONFIG_CMDLINE="console=ttyS0,9600 rootfstype=squashfs,jffs2"
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CONFIG_CMDLINE_BOOL=y
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# CONFIG_CMDLINE_OVERRIDE is not set
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CONFIG_CPU_BIG_ENDIAN=y
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CONFIG_CPU_HAS_PREFETCH=y
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CONFIG_CPU_HAS_SYNC=y
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CONFIG_CPU_MIPS32=y
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CONFIG_CPU_MIPS32_R1=y
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CONFIG_CPU_MIPSR1=y
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CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
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CONFIG_CPU_SUPPORTS_HIGHMEM=y
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CONFIG_CSRC_R4K=y
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CONFIG_CSRC_R4K_LIB=y
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CONFIG_DECOMPRESS_LZMA=y
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CONFIG_DEVPORT=y
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# CONFIG_DM9000 is not set
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CONFIG_DMA_NONCOHERENT=y
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CONFIG_EARLY_PRINTK=y
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# CONFIG_FSNOTIFY is not set
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CONFIG_GENERIC_ATOMIC64=y
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CONFIG_GENERIC_CLOCKEVENTS=y
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CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
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CONFIG_GENERIC_CMOS_UPDATE=y
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CONFIG_GENERIC_FIND_LAST_BIT=y
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CONFIG_GENERIC_FIND_NEXT_BIT=y
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CONFIG_GENERIC_GPIO=y
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CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
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CONFIG_GPIOLIB=y
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CONFIG_GPIO_DEVICE=y
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CONFIG_GPIO_SYSFS=y
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# CONFIG_HAMRADIO is not set
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# CONFIG_HARDLOCKUP_DETECTOR is not set
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CONFIG_HARDWARE_WATCHPOINTS=y
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CONFIG_HAS_DMA=y
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CONFIG_HAS_IOMEM=y
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CONFIG_HAS_IOPORT=y
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CONFIG_HAVE_ARCH_KGDB=y
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CONFIG_HAVE_DYNAMIC_FTRACE=y
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CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
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CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
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CONFIG_HAVE_FUNCTION_TRACER=y
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CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
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CONFIG_HAVE_GENERIC_DMA_COHERENT=y
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CONFIG_HAVE_IDE=y
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CONFIG_HAVE_KPROBES=y
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CONFIG_HAVE_KRETPROBES=y
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CONFIG_HAVE_OPROFILE=y
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CONFIG_HW_HAS_PCI=y
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CONFIG_HW_RANDOM=y
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CONFIG_IP17XX_PHY=y
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CONFIG_IMAGE_CMDLINE_HACK=y
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CONFIG_INITRAMFS_SOURCE=""
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CONFIG_IRQ_CPU=y
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# CONFIG_LEDS_GPIO is not set
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# CONFIG_LOONGSON_MC146818 is not set
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CONFIG_LOONGSON_UART_BASE=y
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_MACH_JZ4740 is not set
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# CONFIG_MACH_LOONGSON is not set
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# CONFIG_MACH_TX39XX is not set
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# CONFIG_MACH_TX49XX is not set
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# CONFIG_MACH_VR41XX is not set
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# CONFIG_MIKROTIK_RB532 is not set
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CONFIG_MIPS=y
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# CONFIG_MIPS_ALCHEMY is not set
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# CONFIG_MIPS_COBALT is not set
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CONFIG_MIPS_L1_CACHE_SHIFT=5
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# CONFIG_MIPS_MACHINE is not set
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# CONFIG_MIPS_MALTA is not set
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CONFIG_MIPS_MT_DISABLED=y
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# CONFIG_MIPS_SIM is not set
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CONFIG_MTD_AR2315=y
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CONFIG_MTD_CFI_ADV_OPTIONS=y
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# CONFIG_MTD_CFI_GEOMETRY is not set
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# CONFIG_MTD_CFI_INTELEXT is not set
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CONFIG_MTD_MYLOADER_PARTS=y
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CONFIG_MTD_PHYSMAP=y
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CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-3
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CONFIG_MTD_REDBOOT_PARTS=y
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CONFIG_MVSWITCH_PHY=y
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CONFIG_NEED_DMA_MAP_STATE=y
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# CONFIG_NET_PCI is not set
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# CONFIG_NO_IOPORT is not set
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# CONFIG_NXP_STB220 is not set
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# CONFIG_NXP_STB225 is not set
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CONFIG_PAGEFLAGS_EXTENDED=y
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CONFIG_PCI=y
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CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
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CONFIG_PCI_DOMAINS=y
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CONFIG_PHYLIB=y
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# CONFIG_PMC_MSP is not set
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# CONFIG_PMC_YOSEMITE is not set
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# CONFIG_PNX8550_JBS is not set
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# CONFIG_PNX8550_STB810 is not set
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# CONFIG_POWERTV is not set
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CONFIG_SCHED_OMIT_FRAME_POINTER=y
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# CONFIG_SCSI_DMA is not set
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CONFIG_SCSI_MOD=y
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# CONFIG_SERIAL_8250_EXTENDED is not set
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CONFIG_SERIAL_8250_NR_UARTS=1
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CONFIG_SERIAL_8250_RUNTIME_UARTS=1
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# CONFIG_SERIAL_MFD_HSU is not set
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# CONFIG_SGI_IP22 is not set
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# CONFIG_SGI_IP27 is not set
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# CONFIG_SGI_IP28 is not set
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# CONFIG_SGI_IP32 is not set
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# CONFIG_SIBYTE_BIGSUR is not set
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# CONFIG_SIBYTE_CARMEL is not set
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# CONFIG_SIBYTE_CRHINE is not set
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# CONFIG_SIBYTE_CRHONE is not set
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# CONFIG_SIBYTE_LITTLESUR is not set
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# CONFIG_SIBYTE_RHONE is not set
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# CONFIG_SIBYTE_SENTOSA is not set
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# CONFIG_SIBYTE_SWARM is not set
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# CONFIG_SWAP is not set
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CONFIG_SWCONFIG=y
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CONFIG_SYS_HAS_CPU_MIPS32_R1=y
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CONFIG_SYS_HAS_EARLY_PRINTK=y
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CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
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CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
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CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
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CONFIG_TRAD_SIGNALS=y
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CONFIG_USB_SUPPORT=y
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CONFIG_ZONE_DMA_FLAG=0
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@ -1,20 +1,20 @@
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CONFIG_AR231X_ETHERNET=y
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CONFIG_AR8216_PHY=y
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CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
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CONFIG_ARCH_DISCARD_MEMBLOCK=y
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# CONFIG_ARCH_DMA_ADDR_T_64BIT is not set
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# CONFIG_ARCH_HAS_ILOG2_U32 is not set
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# CONFIG_ARCH_HAS_ILOG2_U64 is not set
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CONFIG_ARCH_HIBERNATION_POSSIBLE=y
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# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
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CONFIG_ARCH_POPULATES_NODE_MAP=y
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CONFIG_ARCH_REQUIRE_GPIOLIB=y
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# CONFIG_ARCH_SUPPORTS_MSI is not set
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CONFIG_ARCH_SUPPORTS_OPROFILE=y
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CONFIG_ARCH_SUSPEND_POSSIBLE=y
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# CONFIG_ATH79 is not set
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CONFIG_ATHEROS_AR2315=y
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CONFIG_ATHEROS_AR2315_PCI=y
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CONFIG_ATHEROS_AR231X=y
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CONFIG_ATHEROS_AR5312=y
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CONFIG_ATHEROS_WDT=y
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# CONFIG_AUTO_IRQ_AFFINITY is not set
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CONFIG_BCMA_POSSIBLE=y
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CONFIG_CC_OPTIMIZE_FOR_SIZE=y
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CONFIG_CEVT_R4K=y
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CONFIG_CEVT_R4K_LIB=y
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@ -34,20 +34,18 @@ CONFIG_CSRC_R4K_LIB=y
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CONFIG_DECOMPRESS_LZMA=y
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CONFIG_DMA_NONCOHERENT=y
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CONFIG_EARLY_PRINTK=y
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CONFIG_EXPERT=y
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# CONFIG_FSNOTIFY is not set
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CONFIG_GENERIC_ATOMIC64=y
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CONFIG_GENERIC_CLOCKEVENTS=y
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CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
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CONFIG_GENERIC_CMOS_UPDATE=y
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CONFIG_GENERIC_FIND_LAST_BIT=y
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CONFIG_GENERIC_FIND_NEXT_BIT=y
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# CONFIG_GENERIC_CPU_DEVICES is not set
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CONFIG_GENERIC_GPIO=y
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# CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED is not set
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# CONFIG_GENERIC_PENDING_IRQ is not set
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CONFIG_GENERIC_IRQ_SHOW=y
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CONFIG_GENERIC_PCI_IOMAP=y
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CONFIG_GPIOLIB=y
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CONFIG_GPIO_DEVICE=y
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CONFIG_GPIO_SYSFS=y
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# CONFIG_HAMRADIO is not set
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# CONFIG_HARDIRQS_SW_RESEND is not set
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CONFIG_HARDWARE_WATCHPOINTS=y
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CONFIG_HAS_DMA=y
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CONFIG_HAS_IOMEM=y
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@ -66,22 +64,25 @@ CONFIG_HAVE_GENERIC_DMA_COHERENT=y
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CONFIG_HAVE_GENERIC_HARDIRQS=y
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CONFIG_HAVE_IDE=y
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CONFIG_HAVE_IRQ_WORK=y
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CONFIG_HAVE_MEMBLOCK=y
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CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
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CONFIG_HAVE_OPROFILE=y
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CONFIG_HAVE_PERF_EVENTS=y
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# CONFIG_HAVE_SPARSE_IRQ is not set
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CONFIG_HW_HAS_PCI=y
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CONFIG_HW_RANDOM=y
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CONFIG_IMAGE_CMDLINE_HACK=y
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CONFIG_INITRAMFS_SOURCE=""
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CONFIG_IP17XX_PHY=y
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CONFIG_IRQ_CPU=y
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# CONFIG_IRQ_PER_CPU is not set
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CONFIG_IRQ_FORCED_THREADING=y
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# CONFIG_LEDS_GPIO is not set
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CONFIG_MACH_NO_WESTBRIDGE=y
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CONFIG_MDIO_BOARDINFO=y
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# CONFIG_MINIX_FS_NATIVE_ENDIAN is not set
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CONFIG_MIPS=y
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CONFIG_MIPS_L1_CACHE_SHIFT=5
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# CONFIG_MIPS_MACHINE is not set
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CONFIG_MIPS_MT_DISABLED=y
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# CONFIG_MLX4_CORE is not set
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CONFIG_MTD_AR2315=y
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CONFIG_MTD_CFI_ADV_OPTIONS=y
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# CONFIG_MTD_CFI_GEOMETRY is not set
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@ -93,7 +94,8 @@ CONFIG_MTD_REDBOOT_PARTS=y
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CONFIG_MVSWITCH_PHY=y
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CONFIG_NEED_DMA_MAP_STATE=y
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CONFIG_NEED_PER_CPU_KM=y
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# CONFIG_NET_PCI is not set
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CONFIG_NET_VENDOR_AR231X=y
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CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
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CONFIG_PAGEFLAGS_EXTENDED=y
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CONFIG_PCI=y
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CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
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@ -112,7 +114,7 @@ CONFIG_SYS_HAS_EARLY_PRINTK=y
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CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
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CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
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CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
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# CONFIG_TEST_KSTRTOX is not set
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CONFIG_USB_ARCH_HAS_XHCI=y
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CONFIG_USB_SUPPORT=y
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CONFIG_XZ_DEC=y
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CONFIG_ZONE_DMA_FLAG=0
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File diff suppressed because it is too large
Load Diff
@ -1,68 +0,0 @@
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--- /dev/null
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+++ b/arch/mips/ar231x/early_printk.c
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@@ -0,0 +1,44 @@
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+/*
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+ * This file is subject to the terms and conditions of the GNU General Public
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+ * License. See the file "COPYING" in the main directory of this archive
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+ * for more details.
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+ *
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+ * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
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+ */
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+
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+#include <linux/mm.h>
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+#include <linux/io.h>
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+#include <linux/serial_reg.h>
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+#include <asm/addrspace.h>
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+
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+#include <asm/mach-ar231x/ar2315_regs.h>
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+#include <asm/mach-ar231x/ar5312_regs.h>
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+#include "devices.h"
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+
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+static inline void prom_uart_wr(void __iomem *base, unsigned reg,
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+ unsigned char ch)
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+{
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+ __raw_writeb(ch, base + 4 * reg);
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+}
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+
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+static inline unsigned char prom_uart_rr(void __iomem *base, unsigned reg)
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+{
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+ return __raw_readb(base + 4 * reg);
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+}
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+
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+void prom_putchar(unsigned char ch)
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+{
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+ static void __iomem *base;
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+
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+ if (unlikely(base == NULL)) {
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+ if (is_2315())
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+ base = (void __iomem *)(KSEG1ADDR(AR2315_UART0));
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+ else
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+ base = (void __iomem *)(KSEG1ADDR(AR531X_UART0));
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+ }
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+
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+ while ((prom_uart_rr(base, UART_LSR) & UART_LSR_THRE) == 0);
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+ prom_uart_wr(base, UART_TX, ch);
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+ while ((prom_uart_rr(base, UART_LSR) & UART_LSR_THRE) == 0);
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+}
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+
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--- a/arch/mips/ar231x/Makefile
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+++ b/arch/mips/ar231x/Makefile
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@@ -9,5 +9,8 @@
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#
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obj-y += board.o prom.o devices.o
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+
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+obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
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+
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obj-$(CONFIG_ATHEROS_AR5312) += ar5312.o
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obj-$(CONFIG_ATHEROS_AR2315) += ar2315.o
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--- a/arch/mips/Kconfig
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+++ b/arch/mips/Kconfig
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@@ -112,6 +112,7 @@ config ATHEROS_AR231X
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select SYS_SUPPORTS_BIG_ENDIAN
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select SYS_SUPPORTS_32BIT_KERNEL
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select GENERIC_GPIO
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+ select SYS_HAS_EARLY_PRINTK
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help
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Support for AR231x and AR531x based boards
|
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|
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@ -1,72 +0,0 @@
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--- a/drivers/mtd/redboot.c
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+++ b/drivers/mtd/redboot.c
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@@ -57,6 +57,22 @@ static inline int redboot_checksum(struc
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return 1;
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}
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+static uint32_t mtd_get_offset_erasesize(struct mtd_info *mtd, uint64_t offset)
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+{
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+ struct mtd_erase_region_info *regions = mtd->eraseregions;
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+ int i;
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+
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+ for (i = 0; i < mtd->numeraseregions; i++) {
|
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+ if (regions[i].offset +
|
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+ regions[i].numblocks * regions[i].erasesize <= offset)
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+ continue;
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+
|
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+ return regions[i].erasesize;
|
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+ }
|
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+
|
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+ return mtd->erasesize;
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+}
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+
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static int parse_redboot_partitions(struct mtd_info *master,
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struct mtd_partition **pparts,
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unsigned long fis_origin)
|
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@@ -73,6 +89,7 @@ static int parse_redboot_partitions(stru
|
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int namelen = 0;
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int nulllen = 0;
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int numslots;
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+ int first_slot;
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unsigned long offset;
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#ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED
|
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static char nullstring[] = "unallocated";
|
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@@ -186,7 +203,10 @@ static int parse_redboot_partitions(stru
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goto out;
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}
|
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|
||||
- for (i = 0; i < numslots; i++) {
|
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+ first_slot = (buf[i].flash_base & (master->erasesize - 1)) /
|
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+ sizeof(struct fis_image_desc);
|
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+
|
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+ for (i = first_slot; i < first_slot + numslots; i++) {
|
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struct fis_list *new_fl, **prev;
|
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|
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if (buf[i].name[0] == 0xff) {
|
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@@ -262,12 +282,13 @@ static int parse_redboot_partitions(stru
|
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}
|
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#endif
|
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for ( ; i<nrparts; i++) {
|
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- if(max_offset < buf[i].flash_base + buf[i].size)
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- max_offset = buf[i].flash_base + buf[i].size;
|
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parts[i].size = fl->img->size;
|
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parts[i].offset = fl->img->flash_base;
|
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parts[i].name = names;
|
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|
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+ if (max_offset < parts[i].offset + parts[i].size)
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+ max_offset = parts[i].offset + parts[i].size;
|
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+
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strcpy(names, fl->img->name);
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#ifdef CONFIG_MTD_REDBOOT_PARTS_READONLY
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if (!memcmp(names, "RedBoot", 8) ||
|
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@@ -297,7 +318,9 @@ static int parse_redboot_partitions(stru
|
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fl = fl->next;
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kfree(tmp_fl);
|
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}
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- if(master->size - max_offset >= master->erasesize)
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+
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||||
+ if (master->size - max_offset >=
|
||||
+ mtd_get_offset_erasesize(master, max_offset))
|
||||
{
|
||||
parts[nrparts].size = master->size - max_offset;
|
||||
parts[nrparts].offset = max_offset;
|
||||
@ -1,70 +0,0 @@
|
||||
--- a/drivers/net/ar231x.c
|
||||
+++ b/drivers/net/ar231x.c
|
||||
@@ -755,6 +755,7 @@ static void ar231x_load_rx_ring(struct n
|
||||
for (i = 0; i < nr_bufs; i++) {
|
||||
struct sk_buff *skb;
|
||||
ar231x_descr_t *rd;
|
||||
+ int offset = RX_OFFSET;
|
||||
|
||||
if (sp->rx_skb[idx])
|
||||
break;
|
||||
@@ -770,7 +771,9 @@ static void ar231x_load_rx_ring(struct n
|
||||
* Make sure IP header starts on a fresh cache line.
|
||||
*/
|
||||
skb->dev = dev;
|
||||
- skb_reserve(skb, RX_OFFSET);
|
||||
+ if (sp->phy_dev)
|
||||
+ offset += sp->phy_dev->pkt_align;
|
||||
+ skb_reserve(skb, offset);
|
||||
sp->rx_skb[idx] = skb;
|
||||
|
||||
rd = (ar231x_descr_t *) & sp->rx_ring[idx];
|
||||
@@ -844,20 +847,23 @@ static int ar231x_rx_int(struct net_devi
|
||||
/* alloc new buffer. */
|
||||
skb_new = netdev_alloc_skb(dev, AR2313_BUFSIZE + RX_OFFSET);
|
||||
if (skb_new != NULL) {
|
||||
+ int offset;
|
||||
|
||||
skb = sp->rx_skb[idx];
|
||||
/* set skb */
|
||||
skb_put(skb,
|
||||
((status >> DMA_RX_LEN_SHIFT) & 0x3fff) - CRC_LEN);
|
||||
-
|
||||
dev->stats.rx_bytes += skb->len;
|
||||
- skb->protocol = eth_type_trans(skb, dev);
|
||||
- /* pass the packet to upper layers */
|
||||
- netif_rx(skb);
|
||||
|
||||
+ /* pass the packet to upper layers */
|
||||
+ sp->rx(skb);
|
||||
skb_new->dev = dev;
|
||||
+
|
||||
/* 16 bit align */
|
||||
- skb_reserve(skb_new, RX_OFFSET);
|
||||
+ offset = RX_OFFSET;
|
||||
+ if (sp->phy_dev)
|
||||
+ offset += sp->phy_dev->pkt_align;
|
||||
+ skb_reserve(skb_new, offset);
|
||||
/* reset descriptor's curr_addr */
|
||||
rxdesc->addr = virt_to_phys(skb_new->data);
|
||||
|
||||
@@ -1269,6 +1275,8 @@ static int ar231x_mdiobus_probe (struct
|
||||
return PTR_ERR(phydev);
|
||||
}
|
||||
|
||||
+ sp->rx = phydev->netif_rx;
|
||||
+
|
||||
/* mask with MAC supported features */
|
||||
phydev->supported &= (SUPPORTED_10baseT_Half
|
||||
| SUPPORTED_10baseT_Full
|
||||
--- a/drivers/net/ar231x.h
|
||||
+++ b/drivers/net/ar231x.h
|
||||
@@ -221,6 +221,8 @@ typedef struct {
|
||||
*/
|
||||
struct ar231x_private {
|
||||
struct net_device *dev;
|
||||
+ int (*rx)(struct sk_buff *skb);
|
||||
+
|
||||
int version;
|
||||
u32 mb[2];
|
||||
|
||||
@ -1,175 +0,0 @@
|
||||
--- a/arch/mips/ar231x/Makefile
|
||||
+++ b/arch/mips/ar231x/Makefile
|
||||
@@ -8,7 +8,7 @@
|
||||
# Copyright (C) 2006-2009 Felix Fietkau <nbd@openwrt.org>
|
||||
#
|
||||
|
||||
-obj-y += board.o prom.o devices.o
|
||||
+obj-y += board.o prom.o devices.o reset.o
|
||||
|
||||
obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
|
||||
|
||||
--- /dev/null
|
||||
+++ b/arch/mips/ar231x/reset.c
|
||||
@@ -0,0 +1,161 @@
|
||||
+#include <linux/init.h>
|
||||
+#include <linux/module.h>
|
||||
+#include <linux/timer.h>
|
||||
+#include <linux/interrupt.h>
|
||||
+#include <linux/kobject.h>
|
||||
+#include <linux/workqueue.h>
|
||||
+#include <linux/skbuff.h>
|
||||
+#include <linux/netlink.h>
|
||||
+#include <net/sock.h>
|
||||
+#include <asm/uaccess.h>
|
||||
+#include <ar231x_platform.h>
|
||||
+#include <ar231x.h>
|
||||
+#include <gpio.h>
|
||||
+#include "devices.h"
|
||||
+
|
||||
+#define AR531X_RESET_GPIO_IRQ (AR531X_GPIO_IRQ(ar231x_board.config->resetConfigGpio))
|
||||
+
|
||||
+struct event_t {
|
||||
+ struct work_struct wq;
|
||||
+ int set;
|
||||
+ unsigned long jiffies;
|
||||
+};
|
||||
+
|
||||
+static struct timer_list rst_button_timer;
|
||||
+static unsigned long seen;
|
||||
+
|
||||
+struct sock *uevent_sock = NULL;
|
||||
+EXPORT_SYMBOL_GPL(uevent_sock);
|
||||
+extern u64 uevent_next_seqnum(void);
|
||||
+
|
||||
+static int no_release_workaround = 1;
|
||||
+module_param(no_release_workaround, int, 0);
|
||||
+
|
||||
+static inline void
|
||||
+add_msg(struct sk_buff *skb, char *msg)
|
||||
+{
|
||||
+ char *scratch;
|
||||
+ scratch = skb_put(skb, strlen(msg) + 1);
|
||||
+ sprintf(scratch, msg);
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+hotplug_button(struct work_struct *wq)
|
||||
+{
|
||||
+ struct sk_buff *skb;
|
||||
+ struct event_t *event;
|
||||
+ size_t len;
|
||||
+ char *scratch, *s;
|
||||
+ char buf[128];
|
||||
+
|
||||
+ event = container_of(wq, struct event_t, wq);
|
||||
+ if (!uevent_sock)
|
||||
+ goto done;
|
||||
+
|
||||
+ /* allocate message with the maximum possible size */
|
||||
+ s = event->set ? "pressed" : "released";
|
||||
+ len = strlen(s) + 2;
|
||||
+ skb = alloc_skb(NLMSG_GOODSIZE, GFP_KERNEL);
|
||||
+ if (!skb)
|
||||
+ goto done;
|
||||
+
|
||||
+ /* add header */
|
||||
+ scratch = skb_put(skb, len);
|
||||
+ sprintf(scratch, "%s@",s);
|
||||
+
|
||||
+ /* copy keys to our continuous event payload buffer */
|
||||
+ add_msg(skb, "HOME=/");
|
||||
+ add_msg(skb, "PATH=/sbin:/bin:/usr/sbin:/usr/bin");
|
||||
+ add_msg(skb, "SUBSYSTEM=button");
|
||||
+ add_msg(skb, "BUTTON=reset");
|
||||
+ add_msg(skb, (event->set ? "ACTION=pressed" : "ACTION=released"));
|
||||
+ sprintf(buf, "SEEN=%ld", (event->jiffies - seen)/HZ);
|
||||
+ add_msg(skb, buf);
|
||||
+ snprintf(buf, 128, "SEQNUM=%llu", uevent_next_seqnum());
|
||||
+ add_msg(skb, buf);
|
||||
+
|
||||
+ NETLINK_CB(skb).dst_group = 1;
|
||||
+ netlink_broadcast(uevent_sock, skb, 0, 1, GFP_KERNEL);
|
||||
+
|
||||
+done:
|
||||
+ kfree(event);
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+reset_button_poll(unsigned long unused)
|
||||
+{
|
||||
+ struct event_t *event;
|
||||
+ int gpio = ~0;
|
||||
+
|
||||
+ if(!no_release_workaround)
|
||||
+ return;
|
||||
+
|
||||
+ gpio = ar231x_gpiodev->get();
|
||||
+ gpio &= (1 << (AR531X_RESET_GPIO_IRQ - AR531X_GPIO_IRQ_BASE));
|
||||
+ if(gpio) {
|
||||
+ rst_button_timer.expires = jiffies + (HZ / 4);
|
||||
+ add_timer(&rst_button_timer);
|
||||
+ return;
|
||||
+ }
|
||||
+
|
||||
+ event = (struct event_t *) kzalloc(sizeof(struct event_t), GFP_ATOMIC);
|
||||
+ if (!event)
|
||||
+ return;
|
||||
+
|
||||
+ event->set = 0;
|
||||
+ event->jiffies = jiffies;
|
||||
+ INIT_WORK(&event->wq, hotplug_button);
|
||||
+ schedule_work(&event->wq);
|
||||
+}
|
||||
+
|
||||
+static irqreturn_t
|
||||
+button_handler(int irq, void *dev_id)
|
||||
+{
|
||||
+ static int pressed = 0;
|
||||
+ struct event_t *event;
|
||||
+ u32 gpio = ~0;
|
||||
+
|
||||
+ event = (struct event_t *) kzalloc(sizeof(struct event_t), GFP_ATOMIC);
|
||||
+ if (!event)
|
||||
+ return IRQ_NONE;
|
||||
+
|
||||
+ pressed = !pressed;
|
||||
+
|
||||
+ gpio = ar231x_gpiodev->get() & (1 << (irq - AR531X_GPIO_IRQ_BASE));
|
||||
+
|
||||
+ event->set = gpio;
|
||||
+ if(!event->set)
|
||||
+ no_release_workaround = 0;
|
||||
+
|
||||
+ event->jiffies = jiffies;
|
||||
+
|
||||
+ INIT_WORK(&event->wq, hotplug_button);
|
||||
+ schedule_work(&event->wq);
|
||||
+
|
||||
+ seen = jiffies;
|
||||
+ if(event->set && no_release_workaround)
|
||||
+ mod_timer(&rst_button_timer, jiffies + (HZ / 4));
|
||||
+
|
||||
+ return IRQ_HANDLED;
|
||||
+}
|
||||
+
|
||||
+
|
||||
+static int __init
|
||||
+ar231x_init_reset(void)
|
||||
+{
|
||||
+ seen = jiffies;
|
||||
+
|
||||
+ if (ar231x_board.config->resetConfigGpio == 0xffff)
|
||||
+ return -ENODEV;
|
||||
+
|
||||
+ init_timer(&rst_button_timer);
|
||||
+ rst_button_timer.function = reset_button_poll;
|
||||
+ rst_button_timer.expires = jiffies + HZ / 50;
|
||||
+ add_timer(&rst_button_timer);
|
||||
+
|
||||
+ request_irq(AR531X_RESET_GPIO_IRQ, &button_handler, IRQF_SAMPLE_RANDOM, "ar231x_reset", NULL);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+module_init(ar231x_init_reset);
|
||||
@ -1,534 +0,0 @@
|
||||
--- a/arch/mips/Kconfig
|
||||
+++ b/arch/mips/Kconfig
|
||||
@@ -111,7 +111,7 @@ config ATHEROS_AR231X
|
||||
select SYS_HAS_CPU_MIPS32_R1
|
||||
select SYS_SUPPORTS_BIG_ENDIAN
|
||||
select SYS_SUPPORTS_32BIT_KERNEL
|
||||
- select GENERIC_GPIO
|
||||
+ select ARCH_REQUIRE_GPIOLIB
|
||||
select SYS_HAS_EARLY_PRINTK
|
||||
help
|
||||
Support for AR231x and AR531x based boards
|
||||
--- a/arch/mips/ar231x/Kconfig
|
||||
+++ b/arch/mips/ar231x/Kconfig
|
||||
@@ -13,7 +13,6 @@ config ATHEROS_AR2315
|
||||
select SYS_HAS_CPU_MIPS32_R1
|
||||
select SYS_SUPPORTS_32BIT_KERNEL
|
||||
select SYS_SUPPORTS_BIG_ENDIAN
|
||||
- select GENERIC_GPIO
|
||||
default y
|
||||
|
||||
config ATHEROS_AR2315_PCI
|
||||
--- a/arch/mips/ar231x/ar2315.c
|
||||
+++ b/arch/mips/ar231x/ar2315.c
|
||||
@@ -23,12 +23,12 @@
|
||||
#include <linux/reboot.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/leds.h>
|
||||
+#include <linux/gpio.h>
|
||||
#include <asm/bootinfo.h>
|
||||
#include <asm/reboot.h>
|
||||
#include <asm/time.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/io.h>
|
||||
-#include <asm/gpio.h>
|
||||
|
||||
#include <ar231x_platform.h>
|
||||
#include <ar2315_regs.h>
|
||||
@@ -312,17 +312,6 @@ ar2315_irq_init(void)
|
||||
setup_irq(AR2315_IRQ_MISC_INTRS, &cascade);
|
||||
}
|
||||
|
||||
-const struct ar231x_gpiodev ar2315_gpiodev;
|
||||
-
|
||||
-static u32
|
||||
-ar2315_gpio_get_output(void)
|
||||
-{
|
||||
- u32 reg;
|
||||
- reg = ar231x_read_reg(AR2315_GPIO_CR);
|
||||
- reg &= ar2315_gpiodev.valid_mask;
|
||||
- return reg;
|
||||
-}
|
||||
-
|
||||
static u32
|
||||
ar2315_gpio_set_output(u32 mask, u32 val)
|
||||
{
|
||||
@@ -336,11 +325,11 @@ ar2315_gpio_set_output(u32 mask, u32 val
|
||||
}
|
||||
|
||||
static u32
|
||||
-ar2315_gpio_get(void)
|
||||
+ar2315_gpio_get(u32 valid_mask)
|
||||
{
|
||||
u32 reg;
|
||||
reg = ar231x_read_reg(AR2315_GPIO_DI);
|
||||
- reg &= ar2315_gpiodev.valid_mask;
|
||||
+ reg &= valid_mask;
|
||||
return reg;
|
||||
}
|
||||
|
||||
@@ -355,14 +344,75 @@ ar2315_gpio_set(u32 mask, u32 value)
|
||||
return reg;
|
||||
}
|
||||
|
||||
-const struct ar231x_gpiodev ar2315_gpiodev = {
|
||||
+/*
|
||||
+ * gpiolib implementation. Original legacy mask based methods
|
||||
+ * preserved for now.
|
||||
+ */
|
||||
+static int
|
||||
+ar2315_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
|
||||
+{
|
||||
+ struct ar231x_gpio_chip *gpch =
|
||||
+ container_of(chip, struct ar231x_gpio_chip, chip);
|
||||
+ u32 mask = 1 << gpio;
|
||||
+ u32 rett;
|
||||
+ if (!(gpch->valid_mask & mask))
|
||||
+ return 0;
|
||||
+ rett = ar2315_gpio_get(gpch->valid_mask); // legacy code
|
||||
+ return !!(rett & mask);
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+ar2315_gpio_set_value(struct gpio_chip *chip, unsigned gpio, int value)
|
||||
+{
|
||||
+ struct ar231x_gpio_chip *gpch =
|
||||
+ container_of(chip, struct ar231x_gpio_chip, chip);
|
||||
+ u32 mask = 1 << gpio;
|
||||
+ if (!(gpch->valid_mask & mask))
|
||||
+ return;
|
||||
+ ar2315_gpio_set(mask, (!!value) * mask); // legacy
|
||||
+}
|
||||
+
|
||||
+static int
|
||||
+ar2315_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
|
||||
+{
|
||||
+ struct ar231x_gpio_chip *gpch =
|
||||
+ container_of(chip, struct ar231x_gpio_chip, chip);
|
||||
+ u32 mask = 1 << gpio;
|
||||
+ if (!(gpch->valid_mask & mask))
|
||||
+ return -ENXIO;
|
||||
+ ar2315_gpio_set_output(mask, 0); // legacy
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int
|
||||
+ar2315_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, int value)
|
||||
+{
|
||||
+ struct ar231x_gpio_chip *gpch =
|
||||
+ container_of(chip, struct ar231x_gpio_chip, chip);
|
||||
+ u32 mask = 1 << gpio;
|
||||
+ if (!(gpch->valid_mask & mask))
|
||||
+ return -ENXIO;
|
||||
+ ar2315_gpio_set_output(mask, mask); // both legacy
|
||||
+ ar2315_gpio_set(mask, (!!value) * mask);
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static struct ar231x_gpio_chip ar2315_gpio_chip = {
|
||||
.valid_mask = (1 << 22) - 1,
|
||||
- .get_output = ar2315_gpio_get_output,
|
||||
- .set_output = ar2315_gpio_set_output,
|
||||
- .get = ar2315_gpio_get,
|
||||
- .set = ar2315_gpio_set,
|
||||
+ .chip = {
|
||||
+ .label = "ar2315-gpio",
|
||||
+ .direction_input = ar2315_gpio_direction_input,
|
||||
+ .direction_output = ar2315_gpio_direction_output,
|
||||
+ .set = ar2315_gpio_set_value,
|
||||
+ .get = ar2315_gpio_get_value,
|
||||
+ .base = 0,
|
||||
+ .ngpio = AR531X_GPIO_IRQ_COUNT, // 22
|
||||
+ }
|
||||
};
|
||||
|
||||
+// end of gpiolib
|
||||
+
|
||||
+
|
||||
static struct ar231x_eth ar2315_eth_data = {
|
||||
.reset_base = AR2315_RESET,
|
||||
.reset_mac = AR2315_RESET_ENET0,
|
||||
@@ -496,7 +546,7 @@ static struct platform_device ar2315_gpi
|
||||
};
|
||||
|
||||
static void __init
|
||||
-ar2315_init_gpio(void)
|
||||
+ar2315_init_gpio_leds(void)
|
||||
{
|
||||
static char led_names[6][6];
|
||||
int i, led = 0;
|
||||
@@ -522,7 +572,7 @@ ar2315_init_gpio(void)
|
||||
platform_device_register(&ar2315_gpio_leds);
|
||||
}
|
||||
#else
|
||||
-static inline void ar2315_init_gpio(void)
|
||||
+static inline void ar2315_init_gpio_leds(void)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
@@ -537,7 +587,7 @@ ar2315_init_devices(void)
|
||||
ar231x_find_config(ar2315_flash_limit());
|
||||
ar2315_eth_data.macaddr = ar231x_board.config->enet0_mac;
|
||||
|
||||
- ar2315_init_gpio();
|
||||
+ ar2315_init_gpio_leds();
|
||||
platform_device_register(&ar2315_wdt);
|
||||
platform_device_register(&ar2315_spiflash);
|
||||
ar231x_add_ethernet(0, KSEG1ADDR(AR2315_ENET0), AR2315_IRQ_ENET0_INTRS,
|
||||
@@ -633,6 +683,25 @@ ar2315_time_init(void)
|
||||
mips_hpt_frequency = ar2315_cpu_frequency() / 2;
|
||||
}
|
||||
|
||||
+int __init
|
||||
+ar2315_gpio_init(void)
|
||||
+{
|
||||
+ int ret;
|
||||
+ struct ar231x_gpio_chip *gpch;
|
||||
+ gpch = &ar2315_gpio_chip;
|
||||
+ ret = gpiochip_add(&gpch->chip);
|
||||
+ if (ret) {
|
||||
+ printk(KERN_ERR "%s: failed to add gpiochip\n",
|
||||
+ gpch->chip.label);
|
||||
+ return ret;
|
||||
+ }
|
||||
+ printk(KERN_INFO "%s: registered %d GPIOs\n",
|
||||
+ gpch->chip.label, gpch->chip.ngpio);
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+
|
||||
+
|
||||
void __init
|
||||
ar2315_prom_init(void)
|
||||
{
|
||||
@@ -659,7 +728,7 @@ ar2315_prom_init(void)
|
||||
ar231x_devtype = DEV_TYPE_AR2315;
|
||||
break;
|
||||
}
|
||||
- ar231x_gpiodev = &ar2315_gpiodev;
|
||||
+ ar2315_gpio_init();
|
||||
ar231x_board.devid = devid;
|
||||
}
|
||||
|
||||
--- a/arch/mips/ar231x/ar5312.c
|
||||
+++ b/arch/mips/ar231x/ar5312.c
|
||||
@@ -23,12 +23,12 @@
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/reboot.h>
|
||||
#include <linux/leds.h>
|
||||
+#include <linux/gpio.h>
|
||||
#include <asm/bootinfo.h>
|
||||
#include <asm/reboot.h>
|
||||
#include <asm/time.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/io.h>
|
||||
-#include <gpio.h>
|
||||
|
||||
#include <ar231x_platform.h>
|
||||
#include <ar5312_regs.h>
|
||||
@@ -160,17 +160,6 @@ void __init ar5312_irq_init(void)
|
||||
setup_irq(AR5312_IRQ_MISC_INTRS, &cascade);
|
||||
}
|
||||
|
||||
-const struct ar231x_gpiodev ar5312_gpiodev;
|
||||
-
|
||||
-static u32
|
||||
-ar5312_gpio_get_output(void)
|
||||
-{
|
||||
- u32 reg;
|
||||
- reg = ~(ar231x_read_reg(AR531X_GPIO_CR));
|
||||
- reg &= ar5312_gpiodev.valid_mask;
|
||||
- return reg;
|
||||
-}
|
||||
-
|
||||
static u32
|
||||
ar5312_gpio_set_output(u32 mask, u32 val)
|
||||
{
|
||||
@@ -184,11 +173,11 @@ ar5312_gpio_set_output(u32 mask, u32 val
|
||||
}
|
||||
|
||||
static u32
|
||||
-ar5312_gpio_get(void)
|
||||
+ar5312_gpio_get(u32 valid_mask)
|
||||
{
|
||||
u32 reg;
|
||||
reg = ar231x_read_reg(AR531X_GPIO_DI);
|
||||
- reg &= ar5312_gpiodev.valid_mask;
|
||||
+ reg &= valid_mask;
|
||||
return reg;
|
||||
}
|
||||
|
||||
@@ -203,14 +192,72 @@ ar5312_gpio_set(u32 mask, u32 value)
|
||||
return reg;
|
||||
}
|
||||
|
||||
-const struct ar231x_gpiodev ar5312_gpiodev = {
|
||||
- .valid_mask = (1 << 8) - 1,
|
||||
- .get_output = ar5312_gpio_get_output,
|
||||
- .set_output = ar5312_gpio_set_output,
|
||||
- .get = ar5312_gpio_get,
|
||||
- .set = ar5312_gpio_set,
|
||||
+/*
|
||||
+ * gpiolib implementations. Original mask based methods preserved
|
||||
+ */
|
||||
+static int
|
||||
+ar5312_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
|
||||
+{
|
||||
+ struct ar231x_gpio_chip *gpch =
|
||||
+ container_of(chip, struct ar231x_gpio_chip, chip);
|
||||
+ u32 mask = 1 << gpio;
|
||||
+ u32 rett;
|
||||
+ if (!(gpch->valid_mask & mask))
|
||||
+ return 0;
|
||||
+ rett = ar5312_gpio_get(gpch->valid_mask);
|
||||
+ return !!(rett & mask);
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+ar5312_gpio_set_value(struct gpio_chip *chip, unsigned gpio, int value)
|
||||
+{
|
||||
+ struct ar231x_gpio_chip *gpch =
|
||||
+ container_of(chip, struct ar231x_gpio_chip, chip);
|
||||
+ u32 mask = 1 << gpio;
|
||||
+ if (!(gpch->valid_mask & mask))
|
||||
+ return;
|
||||
+ ar5312_gpio_set(mask, (!!value) * mask);
|
||||
+}
|
||||
+
|
||||
+static int
|
||||
+ar5312_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
|
||||
+{
|
||||
+ struct ar231x_gpio_chip *gpch =
|
||||
+ container_of(chip, struct ar231x_gpio_chip, chip);
|
||||
+ u32 mask = 1 << gpio;
|
||||
+ if (!(gpch->valid_mask & mask))
|
||||
+ return -ENXIO;
|
||||
+ ar5312_gpio_set_output(mask, 0);
|
||||
+ return 0;
|
||||
+}
|
||||
+static int
|
||||
+ar5312_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, int value)
|
||||
+{
|
||||
+ struct ar231x_gpio_chip *gpch =
|
||||
+ container_of(chip, struct ar231x_gpio_chip, chip);
|
||||
+ u32 mask = 1 << gpio;
|
||||
+ if (!(gpch->valid_mask & mask))
|
||||
+ return -ENXIO;
|
||||
+ ar5312_gpio_set_output(mask, mask);
|
||||
+ ar5312_gpio_set(mask, (!!value) * mask);
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static struct ar231x_gpio_chip ar5312_gpio_chip = {
|
||||
+ .valid_mask = (1 << 22) - 1,
|
||||
+ .chip = {
|
||||
+ .label = "ar5312-gpio",
|
||||
+ .direction_input = ar5312_gpio_direction_input,
|
||||
+ .direction_output = ar5312_gpio_direction_output,
|
||||
+ .set = ar5312_gpio_set_value,
|
||||
+ .get = ar5312_gpio_get_value,
|
||||
+ .base = 0,
|
||||
+ .ngpio = AR531X_GPIO_IRQ_COUNT, // 22
|
||||
+ }
|
||||
};
|
||||
|
||||
+// end of gpiolib
|
||||
+
|
||||
static struct physmap_flash_data ar5312_flash_data = {
|
||||
.width = 2,
|
||||
};
|
||||
@@ -486,6 +533,22 @@ ar5312_time_init(void)
|
||||
mips_hpt_frequency = ar5312_cpu_frequency() / 2;
|
||||
}
|
||||
|
||||
+int __init
|
||||
+ar5312_gpio_init(void)
|
||||
+{
|
||||
+ int ret;
|
||||
+ struct ar231x_gpio_chip *gpch;
|
||||
+ gpch = &ar5312_gpio_chip;
|
||||
+ ret = gpiochip_add(&gpch->chip);
|
||||
+ if (ret) {
|
||||
+ printk(KERN_ERR "%s: failed to add gpiochip\n",
|
||||
+ gpch->chip.label);
|
||||
+ return ret;
|
||||
+ }
|
||||
+ printk(KERN_INFO "%s: registered %d GPIOs\n",
|
||||
+ gpch->chip.label, gpch->chip.ngpio);
|
||||
+ return ret;
|
||||
+}
|
||||
|
||||
void __init
|
||||
ar5312_prom_init(void)
|
||||
@@ -509,7 +572,7 @@ ar5312_prom_init(void)
|
||||
devid >>= AR531X_REV_WMAC_MIN_S;
|
||||
devid &= AR531X_REV_CHIP;
|
||||
ar231x_board.devid = (u16) devid;
|
||||
- ar231x_gpiodev = &ar5312_gpiodev;
|
||||
+ ar5312_gpio_init();
|
||||
}
|
||||
|
||||
void __init
|
||||
--- a/arch/mips/ar231x/devices.c
|
||||
+++ b/arch/mips/ar231x/devices.c
|
||||
@@ -12,8 +12,6 @@
|
||||
|
||||
struct ar231x_board_config ar231x_board;
|
||||
int ar231x_devtype = DEV_TYPE_UNKNOWN;
|
||||
-const struct ar231x_gpiodev *ar231x_gpiodev;
|
||||
-EXPORT_SYMBOL(ar231x_gpiodev);
|
||||
|
||||
static struct resource ar231x_eth0_res[] = {
|
||||
{
|
||||
--- a/arch/mips/ar231x/devices.h
|
||||
+++ b/arch/mips/ar231x/devices.h
|
||||
@@ -1,5 +1,6 @@
|
||||
#ifndef __AR231X_DEVICES_H
|
||||
#define __AR231X_DEVICES_H
|
||||
+#include <linux/gpio.h>
|
||||
|
||||
enum {
|
||||
/* handled by ar5312.c */
|
||||
@@ -34,4 +35,8 @@ static inline bool is_5312(void)
|
||||
return !is_2315();
|
||||
}
|
||||
|
||||
+struct ar231x_gpio_chip {
|
||||
+ u32 valid_mask;
|
||||
+ struct gpio_chip chip;
|
||||
+};
|
||||
#endif
|
||||
--- a/arch/mips/ar231x/reset.c
|
||||
+++ b/arch/mips/ar231x/reset.c
|
||||
@@ -6,11 +6,11 @@
|
||||
#include <linux/workqueue.h>
|
||||
#include <linux/skbuff.h>
|
||||
#include <linux/netlink.h>
|
||||
+#include <linux/gpio.h>
|
||||
#include <net/sock.h>
|
||||
#include <asm/uaccess.h>
|
||||
#include <ar231x_platform.h>
|
||||
#include <ar231x.h>
|
||||
-#include <gpio.h>
|
||||
#include "devices.h"
|
||||
|
||||
#define AR531X_RESET_GPIO_IRQ (AR531X_GPIO_IRQ(ar231x_board.config->resetConfigGpio))
|
||||
@@ -85,13 +85,12 @@ static void
|
||||
reset_button_poll(unsigned long unused)
|
||||
{
|
||||
struct event_t *event;
|
||||
- int gpio = ~0;
|
||||
+ int gpio = 0;
|
||||
|
||||
if(!no_release_workaround)
|
||||
return;
|
||||
|
||||
- gpio = ar231x_gpiodev->get();
|
||||
- gpio &= (1 << (AR531X_RESET_GPIO_IRQ - AR531X_GPIO_IRQ_BASE));
|
||||
+ gpio = gpio_get_value(AR531X_RESET_GPIO_IRQ - AR531X_GPIO_IRQ_BASE);
|
||||
if(gpio) {
|
||||
rst_button_timer.expires = jiffies + (HZ / 4);
|
||||
add_timer(&rst_button_timer);
|
||||
@@ -113,7 +112,7 @@ button_handler(int irq, void *dev_id)
|
||||
{
|
||||
static int pressed = 0;
|
||||
struct event_t *event;
|
||||
- u32 gpio = ~0;
|
||||
+ u32 gpio = 0;
|
||||
|
||||
event = (struct event_t *) kzalloc(sizeof(struct event_t), GFP_ATOMIC);
|
||||
if (!event)
|
||||
@@ -121,7 +120,7 @@ button_handler(int irq, void *dev_id)
|
||||
|
||||
pressed = !pressed;
|
||||
|
||||
- gpio = ar231x_gpiodev->get() & (1 << (irq - AR531X_GPIO_IRQ_BASE));
|
||||
+ gpio = gpio_get_value(irq - AR531X_GPIO_IRQ_BASE);
|
||||
|
||||
event->set = gpio;
|
||||
if(!event->set)
|
||||
--- a/arch/mips/include/asm/mach-ar231x/gpio.h
|
||||
+++ b/arch/mips/include/asm/mach-ar231x/gpio.h
|
||||
@@ -3,66 +3,15 @@
|
||||
|
||||
#include <ar231x.h>
|
||||
|
||||
-struct ar231x_gpiodev {
|
||||
- u32 valid_mask;
|
||||
- u32 (*get_output)(void);
|
||||
- u32 (*set_output)(u32 mask, u32 val);
|
||||
- u32 (*get)(void);
|
||||
- u32 (*set)(u32 mask, u32 val);
|
||||
-};
|
||||
-
|
||||
-extern const struct ar231x_gpiodev *ar231x_gpiodev;
|
||||
+#define gpio_get_value __gpio_get_value
|
||||
+#define gpio_set_value __gpio_set_value
|
||||
+#define gpio_cansleep __gpio_cansleep
|
||||
|
||||
/*
|
||||
* Wrappers for the generic GPIO layer
|
||||
*/
|
||||
|
||||
-static inline int gpio_direction_input(unsigned gpio) {
|
||||
- u32 mask = 1 << gpio;
|
||||
-
|
||||
- if (!(ar231x_gpiodev->valid_mask & mask))
|
||||
- return -ENXIO;
|
||||
-
|
||||
- ar231x_gpiodev->set_output(mask, 0);
|
||||
- return 0;
|
||||
-}
|
||||
-
|
||||
-static inline void gpio_set_value(unsigned gpio, int value) {
|
||||
- u32 mask = 1 << gpio;
|
||||
-
|
||||
- if (!(ar231x_gpiodev->valid_mask & mask))
|
||||
- return;
|
||||
-
|
||||
- ar231x_gpiodev->set(mask, (!!value) * mask);
|
||||
-}
|
||||
-
|
||||
-static inline int gpio_direction_output(unsigned gpio, int value) {
|
||||
- u32 mask = 1 << gpio;
|
||||
-
|
||||
- if (!(ar231x_gpiodev->valid_mask & mask))
|
||||
- return -ENXIO;
|
||||
-
|
||||
- ar231x_gpiodev->set_output(mask, mask);
|
||||
- ar231x_gpiodev->set(mask, (!!value) * mask);
|
||||
- return 0;
|
||||
-}
|
||||
-
|
||||
-/* Reads the gpio pin. Unchecked function */
|
||||
-static inline int gpio_get_value(unsigned gpio) {
|
||||
- u32 mask = 1 << gpio;
|
||||
-
|
||||
- if (!(ar231x_gpiodev->valid_mask & mask))
|
||||
- return 0;
|
||||
-
|
||||
- return !!(ar231x_gpiodev->get() & mask);
|
||||
-}
|
||||
-
|
||||
-static inline int gpio_request(unsigned gpio, const char *label) {
|
||||
- return 0;
|
||||
-}
|
||||
-
|
||||
-static inline void gpio_free(unsigned gpio) {
|
||||
-}
|
||||
+/* not sure if these are used? */
|
||||
|
||||
/* Returns IRQ to attach for gpio. Unchecked function */
|
||||
static inline int gpio_to_irq(unsigned gpio) {
|
||||
@@ -74,11 +23,6 @@ static inline int irq_to_gpio(unsigned i
|
||||
return (irq - (AR531X_GPIO_IRQ(0)));
|
||||
}
|
||||
|
||||
-static inline int gpio_set_debounce(unsigned gpio, unsigned debounce)
|
||||
-{
|
||||
- return -ENOSYS;
|
||||
-}
|
||||
-
|
||||
#include <asm-generic/gpio.h> /* cansleep wrappers */
|
||||
|
||||
#endif
|
||||
@ -1,39 +0,0 @@
|
||||
Fix the usage of get_c0_compare_int: override cp0_compare_irq if the returned
|
||||
value is in the MIPS CPU IRQ range to ensure that c0_compare_int_usable()
|
||||
still works.
|
||||
|
||||
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
|
||||
|
||||
--- a/arch/mips/kernel/cevt-r4k.c
|
||||
+++ b/arch/mips/kernel/cevt-r4k.c
|
||||
@@ -168,20 +168,23 @@ int __cpuinit r4k_clockevent_init(void)
|
||||
struct clock_event_device *cd;
|
||||
unsigned int irq;
|
||||
|
||||
- if (!cpu_has_counter || !mips_hpt_frequency)
|
||||
- return -ENXIO;
|
||||
-
|
||||
- if (!c0_compare_int_usable())
|
||||
- return -ENXIO;
|
||||
-
|
||||
/*
|
||||
* With vectored interrupts things are getting platform specific.
|
||||
* get_c0_compare_int is a hook to allow a platform to return the
|
||||
* interrupt number of it's liking.
|
||||
*/
|
||||
irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;
|
||||
- if (get_c0_compare_int)
|
||||
+ if (get_c0_compare_int) {
|
||||
irq = get_c0_compare_int();
|
||||
+ if ((irq >= MIPS_CPU_IRQ_BASE) && (irq < MIPS_CPU_IRQ_BASE + 8))
|
||||
+ cp0_compare_irq = irq - MIPS_CPU_IRQ_BASE;
|
||||
+ }
|
||||
+
|
||||
+ if (!cpu_has_counter || !mips_hpt_frequency)
|
||||
+ return -ENXIO;
|
||||
+
|
||||
+ if (!c0_compare_int_usable())
|
||||
+ return -ENXIO;
|
||||
|
||||
cd = &per_cpu(mips_clockevent_device, cpu);
|
||||
|
||||
@ -1,297 +0,0 @@
|
||||
--- a/arch/mips/ar231x/Makefile
|
||||
+++ b/arch/mips/ar231x/Makefile
|
||||
@@ -14,3 +14,4 @@ obj-$(CONFIG_EARLY_PRINTK) += early_prin
|
||||
|
||||
obj-$(CONFIG_ATHEROS_AR5312) += ar5312.o
|
||||
obj-$(CONFIG_ATHEROS_AR2315) += ar2315.o
|
||||
+obj-$(CONFIG_ATHEROS_AR2315_PCI) += pci.o
|
||||
--- /dev/null
|
||||
+++ b/arch/mips/ar231x/pci.c
|
||||
@@ -0,0 +1,230 @@
|
||||
+/*
|
||||
+ * This program is free software; you can redistribute it and/or
|
||||
+ * modify it under the terms of the GNU General Public License
|
||||
+ * as published by the Free Software Foundation; either version 2
|
||||
+ * of the License, or (at your option) any later version.
|
||||
+ *
|
||||
+ * This program is distributed in the hope that it will be useful,
|
||||
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
+ * GNU General Public License for more details.
|
||||
+ *
|
||||
+ * You should have received a copy of the GNU General Public License
|
||||
+ * along with this program; if not, write to the Free Software
|
||||
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
+ */
|
||||
+
|
||||
+#include <linux/types.h>
|
||||
+#include <linux/pci.h>
|
||||
+#include <linux/kernel.h>
|
||||
+#include <linux/init.h>
|
||||
+#include <linux/mm.h>
|
||||
+#include <linux/spinlock.h>
|
||||
+#include <linux/delay.h>
|
||||
+#include <linux/irq.h>
|
||||
+#include <asm/bootinfo.h>
|
||||
+#include <asm/paccess.h>
|
||||
+#include <asm/irq_cpu.h>
|
||||
+#include <asm/io.h>
|
||||
+#include <ar231x_platform.h>
|
||||
+#include <ar231x.h>
|
||||
+#include <ar2315_regs.h>
|
||||
+#include "devices.h"
|
||||
+
|
||||
+#define AR531X_MEM_BASE 0x80800000UL
|
||||
+#define AR531X_MEM_SIZE 0x00ffffffUL
|
||||
+#define AR531X_IO_SIZE 0x00007fffUL
|
||||
+
|
||||
+static unsigned long configspace;
|
||||
+
|
||||
+static int config_access(int devfn, int where, int size, u32 *ptr, bool write)
|
||||
+{
|
||||
+ unsigned long flags;
|
||||
+ int func = PCI_FUNC(devfn);
|
||||
+ int dev = PCI_SLOT(devfn);
|
||||
+ u32 value = 0;
|
||||
+ int err = 0;
|
||||
+ u32 addr;
|
||||
+
|
||||
+ if (((dev != 0) && (dev != 3)) || (func > 2))
|
||||
+ return PCIBIOS_DEVICE_NOT_FOUND;
|
||||
+
|
||||
+ /* Select Configuration access */
|
||||
+ local_irq_save(flags);
|
||||
+ ar231x_mask_reg(AR2315_PCI_MISC_CONFIG, 0, AR2315_PCIMISC_CFG_SEL);
|
||||
+ mb();
|
||||
+
|
||||
+ addr = (u32) configspace + (1 << (13 + dev)) + (func << 8) + where;
|
||||
+ if (size == 1)
|
||||
+ addr ^= 0x3;
|
||||
+ else if (size == 2)
|
||||
+ addr ^= 0x2;
|
||||
+
|
||||
+ if (write) {
|
||||
+ value = *ptr;
|
||||
+ if (size == 1)
|
||||
+ err = put_dbe(value, (u8 *) addr);
|
||||
+ else if (size == 2)
|
||||
+ err = put_dbe(value, (u16 *) addr);
|
||||
+ else if (size == 4)
|
||||
+ err = put_dbe(value, (u32 *) addr);
|
||||
+ } else {
|
||||
+ if (size == 1)
|
||||
+ err = get_dbe(value, (u8 *) addr);
|
||||
+ else if (size == 2)
|
||||
+ err = get_dbe(value, (u16 *) addr);
|
||||
+ else if (size == 4)
|
||||
+ err = get_dbe(value, (u32 *) addr);
|
||||
+ if (err)
|
||||
+ *ptr = 0xffffffff;
|
||||
+ else
|
||||
+ *ptr = value;
|
||||
+ }
|
||||
+
|
||||
+ /* Select Memory access */
|
||||
+ ar231x_mask_reg(AR2315_PCI_MISC_CONFIG, AR2315_PCIMISC_CFG_SEL, 0);
|
||||
+ local_irq_restore(flags);
|
||||
+
|
||||
+ return (err ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL);
|
||||
+}
|
||||
+
|
||||
+static int ar231x_pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 * value)
|
||||
+{
|
||||
+ return config_access(devfn, where, size, value, 0);
|
||||
+}
|
||||
+
|
||||
+static int ar231x_pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
|
||||
+{
|
||||
+ return config_access(devfn, where, size, &value, 1);
|
||||
+}
|
||||
+
|
||||
+struct pci_ops ar231x_pci_ops = {
|
||||
+ .read = ar231x_pci_read,
|
||||
+ .write = ar231x_pci_write,
|
||||
+};
|
||||
+
|
||||
+static struct resource ar231x_mem_resource = {
|
||||
+ .name = "AR531x PCI MEM",
|
||||
+ .start = AR531X_MEM_BASE,
|
||||
+ .end = AR531X_MEM_BASE + AR531X_MEM_SIZE - AR531X_IO_SIZE - 1 + 0x4000000,
|
||||
+ .flags = IORESOURCE_MEM,
|
||||
+};
|
||||
+
|
||||
+static struct resource ar231x_io_resource = {
|
||||
+ .name = "AR531x PCI I/O",
|
||||
+ .start = AR531X_MEM_BASE + AR531X_MEM_SIZE - AR531X_IO_SIZE,
|
||||
+ .end = AR531X_MEM_BASE + AR531X_MEM_SIZE - 1,
|
||||
+ .flags = IORESOURCE_IO,
|
||||
+};
|
||||
+
|
||||
+struct pci_controller ar231x_pci_controller = {
|
||||
+ .pci_ops = &ar231x_pci_ops,
|
||||
+ .mem_resource = &ar231x_mem_resource,
|
||||
+ .io_resource = &ar231x_io_resource,
|
||||
+ .mem_offset = 0x00000000UL,
|
||||
+ .io_offset = 0x00000000UL,
|
||||
+};
|
||||
+
|
||||
+int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
||||
+{
|
||||
+ return AR2315_IRQ_LCBUS_PCI;
|
||||
+}
|
||||
+
|
||||
+int pcibios_plat_dev_init(struct pci_dev *dev)
|
||||
+{
|
||||
+ pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 5);
|
||||
+ pci_write_config_word(dev, 0x40, 0);
|
||||
+
|
||||
+ /* Clear any pending Abort or external Interrupts
|
||||
+ * and enable interrupt processing */
|
||||
+ ar231x_mask_reg(AR2315_PCI_INTEN_REG, AR2315_PCI_INT_ENABLE, 0);
|
||||
+ ar231x_write_reg(AR2315_PCI_INT_STATUS, (AR2315_PCI_ABORT_INT | AR2315_PCI_EXT_INT));
|
||||
+ ar231x_write_reg(AR2315_PCI_INT_MASK, (AR2315_PCI_ABORT_INT | AR2315_PCI_EXT_INT));
|
||||
+ ar231x_mask_reg(AR2315_PCI_INTEN_REG, 0, AR2315_PCI_INT_ENABLE);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+ar2315_pci_fixup(struct pci_dev *dev)
|
||||
+{
|
||||
+ unsigned int devfn = dev->devfn;
|
||||
+
|
||||
+ if (dev->bus->number != 0)
|
||||
+ return;
|
||||
+
|
||||
+ /* Only fix up the PCI host settings */
|
||||
+ if ((PCI_SLOT(devfn) != 3) || (PCI_FUNC(devfn) != 0))
|
||||
+ return;
|
||||
+
|
||||
+ /* Fix up MBARs */
|
||||
+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, HOST_PCI_MBAR0);
|
||||
+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, HOST_PCI_MBAR1);
|
||||
+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_2, HOST_PCI_MBAR2);
|
||||
+ pci_write_config_dword(dev, PCI_COMMAND,
|
||||
+ PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_SPECIAL |
|
||||
+ PCI_COMMAND_INVALIDATE | PCI_COMMAND_PARITY | PCI_COMMAND_SERR |
|
||||
+ PCI_COMMAND_FAST_BACK);
|
||||
+}
|
||||
+DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, ar2315_pci_fixup);
|
||||
+
|
||||
+static int __init
|
||||
+ar2315_pci_init(void)
|
||||
+{
|
||||
+ u32 reg;
|
||||
+
|
||||
+ if (ar231x_devtype != DEV_TYPE_AR2315)
|
||||
+ return -ENODEV;
|
||||
+
|
||||
+ configspace = (unsigned long) ioremap_nocache(AR2315_PCIEXT, 1*1024*1024); /* Remap PCI config space */
|
||||
+ ar231x_pci_controller.io_map_base =
|
||||
+ (unsigned long) ioremap_nocache(AR531X_MEM_BASE + AR531X_MEM_SIZE, AR531X_IO_SIZE);
|
||||
+ set_io_port_base(ar231x_pci_controller.io_map_base); /* PCI I/O space */
|
||||
+
|
||||
+ reg = ar231x_mask_reg(AR2315_RESET, 0, AR2315_RESET_PCIDMA);
|
||||
+ msleep(10);
|
||||
+
|
||||
+ reg &= ~AR2315_RESET_PCIDMA;
|
||||
+ ar231x_write_reg(AR2315_RESET, reg);
|
||||
+ msleep(10);
|
||||
+
|
||||
+ ar231x_mask_reg(AR2315_ENDIAN_CTL, 0,
|
||||
+ AR2315_CONFIG_PCIAHB | AR2315_CONFIG_PCIAHB_BRIDGE);
|
||||
+
|
||||
+ ar231x_write_reg(AR2315_PCICLK, AR2315_PCICLK_PLLC_CLKM |
|
||||
+ (AR2315_PCICLK_IN_FREQ_DIV_6 << AR2315_PCICLK_DIV_S));
|
||||
+ ar231x_mask_reg(AR2315_AHB_ARB_CTL, 0, AR2315_ARB_PCI);
|
||||
+ ar231x_mask_reg(AR2315_IF_CTL, AR2315_IF_PCI_CLK_MASK | AR2315_IF_MASK,
|
||||
+ AR2315_IF_PCI | AR2315_IF_PCI_HOST | AR2315_IF_PCI_INTR |
|
||||
+ (AR2315_IF_PCI_CLK_OUTPUT_CLK << AR2315_IF_PCI_CLK_SHIFT));
|
||||
+
|
||||
+ /* Reset the PCI bus by setting bits 5-4 in PCI_MCFG */
|
||||
+ ar231x_mask_reg(AR2315_PCI_MISC_CONFIG, AR2315_PCIMISC_RST_MODE,
|
||||
+ AR2315_PCIRST_LOW);
|
||||
+ msleep(100);
|
||||
+
|
||||
+ /* Bring the PCI out of reset */
|
||||
+ ar231x_mask_reg(AR2315_PCI_MISC_CONFIG, AR2315_PCIMISC_RST_MODE,
|
||||
+ AR2315_PCIRST_HIGH | AR2315_PCICACHE_DIS | 0x8);
|
||||
+
|
||||
+ ar231x_write_reg(AR2315_PCI_UNCACHE_CFG,
|
||||
+ 0x1E | /* 1GB uncached */
|
||||
+ (1 << 5) | /* Enable uncached */
|
||||
+ (0x2 << 30) /* Base: 0x80000000 */
|
||||
+ );
|
||||
+ ar231x_read_reg(AR2315_PCI_UNCACHE_CFG);
|
||||
+
|
||||
+ msleep(500);
|
||||
+
|
||||
+ /* dirty hack - anyone with a datasheet that knows the memory map ? */
|
||||
+ ioport_resource.start = 0x10000000;
|
||||
+ ioport_resource.end = 0xffffffff;
|
||||
+ iomem_resource.start = 0x10000000;
|
||||
+ iomem_resource.end = 0xffffffff;
|
||||
+
|
||||
+ register_pci_controller(&ar231x_pci_controller);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+arch_initcall(ar2315_pci_init);
|
||||
--- a/arch/mips/ar231x/Kconfig
|
||||
+++ b/arch/mips/ar231x/Kconfig
|
||||
@@ -15,3 +15,13 @@ config ATHEROS_AR2315
|
||||
select SYS_SUPPORTS_BIG_ENDIAN
|
||||
select GENERIC_GPIO
|
||||
default y
|
||||
+
|
||||
+config ATHEROS_AR2315_PCI
|
||||
+ bool "PCI support"
|
||||
+ depends on ATHEROS_AR2315
|
||||
+ select HW_HAS_PCI
|
||||
+ select PCI
|
||||
+ select USB_ARCH_HAS_HCD
|
||||
+ select USB_ARCH_HAS_OHCI
|
||||
+ select USB_ARCH_HAS_EHCI
|
||||
+ default y
|
||||
--- a/arch/mips/ar231x/ar2315.c
|
||||
+++ b/arch/mips/ar231x/ar2315.c
|
||||
@@ -63,6 +63,27 @@ static inline void ar2315_gpio_irq(void)
|
||||
do_IRQ(AR531X_GPIO_IRQ_BASE + bit);
|
||||
}
|
||||
|
||||
+#ifdef CONFIG_ATHEROS_AR2315_PCI
|
||||
+static inline void pci_abort_irq(void)
|
||||
+{
|
||||
+ ar231x_write_reg(AR2315_PCI_INT_STATUS, AR2315_PCI_ABORT_INT);
|
||||
+}
|
||||
+
|
||||
+static inline void pci_ack_irq(void)
|
||||
+{
|
||||
+ ar231x_write_reg(AR2315_PCI_INT_STATUS, AR2315_PCI_EXT_INT);
|
||||
+}
|
||||
+
|
||||
+void ar2315_pci_irq(int irq)
|
||||
+{
|
||||
+ if (ar231x_read_reg(AR2315_PCI_INT_STATUS) == AR2315_PCI_ABORT_INT)
|
||||
+ pci_abort_irq();
|
||||
+ else {
|
||||
+ do_IRQ(irq);
|
||||
+ pci_ack_irq();
|
||||
+ }
|
||||
+}
|
||||
+#endif /* CONFIG_ATHEROS_AR2315_PCI */
|
||||
|
||||
/*
|
||||
* Called when an interrupt is received, this function
|
||||
@@ -81,6 +102,10 @@ ar2315_irq_dispatch(void)
|
||||
do_IRQ(AR2315_IRQ_WLAN0_INTRS);
|
||||
else if (pending & CAUSEF_IP4)
|
||||
do_IRQ(AR2315_IRQ_ENET0_INTRS);
|
||||
+#ifdef CONFIG_ATHEROS_AR2315_PCI
|
||||
+ else if (pending & CAUSEF_IP5)
|
||||
+ ar2315_pci_irq(AR2315_IRQ_LCBUS_PCI);
|
||||
+#endif
|
||||
else if (pending & CAUSEF_IP2) {
|
||||
unsigned int misc_intr = ar231x_read_reg(AR2315_ISR) & ar231x_read_reg(AR2315_IMR);
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,659 +0,0 @@
|
||||
--- a/drivers/mtd/devices/Kconfig
|
||||
+++ b/drivers/mtd/devices/Kconfig
|
||||
@@ -112,6 +112,10 @@ config MTD_SST25L
|
||||
Set up your spi devices with the right board-specific platform data,
|
||||
if you want to specify device partitioning.
|
||||
|
||||
+config MTD_AR2315
|
||||
+ tristate "Atheros AR2315+ SPI Flash support"
|
||||
+ depends on ATHEROS_AR2315
|
||||
+
|
||||
config MTD_SLRAM
|
||||
tristate "Uncached system RAM"
|
||||
help
|
||||
--- a/drivers/mtd/devices/Makefile
|
||||
+++ b/drivers/mtd/devices/Makefile
|
||||
@@ -17,3 +17,4 @@ obj-$(CONFIG_MTD_BLOCK2MTD) += block2mtd
|
||||
obj-$(CONFIG_MTD_DATAFLASH) += mtd_dataflash.o
|
||||
obj-$(CONFIG_MTD_M25P80) += m25p80.o
|
||||
obj-$(CONFIG_MTD_SST25L) += sst25l.o
|
||||
+obj-$(CONFIG_MTD_AR2315) += ar2315.o
|
||||
--- /dev/null
|
||||
+++ b/drivers/mtd/devices/ar2315.c
|
||||
@@ -0,0 +1,517 @@
|
||||
+
|
||||
+/*
|
||||
+ * MTD driver for the SPI Flash Memory support on Atheros AR2315
|
||||
+ *
|
||||
+ * Copyright (c) 2005-2006 Atheros Communications Inc.
|
||||
+ * Copyright (C) 2006-2007 FON Technology, SL.
|
||||
+ * Copyright (C) 2006-2007 Imre Kaloz <kaloz@openwrt.org>
|
||||
+ * Copyright (C) 2006-2009 Felix Fietkau <nbd@openwrt.org>
|
||||
+ *
|
||||
+ * This code is free software; you can redistribute it and/or modify
|
||||
+ * it under the terms of the GNU General Public License version 2 as
|
||||
+ * published by the Free Software Foundation.
|
||||
+ *
|
||||
+ */
|
||||
+
|
||||
+#include <linux/kernel.h>
|
||||
+#include <linux/module.h>
|
||||
+#include <linux/types.h>
|
||||
+#include <linux/version.h>
|
||||
+#include <linux/errno.h>
|
||||
+#include <linux/slab.h>
|
||||
+#include <linux/mtd/mtd.h>
|
||||
+#include <linux/mtd/partitions.h>
|
||||
+#include <linux/platform_device.h>
|
||||
+#include <linux/sched.h>
|
||||
+#include <linux/root_dev.h>
|
||||
+#include <linux/delay.h>
|
||||
+#include <asm/delay.h>
|
||||
+#include <asm/io.h>
|
||||
+
|
||||
+#include <ar2315_spiflash.h>
|
||||
+#include <ar231x_platform.h>
|
||||
+#include <ar231x.h>
|
||||
+
|
||||
+
|
||||
+#define SPIFLASH "spiflash: "
|
||||
+#define busy_wait(_priv, _condition, _wait) do { \
|
||||
+ while (_condition) { \
|
||||
+ spin_unlock_bh(&_priv->lock); \
|
||||
+ if (_wait > 1) \
|
||||
+ msleep(_wait); \
|
||||
+ else if ((_wait == 1) && need_resched()) \
|
||||
+ schedule(); \
|
||||
+ else \
|
||||
+ udelay(1); \
|
||||
+ spin_lock_bh(&_priv->lock); \
|
||||
+ } \
|
||||
+} while (0)
|
||||
+
|
||||
+enum {
|
||||
+ FLASH_NONE,
|
||||
+ FLASH_1MB,
|
||||
+ FLASH_2MB,
|
||||
+ FLASH_4MB,
|
||||
+ FLASH_8MB,
|
||||
+ FLASH_16MB,
|
||||
+};
|
||||
+
|
||||
+/* Flash configuration table */
|
||||
+struct flashconfig {
|
||||
+ u32 byte_cnt;
|
||||
+ u32 sector_cnt;
|
||||
+ u32 sector_size;
|
||||
+};
|
||||
+
|
||||
+const struct flashconfig flashconfig_tbl[] = {
|
||||
+ [FLASH_NONE] = { 0, 0, 0},
|
||||
+ [FLASH_1MB] = { STM_1MB_BYTE_COUNT, STM_1MB_SECTOR_COUNT, STM_1MB_SECTOR_SIZE},
|
||||
+ [FLASH_2MB] = { STM_2MB_BYTE_COUNT, STM_2MB_SECTOR_COUNT, STM_2MB_SECTOR_SIZE},
|
||||
+ [FLASH_4MB] = { STM_4MB_BYTE_COUNT, STM_4MB_SECTOR_COUNT, STM_4MB_SECTOR_SIZE},
|
||||
+ [FLASH_8MB] = { STM_8MB_BYTE_COUNT, STM_8MB_SECTOR_COUNT, STM_8MB_SECTOR_SIZE},
|
||||
+ [FLASH_16MB] = { STM_16MB_BYTE_COUNT, STM_16MB_SECTOR_COUNT, STM_16MB_SECTOR_SIZE}
|
||||
+};
|
||||
+
|
||||
+/* Mapping of generic opcodes to STM serial flash opcodes */
|
||||
+enum {
|
||||
+ SPI_WRITE_ENABLE,
|
||||
+ SPI_WRITE_DISABLE,
|
||||
+ SPI_RD_STATUS,
|
||||
+ SPI_WR_STATUS,
|
||||
+ SPI_RD_DATA,
|
||||
+ SPI_FAST_RD_DATA,
|
||||
+ SPI_PAGE_PROGRAM,
|
||||
+ SPI_SECTOR_ERASE,
|
||||
+ SPI_BULK_ERASE,
|
||||
+ SPI_DEEP_PWRDOWN,
|
||||
+ SPI_RD_SIG,
|
||||
+};
|
||||
+
|
||||
+struct opcodes {
|
||||
+ __u16 code;
|
||||
+ __s8 tx_cnt;
|
||||
+ __s8 rx_cnt;
|
||||
+};
|
||||
+const struct opcodes stm_opcodes[] = {
|
||||
+ [SPI_WRITE_ENABLE] = {STM_OP_WR_ENABLE, 1, 0},
|
||||
+ [SPI_WRITE_DISABLE] = {STM_OP_WR_DISABLE, 1, 0},
|
||||
+ [SPI_RD_STATUS] = {STM_OP_RD_STATUS, 1, 1},
|
||||
+ [SPI_WR_STATUS] = {STM_OP_WR_STATUS, 1, 0},
|
||||
+ [SPI_RD_DATA] = {STM_OP_RD_DATA, 4, 4},
|
||||
+ [SPI_FAST_RD_DATA] = {STM_OP_FAST_RD_DATA, 5, 0},
|
||||
+ [SPI_PAGE_PROGRAM] = {STM_OP_PAGE_PGRM, 8, 0},
|
||||
+ [SPI_SECTOR_ERASE] = {STM_OP_SECTOR_ERASE, 4, 0},
|
||||
+ [SPI_BULK_ERASE] = {STM_OP_BULK_ERASE, 1, 0},
|
||||
+ [SPI_DEEP_PWRDOWN] = {STM_OP_DEEP_PWRDOWN, 1, 0},
|
||||
+ [SPI_RD_SIG] = {STM_OP_RD_SIG, 4, 1},
|
||||
+};
|
||||
+
|
||||
+/* Driver private data structure */
|
||||
+struct spiflash_priv {
|
||||
+ struct mtd_info mtd;
|
||||
+ void *readaddr; /* memory mapped data for read */
|
||||
+ void *mmraddr; /* memory mapped register space */
|
||||
+ wait_queue_head_t wq;
|
||||
+ spinlock_t lock;
|
||||
+ int state;
|
||||
+};
|
||||
+
|
||||
+#define to_spiflash(_mtd) container_of(_mtd, struct spiflash_priv, mtd)
|
||||
+
|
||||
+enum {
|
||||
+ FL_READY,
|
||||
+ FL_READING,
|
||||
+ FL_ERASING,
|
||||
+ FL_WRITING
|
||||
+};
|
||||
+
|
||||
+/***************************************************************************************************/
|
||||
+
|
||||
+static u32
|
||||
+spiflash_read_reg(struct spiflash_priv *priv, int reg)
|
||||
+{
|
||||
+ return ar231x_read_reg((u32) priv->mmraddr + reg);
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+spiflash_write_reg(struct spiflash_priv *priv, int reg, u32 data)
|
||||
+{
|
||||
+ ar231x_write_reg((u32) priv->mmraddr + reg, data);
|
||||
+}
|
||||
+
|
||||
+static u32
|
||||
+spiflash_wait_busy(struct spiflash_priv *priv)
|
||||
+{
|
||||
+ u32 reg;
|
||||
+
|
||||
+ busy_wait(priv, (reg = spiflash_read_reg(priv, SPI_FLASH_CTL)) &
|
||||
+ SPI_CTL_BUSY, 0);
|
||||
+ return reg;
|
||||
+}
|
||||
+
|
||||
+static u32
|
||||
+spiflash_sendcmd (struct spiflash_priv *priv, int opcode, u32 addr)
|
||||
+{
|
||||
+ const struct opcodes *op;
|
||||
+ u32 reg, mask;
|
||||
+
|
||||
+ op = &stm_opcodes[opcode];
|
||||
+ reg = spiflash_wait_busy(priv);
|
||||
+ spiflash_write_reg(priv, SPI_FLASH_OPCODE,
|
||||
+ ((u32) op->code) | (addr << 8));
|
||||
+
|
||||
+ reg &= ~SPI_CTL_TX_RX_CNT_MASK;
|
||||
+ reg |= SPI_CTL_START | op->tx_cnt | (op->rx_cnt << 4);
|
||||
+
|
||||
+ spiflash_write_reg(priv, SPI_FLASH_CTL, reg);
|
||||
+ spiflash_wait_busy(priv);
|
||||
+
|
||||
+ if (!op->rx_cnt)
|
||||
+ return 0;
|
||||
+
|
||||
+ reg = spiflash_read_reg(priv, SPI_FLASH_DATA);
|
||||
+
|
||||
+ switch (op->rx_cnt) {
|
||||
+ case 1:
|
||||
+ mask = 0x000000ff;
|
||||
+ break;
|
||||
+ case 2:
|
||||
+ mask = 0x0000ffff;
|
||||
+ break;
|
||||
+ case 3:
|
||||
+ mask = 0x00ffffff;
|
||||
+ break;
|
||||
+ default:
|
||||
+ mask = 0xffffffff;
|
||||
+ break;
|
||||
+ }
|
||||
+ reg &= mask;
|
||||
+
|
||||
+ return reg;
|
||||
+}
|
||||
+
|
||||
+
|
||||
+/*
|
||||
+ * Probe SPI flash device
|
||||
+ * Function returns 0 for failure.
|
||||
+ * and flashconfig_tbl array index for success.
|
||||
+ */
|
||||
+static int
|
||||
+spiflash_probe_chip (struct spiflash_priv *priv)
|
||||
+{
|
||||
+ u32 sig;
|
||||
+ int flash_size;
|
||||
+
|
||||
+ /* Read the signature on the flash device */
|
||||
+ spin_lock_bh(&priv->lock);
|
||||
+ sig = spiflash_sendcmd(priv, SPI_RD_SIG, 0);
|
||||
+ spin_unlock_bh(&priv->lock);
|
||||
+
|
||||
+ switch (sig) {
|
||||
+ case STM_8MBIT_SIGNATURE:
|
||||
+ flash_size = FLASH_1MB;
|
||||
+ break;
|
||||
+ case STM_16MBIT_SIGNATURE:
|
||||
+ flash_size = FLASH_2MB;
|
||||
+ break;
|
||||
+ case STM_32MBIT_SIGNATURE:
|
||||
+ flash_size = FLASH_4MB;
|
||||
+ break;
|
||||
+ case STM_64MBIT_SIGNATURE:
|
||||
+ flash_size = FLASH_8MB;
|
||||
+ break;
|
||||
+ case STM_128MBIT_SIGNATURE:
|
||||
+ flash_size = FLASH_16MB;
|
||||
+ break;
|
||||
+ default:
|
||||
+ printk (KERN_WARNING SPIFLASH "Read of flash device signature failed!\n");
|
||||
+ return 0;
|
||||
+ }
|
||||
+
|
||||
+ return flash_size;
|
||||
+}
|
||||
+
|
||||
+
|
||||
+/* wait until the flash chip is ready and grab a lock */
|
||||
+static int spiflash_wait_ready(struct spiflash_priv *priv, int state)
|
||||
+{
|
||||
+ DECLARE_WAITQUEUE(wait, current);
|
||||
+
|
||||
+retry:
|
||||
+ spin_lock_bh(&priv->lock);
|
||||
+ if (priv->state != FL_READY) {
|
||||
+ set_current_state(TASK_UNINTERRUPTIBLE);
|
||||
+ add_wait_queue(&priv->wq, &wait);
|
||||
+ spin_unlock_bh(&priv->lock);
|
||||
+ schedule();
|
||||
+ remove_wait_queue(&priv->wq, &wait);
|
||||
+
|
||||
+ if(signal_pending(current))
|
||||
+ return 0;
|
||||
+
|
||||
+ goto retry;
|
||||
+ }
|
||||
+ priv->state = state;
|
||||
+
|
||||
+ return 1;
|
||||
+}
|
||||
+
|
||||
+static inline void spiflash_done(struct spiflash_priv *priv)
|
||||
+{
|
||||
+ priv->state = FL_READY;
|
||||
+ spin_unlock_bh(&priv->lock);
|
||||
+ wake_up(&priv->wq);
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+spiflash_wait_complete(struct spiflash_priv *priv, unsigned int timeout)
|
||||
+{
|
||||
+ busy_wait(priv, spiflash_sendcmd(priv, SPI_RD_STATUS, 0) &
|
||||
+ SPI_STATUS_WIP, timeout);
|
||||
+ spiflash_done(priv);
|
||||
+}
|
||||
+
|
||||
+
|
||||
+
|
||||
+static int
|
||||
+spiflash_erase (struct mtd_info *mtd, struct erase_info *instr)
|
||||
+{
|
||||
+ struct spiflash_priv *priv = to_spiflash(mtd);
|
||||
+ const struct opcodes *op;
|
||||
+ u32 temp, reg;
|
||||
+
|
||||
+ if (instr->addr + instr->len > mtd->size)
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ if (!spiflash_wait_ready(priv, FL_ERASING))
|
||||
+ return -EINTR;
|
||||
+
|
||||
+ spiflash_sendcmd(priv, SPI_WRITE_ENABLE, 0);
|
||||
+ reg = spiflash_wait_busy(priv);
|
||||
+
|
||||
+ op = &stm_opcodes[SPI_SECTOR_ERASE];
|
||||
+ temp = ((u32)instr->addr << 8) | (u32)(op->code);
|
||||
+ spiflash_write_reg(priv, SPI_FLASH_OPCODE, temp);
|
||||
+
|
||||
+ reg &= ~SPI_CTL_TX_RX_CNT_MASK;
|
||||
+ reg |= op->tx_cnt | SPI_CTL_START;
|
||||
+ spiflash_write_reg(priv, SPI_FLASH_CTL, reg);
|
||||
+
|
||||
+ spiflash_wait_complete(priv, 20);
|
||||
+
|
||||
+ instr->state = MTD_ERASE_DONE;
|
||||
+ mtd_erase_callback(instr);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int
|
||||
+spiflash_read (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)
|
||||
+{
|
||||
+ struct spiflash_priv *priv = to_spiflash(mtd);
|
||||
+ u8 *read_addr;
|
||||
+
|
||||
+ if (!len)
|
||||
+ return 0;
|
||||
+
|
||||
+ if (from + len > mtd->size)
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ *retlen = len;
|
||||
+
|
||||
+ if (!spiflash_wait_ready(priv, FL_READING))
|
||||
+ return -EINTR;
|
||||
+
|
||||
+ read_addr = (u8 *)(priv->readaddr + from);
|
||||
+ memcpy_fromio(buf, read_addr, len);
|
||||
+ spiflash_done(priv);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int
|
||||
+spiflash_write (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u8 *buf)
|
||||
+{
|
||||
+ struct spiflash_priv *priv = to_spiflash(mtd);
|
||||
+ u32 opcode, bytes_left;
|
||||
+
|
||||
+ *retlen = 0;
|
||||
+
|
||||
+ if (!len)
|
||||
+ return 0;
|
||||
+
|
||||
+ if (to + len > mtd->size)
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ bytes_left = len;
|
||||
+
|
||||
+ do {
|
||||
+ u32 read_len, reg, page_offset, spi_data = 0;
|
||||
+
|
||||
+ read_len = min(bytes_left, sizeof(u32));
|
||||
+
|
||||
+ /* 32-bit writes cannot span across a page boundary
|
||||
+ * (256 bytes). This types of writes require two page
|
||||
+ * program operations to handle it correctly. The STM part
|
||||
+ * will write the overflow data to the beginning of the
|
||||
+ * current page as opposed to the subsequent page.
|
||||
+ */
|
||||
+ page_offset = (to & (STM_PAGE_SIZE - 1)) + read_len;
|
||||
+
|
||||
+ if (page_offset > STM_PAGE_SIZE)
|
||||
+ read_len -= (page_offset - STM_PAGE_SIZE);
|
||||
+
|
||||
+ if (!spiflash_wait_ready(priv, FL_WRITING))
|
||||
+ return -EINTR;
|
||||
+
|
||||
+ spiflash_sendcmd(priv, SPI_WRITE_ENABLE, 0);
|
||||
+ spi_data = 0;
|
||||
+ switch (read_len) {
|
||||
+ case 4:
|
||||
+ spi_data |= buf[3] << 24;
|
||||
+ /* fall through */
|
||||
+ case 3:
|
||||
+ spi_data |= buf[2] << 16;
|
||||
+ /* fall through */
|
||||
+ case 2:
|
||||
+ spi_data |= buf[1] << 8;
|
||||
+ /* fall through */
|
||||
+ case 1:
|
||||
+ spi_data |= buf[0] & 0xff;
|
||||
+ break;
|
||||
+ default:
|
||||
+ break;
|
||||
+ }
|
||||
+
|
||||
+ spiflash_write_reg(priv, SPI_FLASH_DATA, spi_data);
|
||||
+ opcode = stm_opcodes[SPI_PAGE_PROGRAM].code |
|
||||
+ (to & 0x00ffffff) << 8;
|
||||
+ spiflash_write_reg(priv, SPI_FLASH_OPCODE, opcode);
|
||||
+
|
||||
+ reg = spiflash_read_reg(priv, SPI_FLASH_CTL);
|
||||
+ reg &= ~SPI_CTL_TX_RX_CNT_MASK;
|
||||
+ reg |= (read_len + 4) | SPI_CTL_START;
|
||||
+ spiflash_write_reg(priv, SPI_FLASH_CTL, reg);
|
||||
+
|
||||
+ spiflash_wait_complete(priv, 1);
|
||||
+
|
||||
+ bytes_left -= read_len;
|
||||
+ to += read_len;
|
||||
+ buf += read_len;
|
||||
+
|
||||
+ *retlen += read_len;
|
||||
+ } while (bytes_left != 0);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+
|
||||
+#ifdef CONFIG_MTD_PARTITIONS
|
||||
+static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", "MyLoader", NULL };
|
||||
+#endif
|
||||
+
|
||||
+
|
||||
+static int
|
||||
+spiflash_probe(struct platform_device *pdev)
|
||||
+{
|
||||
+ struct spiflash_priv *priv;
|
||||
+ struct mtd_partition *parts;
|
||||
+ struct mtd_info *mtd;
|
||||
+ int index, num_parts;
|
||||
+ int result = 0;
|
||||
+
|
||||
+ priv = kzalloc(sizeof(struct spiflash_priv), GFP_KERNEL);
|
||||
+ spin_lock_init(&priv->lock);
|
||||
+ init_waitqueue_head(&priv->wq);
|
||||
+ priv->state = FL_READY;
|
||||
+ mtd = &priv->mtd;
|
||||
+
|
||||
+ priv->mmraddr = ioremap_nocache(SPI_FLASH_MMR, SPI_FLASH_MMR_SIZE);
|
||||
+ if (!priv->mmraddr) {
|
||||
+ printk(KERN_WARNING SPIFLASH "Failed to map flash device\n");
|
||||
+ goto error;
|
||||
+ }
|
||||
+
|
||||
+ index = spiflash_probe_chip(priv);
|
||||
+ if (!index) {
|
||||
+ printk (KERN_WARNING SPIFLASH "Found no serial flash device\n");
|
||||
+ goto error;
|
||||
+ }
|
||||
+
|
||||
+ priv->readaddr = ioremap_nocache(SPI_FLASH_READ, flashconfig_tbl[index].byte_cnt);
|
||||
+ if (!priv->readaddr) {
|
||||
+ printk (KERN_WARNING SPIFLASH "Failed to map flash device\n");
|
||||
+ goto error;
|
||||
+ }
|
||||
+
|
||||
+ platform_set_drvdata(pdev, priv);
|
||||
+ mtd->name = "spiflash";
|
||||
+ mtd->type = MTD_NORFLASH;
|
||||
+ mtd->flags = (MTD_CAP_NORFLASH|MTD_WRITEABLE);
|
||||
+ mtd->size = flashconfig_tbl[index].byte_cnt;
|
||||
+ mtd->erasesize = flashconfig_tbl[index].sector_size;
|
||||
+ mtd->writesize = 1;
|
||||
+ mtd->numeraseregions = 0;
|
||||
+ mtd->eraseregions = NULL;
|
||||
+ mtd->erase = spiflash_erase;
|
||||
+ mtd->read = spiflash_read;
|
||||
+ mtd->write = spiflash_write;
|
||||
+ mtd->owner = THIS_MODULE;
|
||||
+
|
||||
+#ifdef CONFIG_MTD_PARTITIONS
|
||||
+ /* parse redboot partitions */
|
||||
+ num_parts = parse_mtd_partitions(mtd, part_probe_types, &parts, 0);
|
||||
+ if (!num_parts)
|
||||
+ goto error;
|
||||
+
|
||||
+ result = add_mtd_partitions(mtd, parts, num_parts);
|
||||
+#endif
|
||||
+
|
||||
+ return result;
|
||||
+
|
||||
+error:
|
||||
+ if (priv->mmraddr)
|
||||
+ iounmap(priv->mmraddr);
|
||||
+ kfree(priv);
|
||||
+ return -ENXIO;
|
||||
+}
|
||||
+
|
||||
+static int
|
||||
+spiflash_remove (struct platform_device *pdev)
|
||||
+{
|
||||
+ struct spiflash_priv *priv = platform_get_drvdata(pdev);
|
||||
+ struct mtd_info *mtd = &priv->mtd;
|
||||
+
|
||||
+ del_mtd_partitions(mtd);
|
||||
+ iounmap(priv->mmraddr);
|
||||
+ iounmap(priv->readaddr);
|
||||
+ kfree(priv);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+struct platform_driver spiflash_driver = {
|
||||
+ .driver.name = "spiflash",
|
||||
+ .probe = spiflash_probe,
|
||||
+ .remove = spiflash_remove,
|
||||
+};
|
||||
+
|
||||
+int __init
|
||||
+spiflash_init (void)
|
||||
+{
|
||||
+ return platform_driver_register(&spiflash_driver);
|
||||
+}
|
||||
+
|
||||
+void __exit
|
||||
+spiflash_exit (void)
|
||||
+{
|
||||
+ return platform_driver_unregister(&spiflash_driver);
|
||||
+}
|
||||
+
|
||||
+module_init (spiflash_init);
|
||||
+module_exit (spiflash_exit);
|
||||
+
|
||||
+MODULE_LICENSE("GPL");
|
||||
+MODULE_AUTHOR("OpenWrt.org, Atheros Communications Inc");
|
||||
+MODULE_DESCRIPTION("MTD driver for SPI Flash on Atheros SOC");
|
||||
+
|
||||
--- /dev/null
|
||||
+++ b/arch/mips/include/asm/mach-ar231x/ar2315_spiflash.h
|
||||
@@ -0,0 +1,116 @@
|
||||
+/*
|
||||
+ * SPI Flash Memory support header file.
|
||||
+ *
|
||||
+ * Copyright (c) 2005, Atheros Communications Inc.
|
||||
+ * Copyright (C) 2006 FON Technology, SL.
|
||||
+ * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
|
||||
+ * Copyright (C) 2006-2009 Felix Fietkau <nbd@openwrt.org>
|
||||
+ *
|
||||
+ * This code is free software; you can redistribute it and/or modify
|
||||
+ * it under the terms of the GNU General Public License version 2 as
|
||||
+ * published by the Free Software Foundation.
|
||||
+ *
|
||||
+ */
|
||||
+#ifndef __AR2315_SPIFLASH_H
|
||||
+#define __AR2315_SPIFLASH_H
|
||||
+
|
||||
+#define STM_PAGE_SIZE 256
|
||||
+
|
||||
+#define SFI_WRITE_BUFFER_SIZE 4
|
||||
+#define SFI_FLASH_ADDR_MASK 0x00ffffff
|
||||
+
|
||||
+#define STM_8MBIT_SIGNATURE 0x13
|
||||
+#define STM_M25P80_BYTE_COUNT 1048576
|
||||
+#define STM_M25P80_SECTOR_COUNT 16
|
||||
+#define STM_M25P80_SECTOR_SIZE 0x10000
|
||||
+
|
||||
+#define STM_16MBIT_SIGNATURE 0x14
|
||||
+#define STM_M25P16_BYTE_COUNT 2097152
|
||||
+#define STM_M25P16_SECTOR_COUNT 32
|
||||
+#define STM_M25P16_SECTOR_SIZE 0x10000
|
||||
+
|
||||
+#define STM_32MBIT_SIGNATURE 0x15
|
||||
+#define STM_M25P32_BYTE_COUNT 4194304
|
||||
+#define STM_M25P32_SECTOR_COUNT 64
|
||||
+#define STM_M25P32_SECTOR_SIZE 0x10000
|
||||
+
|
||||
+#define STM_64MBIT_SIGNATURE 0x16
|
||||
+#define STM_M25P64_BYTE_COUNT 8388608
|
||||
+#define STM_M25P64_SECTOR_COUNT 128
|
||||
+#define STM_M25P64_SECTOR_SIZE 0x10000
|
||||
+
|
||||
+#define STM_128MBIT_SIGNATURE 0x17
|
||||
+#define STM_M25P128_BYTE_COUNT 16777216
|
||||
+#define STM_M25P128_SECTOR_COUNT 256
|
||||
+#define STM_M25P128_SECTOR_SIZE 0x10000
|
||||
+
|
||||
+#define STM_1MB_BYTE_COUNT STM_M25P80_BYTE_COUNT
|
||||
+#define STM_1MB_SECTOR_COUNT STM_M25P80_SECTOR_COUNT
|
||||
+#define STM_1MB_SECTOR_SIZE STM_M25P80_SECTOR_SIZE
|
||||
+#define STM_2MB_BYTE_COUNT STM_M25P16_BYTE_COUNT
|
||||
+#define STM_2MB_SECTOR_COUNT STM_M25P16_SECTOR_COUNT
|
||||
+#define STM_2MB_SECTOR_SIZE STM_M25P16_SECTOR_SIZE
|
||||
+#define STM_4MB_BYTE_COUNT STM_M25P32_BYTE_COUNT
|
||||
+#define STM_4MB_SECTOR_COUNT STM_M25P32_SECTOR_COUNT
|
||||
+#define STM_4MB_SECTOR_SIZE STM_M25P32_SECTOR_SIZE
|
||||
+#define STM_8MB_BYTE_COUNT STM_M25P64_BYTE_COUNT
|
||||
+#define STM_8MB_SECTOR_COUNT STM_M25P64_SECTOR_COUNT
|
||||
+#define STM_8MB_SECTOR_SIZE STM_M25P64_SECTOR_SIZE
|
||||
+#define STM_16MB_BYTE_COUNT STM_M25P128_BYTE_COUNT
|
||||
+#define STM_16MB_SECTOR_COUNT STM_M25P128_SECTOR_COUNT
|
||||
+#define STM_16MB_SECTOR_SIZE STM_M25P128_SECTOR_SIZE
|
||||
+
|
||||
+/*
|
||||
+ * ST Microelectronics Opcodes for Serial Flash
|
||||
+ */
|
||||
+
|
||||
+#define STM_OP_WR_ENABLE 0x06 /* Write Enable */
|
||||
+#define STM_OP_WR_DISABLE 0x04 /* Write Disable */
|
||||
+#define STM_OP_RD_STATUS 0x05 /* Read Status */
|
||||
+#define STM_OP_WR_STATUS 0x01 /* Write Status */
|
||||
+#define STM_OP_RD_DATA 0x03 /* Read Data */
|
||||
+#define STM_OP_FAST_RD_DATA 0x0b /* Fast Read Data */
|
||||
+#define STM_OP_PAGE_PGRM 0x02 /* Page Program */
|
||||
+#define STM_OP_SECTOR_ERASE 0xd8 /* Sector Erase */
|
||||
+#define STM_OP_BULK_ERASE 0xc7 /* Bulk Erase */
|
||||
+#define STM_OP_DEEP_PWRDOWN 0xb9 /* Deep Power-Down Mode */
|
||||
+#define STM_OP_RD_SIG 0xab /* Read Electronic Signature */
|
||||
+
|
||||
+#define STM_STATUS_WIP 0x01 /* Write-In-Progress */
|
||||
+#define STM_STATUS_WEL 0x02 /* Write Enable Latch */
|
||||
+#define STM_STATUS_BP0 0x04 /* Block Protect 0 */
|
||||
+#define STM_STATUS_BP1 0x08 /* Block Protect 1 */
|
||||
+#define STM_STATUS_BP2 0x10 /* Block Protect 2 */
|
||||
+#define STM_STATUS_SRWD 0x80 /* Status Register Write Disable */
|
||||
+
|
||||
+/*
|
||||
+ * SPI Flash Interface Registers
|
||||
+ */
|
||||
+#define AR531XPLUS_SPI_READ 0x08000000
|
||||
+#define AR531XPLUS_SPI_MMR 0x11300000
|
||||
+#define AR531XPLUS_SPI_MMR_SIZE 12
|
||||
+
|
||||
+#define AR531XPLUS_SPI_CTL 0x00
|
||||
+#define AR531XPLUS_SPI_OPCODE 0x04
|
||||
+#define AR531XPLUS_SPI_DATA 0x08
|
||||
+
|
||||
+#define SPI_FLASH_READ AR531XPLUS_SPI_READ
|
||||
+#define SPI_FLASH_MMR AR531XPLUS_SPI_MMR
|
||||
+#define SPI_FLASH_MMR_SIZE AR531XPLUS_SPI_MMR_SIZE
|
||||
+#define SPI_FLASH_CTL AR531XPLUS_SPI_CTL
|
||||
+#define SPI_FLASH_OPCODE AR531XPLUS_SPI_OPCODE
|
||||
+#define SPI_FLASH_DATA AR531XPLUS_SPI_DATA
|
||||
+
|
||||
+#define SPI_CTL_START 0x00000100
|
||||
+#define SPI_CTL_BUSY 0x00010000
|
||||
+#define SPI_CTL_TXCNT_MASK 0x0000000f
|
||||
+#define SPI_CTL_RXCNT_MASK 0x000000f0
|
||||
+#define SPI_CTL_TX_RX_CNT_MASK 0x000000ff
|
||||
+#define SPI_CTL_SIZE_MASK 0x00060000
|
||||
+
|
||||
+#define SPI_CTL_CLK_SEL_MASK 0x03000000
|
||||
+#define SPI_OPCODE_MASK 0x000000ff
|
||||
+
|
||||
+#define SPI_STATUS_WIP STM_STATUS_WIP
|
||||
+
|
||||
+#endif
|
||||
@ -1,228 +0,0 @@
|
||||
--- /dev/null
|
||||
+++ b/drivers/watchdog/ar2315-wtd.c
|
||||
@@ -0,0 +1,200 @@
|
||||
+/*
|
||||
+ * This program is free software; you can redistribute it and/or modify
|
||||
+ * it under the terms of the GNU General Public License as published by
|
||||
+ * the Free Software Foundation; either version 2 of the License, or
|
||||
+ * (at your option) any later version.
|
||||
+ *
|
||||
+ * This program is distributed in the hope that it will be useful,
|
||||
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
+ * GNU General Public License for more details.
|
||||
+ *
|
||||
+ * You should have received a copy of the GNU General Public License
|
||||
+ * along with this program; if not, write to the Free Software
|
||||
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
+ *
|
||||
+ * Copyright (C) 2008 John Crispin <blogic@openwrt.org>
|
||||
+ * Based on EP93xx and ifxmips wdt driver
|
||||
+ */
|
||||
+
|
||||
+#include <linux/interrupt.h>
|
||||
+#include <linux/module.h>
|
||||
+#include <linux/moduleparam.h>
|
||||
+#include <linux/types.h>
|
||||
+#include <linux/miscdevice.h>
|
||||
+#include <linux/watchdog.h>
|
||||
+#include <linux/fs.h>
|
||||
+#include <linux/ioport.h>
|
||||
+#include <linux/notifier.h>
|
||||
+#include <linux/reboot.h>
|
||||
+#include <linux/init.h>
|
||||
+#include <linux/platform_device.h>
|
||||
+
|
||||
+#include <asm/io.h>
|
||||
+#include <asm/uaccess.h>
|
||||
+#include <asm/system.h>
|
||||
+#include <asm/addrspace.h>
|
||||
+#include <ar231x_platform.h>
|
||||
+#include <ar2315_regs.h>
|
||||
+#include <ar231x.h>
|
||||
+
|
||||
+#define CLOCK_RATE 40000000
|
||||
+#define HEARTBEAT(x) (x < 1 || x > 90)?(20):(x)
|
||||
+
|
||||
+static int wdt_timeout = 20;
|
||||
+static int started = 0;
|
||||
+static int in_use = 0;
|
||||
+
|
||||
+static void
|
||||
+ar2315_wdt_enable(void)
|
||||
+{
|
||||
+ ar231x_write_reg(AR2315_WD, wdt_timeout * CLOCK_RATE);
|
||||
+ ar231x_write_reg(AR2315_ISR, 0x80);
|
||||
+}
|
||||
+
|
||||
+static ssize_t
|
||||
+ar2315_wdt_write(struct file *file, const char __user *data, size_t len, loff_t *ppos)
|
||||
+{
|
||||
+ if(len)
|
||||
+ ar2315_wdt_enable();
|
||||
+ return len;
|
||||
+}
|
||||
+
|
||||
+static int
|
||||
+ar2315_wdt_open(struct inode *inode, struct file *file)
|
||||
+{
|
||||
+ if(in_use)
|
||||
+ return -EBUSY;
|
||||
+ ar2315_wdt_enable();
|
||||
+ in_use = started = 1;
|
||||
+ return nonseekable_open(inode, file);
|
||||
+}
|
||||
+
|
||||
+static int
|
||||
+ar2315_wdt_release(struct inode *inode, struct file *file)
|
||||
+{
|
||||
+ in_use = 0;
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static irqreturn_t
|
||||
+ar2315_wdt_interrupt(int irq, void *dev_id)
|
||||
+{
|
||||
+ if(started)
|
||||
+ {
|
||||
+ printk(KERN_CRIT "watchdog expired, rebooting system\n");
|
||||
+ emergency_restart();
|
||||
+ } else {
|
||||
+ ar231x_write_reg(AR2315_WDC, 0);
|
||||
+ ar231x_write_reg(AR2315_WD, 0);
|
||||
+ ar231x_write_reg(AR2315_ISR, 0x80);
|
||||
+ }
|
||||
+ return IRQ_HANDLED;
|
||||
+}
|
||||
+
|
||||
+static struct watchdog_info ident = {
|
||||
+ .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
|
||||
+ .identity = "ar2315 Watchdog",
|
||||
+};
|
||||
+
|
||||
+static int
|
||||
+ar2315_wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
|
||||
+{
|
||||
+ int new_wdt_timeout;
|
||||
+ int ret = -ENOIOCTLCMD;
|
||||
+
|
||||
+ switch(cmd)
|
||||
+ {
|
||||
+ case WDIOC_GETSUPPORT:
|
||||
+ ret = copy_to_user((struct watchdog_info __user *)arg, &ident, sizeof(ident)) ? -EFAULT : 0;
|
||||
+ break;
|
||||
+
|
||||
+ case WDIOC_KEEPALIVE:
|
||||
+ ar2315_wdt_enable();
|
||||
+ ret = 0;
|
||||
+ break;
|
||||
+
|
||||
+ case WDIOC_SETTIMEOUT:
|
||||
+ if((ret = get_user(new_wdt_timeout, (int __user *)arg)))
|
||||
+ break;
|
||||
+ wdt_timeout = HEARTBEAT(new_wdt_timeout);
|
||||
+ ar2315_wdt_enable();
|
||||
+ break;
|
||||
+
|
||||
+ case WDIOC_GETTIMEOUT:
|
||||
+ ret = put_user(wdt_timeout, (int __user *)arg);
|
||||
+ break;
|
||||
+ }
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static struct file_operations ar2315_wdt_fops = {
|
||||
+ .owner = THIS_MODULE,
|
||||
+ .llseek = no_llseek,
|
||||
+ .write = ar2315_wdt_write,
|
||||
+ .ioctl = ar2315_wdt_ioctl,
|
||||
+ .open = ar2315_wdt_open,
|
||||
+ .release = ar2315_wdt_release,
|
||||
+};
|
||||
+
|
||||
+static struct miscdevice ar2315_wdt_miscdev = {
|
||||
+ .minor = WATCHDOG_MINOR,
|
||||
+ .name = "watchdog",
|
||||
+ .fops = &ar2315_wdt_fops,
|
||||
+};
|
||||
+
|
||||
+static int
|
||||
+ar2315_wdt_probe(struct platform_device *dev)
|
||||
+{
|
||||
+ int ret = 0;
|
||||
+
|
||||
+ ar2315_wdt_enable();
|
||||
+ ret = request_irq(AR531X_MISC_IRQ_WATCHDOG, ar2315_wdt_interrupt, IRQF_DISABLED, "ar2315_wdt", NULL);
|
||||
+ if(ret)
|
||||
+ {
|
||||
+ printk(KERN_ERR "ar2315wdt: failed to register inetrrupt\n");
|
||||
+ goto out;
|
||||
+ }
|
||||
+
|
||||
+ ret = misc_register(&ar2315_wdt_miscdev);
|
||||
+ if(ret)
|
||||
+ printk(KERN_ERR "ar2315wdt: failed to register miscdev\n");
|
||||
+
|
||||
+out:
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static int
|
||||
+ar2315_wdt_remove(struct platform_device *dev)
|
||||
+{
|
||||
+ misc_deregister(&ar2315_wdt_miscdev);
|
||||
+ free_irq(AR531X_MISC_IRQ_WATCHDOG, NULL);
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static struct platform_driver ar2315_wdt_driver = {
|
||||
+ .probe = ar2315_wdt_probe,
|
||||
+ .remove = ar2315_wdt_remove,
|
||||
+ .driver = {
|
||||
+ .name = "ar2315_wdt",
|
||||
+ .owner = THIS_MODULE,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+static int __init
|
||||
+init_ar2315_wdt(void)
|
||||
+{
|
||||
+ int ret = platform_driver_register(&ar2315_wdt_driver);
|
||||
+ if(ret)
|
||||
+ printk(KERN_INFO "ar2315_wdt: error registering platfom driver!");
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static void __exit
|
||||
+exit_ar2315_wdt(void)
|
||||
+{
|
||||
+ platform_driver_unregister(&ar2315_wdt_driver);
|
||||
+}
|
||||
+
|
||||
+module_init(init_ar2315_wdt);
|
||||
+module_exit(exit_ar2315_wdt);
|
||||
--- a/drivers/watchdog/Kconfig
|
||||
+++ b/drivers/watchdog/Kconfig
|
||||
@@ -972,6 +972,12 @@ config BCM63XX_WDT
|
||||
To compile this driver as a loadable module, choose M here.
|
||||
The module will be called bcm63xx_wdt.
|
||||
|
||||
+config ATHEROS_WDT
|
||||
+ tristate "Atheros wisoc Watchdog Timer"
|
||||
+ depends on ATHEROS_AR231X
|
||||
+ help
|
||||
+ Hardware driver for the Atheros wisoc Watchdog Timer.
|
||||
+
|
||||
# PARISC Architecture
|
||||
|
||||
# POWERPC Architecture
|
||||
--- a/drivers/watchdog/Makefile
|
||||
+++ b/drivers/watchdog/Makefile
|
||||
@@ -118,6 +118,7 @@ obj-$(CONFIG_WDT_MTX1) += mtx-1_wdt.o
|
||||
obj-$(CONFIG_PNX833X_WDT) += pnx833x_wdt.o
|
||||
obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o
|
||||
obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
|
||||
+obj-$(CONFIG_ATHEROS_WDT) += ar2315-wtd.o
|
||||
obj-$(CONFIG_TXX9_WDT) += txx9wdt.o
|
||||
obj-$(CONFIG_OCTEON_WDT) += octeon-wdt.o
|
||||
octeon-wdt-y := octeon-wdt-main.o octeon-wdt-nmi.o
|
||||
@ -1,54 +0,0 @@
|
||||
--- a/drivers/mtd/redboot.c
|
||||
+++ b/drivers/mtd/redboot.c
|
||||
@@ -78,31 +78,32 @@ static int parse_redboot_partitions(stru
|
||||
static char nullstring[] = "unallocated";
|
||||
#endif
|
||||
|
||||
+ buf = vmalloc(master->erasesize);
|
||||
+ if (!buf)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ restart:
|
||||
if ( directory < 0 ) {
|
||||
offset = master->size + directory * master->erasesize;
|
||||
- while (master->block_isbad &&
|
||||
+ while (master->block_isbad &&
|
||||
master->block_isbad(master, offset)) {
|
||||
if (!offset) {
|
||||
nogood:
|
||||
printk(KERN_NOTICE "Failed to find a non-bad block to check for RedBoot partition table\n");
|
||||
+ vfree(buf);
|
||||
return -EIO;
|
||||
}
|
||||
offset -= master->erasesize;
|
||||
}
|
||||
} else {
|
||||
offset = directory * master->erasesize;
|
||||
- while (master->block_isbad &&
|
||||
+ while (master->block_isbad &&
|
||||
master->block_isbad(master, offset)) {
|
||||
offset += master->erasesize;
|
||||
if (offset == master->size)
|
||||
goto nogood;
|
||||
}
|
||||
}
|
||||
- buf = vmalloc(master->erasesize);
|
||||
-
|
||||
- if (!buf)
|
||||
- return -ENOMEM;
|
||||
-
|
||||
printk(KERN_NOTICE "Searching for RedBoot partition table in %s at offset 0x%lx\n",
|
||||
master->name, offset);
|
||||
|
||||
@@ -174,6 +175,11 @@ static int parse_redboot_partitions(stru
|
||||
}
|
||||
if (i == numslots) {
|
||||
/* Didn't find it */
|
||||
+ if (offset + master->erasesize < master->size) {
|
||||
+ /* not at the end of the flash yet, maybe next block :) */
|
||||
+ directory++;
|
||||
+ goto restart;
|
||||
+ }
|
||||
printk(KERN_NOTICE "No RedBoot partition table detected in %s\n",
|
||||
master->name);
|
||||
ret = 0;
|
||||
@ -1,11 +0,0 @@
|
||||
--- a/drivers/watchdog/ar2315-wtd.c
|
||||
+++ b/drivers/watchdog/ar2315-wtd.c
|
||||
@@ -132,7 +132,7 @@ static struct file_operations ar2315_wdt
|
||||
.owner = THIS_MODULE,
|
||||
.llseek = no_llseek,
|
||||
.write = ar2315_wdt_write,
|
||||
- .ioctl = ar2315_wdt_ioctl,
|
||||
+ .unlocked_ioctl = ar2315_wdt_ioctl,
|
||||
.open = ar2315_wdt_open,
|
||||
.release = ar2315_wdt_release,
|
||||
};
|
||||
@ -1,175 +0,0 @@
|
||||
--- a/arch/mips/ar231x/Makefile
|
||||
+++ b/arch/mips/ar231x/Makefile
|
||||
@@ -8,7 +8,7 @@
|
||||
# Copyright (C) 2006-2009 Felix Fietkau <nbd@openwrt.org>
|
||||
#
|
||||
|
||||
-obj-y += board.o prom.o devices.o
|
||||
+obj-y += board.o prom.o devices.o reset.o
|
||||
|
||||
obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
|
||||
|
||||
--- /dev/null
|
||||
+++ b/arch/mips/ar231x/reset.c
|
||||
@@ -0,0 +1,161 @@
|
||||
+#include <linux/init.h>
|
||||
+#include <linux/module.h>
|
||||
+#include <linux/timer.h>
|
||||
+#include <linux/interrupt.h>
|
||||
+#include <linux/kobject.h>
|
||||
+#include <linux/workqueue.h>
|
||||
+#include <linux/skbuff.h>
|
||||
+#include <linux/netlink.h>
|
||||
+#include <net/sock.h>
|
||||
+#include <asm/uaccess.h>
|
||||
+#include <ar231x_platform.h>
|
||||
+#include <ar231x.h>
|
||||
+#include <gpio.h>
|
||||
+#include "devices.h"
|
||||
+
|
||||
+#define AR531X_RESET_GPIO_IRQ (AR531X_GPIO_IRQ(ar231x_board.config->resetConfigGpio))
|
||||
+
|
||||
+struct event_t {
|
||||
+ struct work_struct wq;
|
||||
+ int set;
|
||||
+ unsigned long jiffies;
|
||||
+};
|
||||
+
|
||||
+static struct timer_list rst_button_timer;
|
||||
+static unsigned long seen;
|
||||
+
|
||||
+struct sock *uevent_sock = NULL;
|
||||
+EXPORT_SYMBOL_GPL(uevent_sock);
|
||||
+extern u64 uevent_next_seqnum(void);
|
||||
+
|
||||
+static int no_release_workaround = 1;
|
||||
+module_param(no_release_workaround, int, 0);
|
||||
+
|
||||
+static inline void
|
||||
+add_msg(struct sk_buff *skb, char *msg)
|
||||
+{
|
||||
+ char *scratch;
|
||||
+ scratch = skb_put(skb, strlen(msg) + 1);
|
||||
+ sprintf(scratch, msg);
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+hotplug_button(struct work_struct *wq)
|
||||
+{
|
||||
+ struct sk_buff *skb;
|
||||
+ struct event_t *event;
|
||||
+ size_t len;
|
||||
+ char *scratch, *s;
|
||||
+ char buf[128];
|
||||
+
|
||||
+ event = container_of(wq, struct event_t, wq);
|
||||
+ if (!uevent_sock)
|
||||
+ goto done;
|
||||
+
|
||||
+ /* allocate message with the maximum possible size */
|
||||
+ s = event->set ? "pressed" : "released";
|
||||
+ len = strlen(s) + 2;
|
||||
+ skb = alloc_skb(NLMSG_GOODSIZE, GFP_KERNEL);
|
||||
+ if (!skb)
|
||||
+ goto done;
|
||||
+
|
||||
+ /* add header */
|
||||
+ scratch = skb_put(skb, len);
|
||||
+ sprintf(scratch, "%s@",s);
|
||||
+
|
||||
+ /* copy keys to our continuous event payload buffer */
|
||||
+ add_msg(skb, "HOME=/");
|
||||
+ add_msg(skb, "PATH=/sbin:/bin:/usr/sbin:/usr/bin");
|
||||
+ add_msg(skb, "SUBSYSTEM=button");
|
||||
+ add_msg(skb, "BUTTON=reset");
|
||||
+ add_msg(skb, (event->set ? "ACTION=pressed" : "ACTION=released"));
|
||||
+ sprintf(buf, "SEEN=%ld", (event->jiffies - seen)/HZ);
|
||||
+ add_msg(skb, buf);
|
||||
+ snprintf(buf, 128, "SEQNUM=%llu", uevent_next_seqnum());
|
||||
+ add_msg(skb, buf);
|
||||
+
|
||||
+ NETLINK_CB(skb).dst_group = 1;
|
||||
+ netlink_broadcast(uevent_sock, skb, 0, 1, GFP_KERNEL);
|
||||
+
|
||||
+done:
|
||||
+ kfree(event);
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+reset_button_poll(unsigned long unused)
|
||||
+{
|
||||
+ struct event_t *event;
|
||||
+ int gpio = ~0;
|
||||
+
|
||||
+ if(!no_release_workaround)
|
||||
+ return;
|
||||
+
|
||||
+ gpio = ar231x_gpiodev->get();
|
||||
+ gpio &= (1 << (AR531X_RESET_GPIO_IRQ - AR531X_GPIO_IRQ_BASE));
|
||||
+ if(gpio) {
|
||||
+ rst_button_timer.expires = jiffies + (HZ / 4);
|
||||
+ add_timer(&rst_button_timer);
|
||||
+ return;
|
||||
+ }
|
||||
+
|
||||
+ event = (struct event_t *) kzalloc(sizeof(struct event_t), GFP_ATOMIC);
|
||||
+ if (!event)
|
||||
+ return;
|
||||
+
|
||||
+ event->set = 0;
|
||||
+ event->jiffies = jiffies;
|
||||
+ INIT_WORK(&event->wq, hotplug_button);
|
||||
+ schedule_work(&event->wq);
|
||||
+}
|
||||
+
|
||||
+static irqreturn_t
|
||||
+button_handler(int irq, void *dev_id)
|
||||
+{
|
||||
+ static int pressed = 0;
|
||||
+ struct event_t *event;
|
||||
+ u32 gpio = ~0;
|
||||
+
|
||||
+ event = (struct event_t *) kzalloc(sizeof(struct event_t), GFP_ATOMIC);
|
||||
+ if (!event)
|
||||
+ return IRQ_NONE;
|
||||
+
|
||||
+ pressed = !pressed;
|
||||
+
|
||||
+ gpio = ar231x_gpiodev->get() & (1 << (irq - AR531X_GPIO_IRQ_BASE));
|
||||
+
|
||||
+ event->set = gpio;
|
||||
+ if(!event->set)
|
||||
+ no_release_workaround = 0;
|
||||
+
|
||||
+ event->jiffies = jiffies;
|
||||
+
|
||||
+ INIT_WORK(&event->wq, hotplug_button);
|
||||
+ schedule_work(&event->wq);
|
||||
+
|
||||
+ seen = jiffies;
|
||||
+ if(event->set && no_release_workaround)
|
||||
+ mod_timer(&rst_button_timer, jiffies + (HZ / 4));
|
||||
+
|
||||
+ return IRQ_HANDLED;
|
||||
+}
|
||||
+
|
||||
+
|
||||
+static int __init
|
||||
+ar231x_init_reset(void)
|
||||
+{
|
||||
+ seen = jiffies;
|
||||
+
|
||||
+ if (ar231x_board.config->resetConfigGpio == 0xffff)
|
||||
+ return -ENODEV;
|
||||
+
|
||||
+ init_timer(&rst_button_timer);
|
||||
+ rst_button_timer.function = reset_button_poll;
|
||||
+ rst_button_timer.expires = jiffies + HZ / 50;
|
||||
+ add_timer(&rst_button_timer);
|
||||
+
|
||||
+ request_irq(AR531X_RESET_GPIO_IRQ, &button_handler, IRQF_SAMPLE_RANDOM, "ar231x_reset", NULL);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+module_init(ar231x_init_reset);
|
||||
@ -1,69 +0,0 @@
|
||||
--- a/drivers/net/ar231x.c
|
||||
+++ b/drivers/net/ar231x.c
|
||||
@@ -149,6 +149,7 @@ static int ar231x_mdiobus_write(struct m
|
||||
static int ar231x_mdiobus_reset(struct mii_bus *bus);
|
||||
static int ar231x_mdiobus_probe (struct net_device *dev);
|
||||
static void ar231x_adjust_link(struct net_device *dev);
|
||||
+static bool no_phy = false;
|
||||
|
||||
#ifndef ERR
|
||||
#define ERR(fmt, args...) printk("%s: " fmt, __func__, ##args)
|
||||
@@ -298,6 +299,21 @@ int __init ar231x_probe(struct platform_
|
||||
|
||||
mdiobus_register(sp->mii_bus);
|
||||
|
||||
+ /* Workaround for Micrel switch, which is only available on
|
||||
+ * one PHY and cannot be configured through MDIO */
|
||||
+ if (!no_phy) {
|
||||
+ u32 phy_id = 0;
|
||||
+ get_phy_id(sp->mii_bus, 1, &phy_id);
|
||||
+ if (phy_id == 0x00221450)
|
||||
+ no_phy = true;
|
||||
+ }
|
||||
+ if (no_phy) {
|
||||
+ sp->link = 1;
|
||||
+ netif_carrier_on(dev);
|
||||
+ return 0;
|
||||
+ }
|
||||
+ no_phy = true;
|
||||
+
|
||||
if (ar231x_mdiobus_probe(dev) != 0) {
|
||||
printk(KERN_ERR "%s: mdiobus_probe failed\n", dev->name);
|
||||
rx_tasklet_cleanup(dev);
|
||||
@@ -354,8 +370,10 @@ static int __devexit ar231x_remove(struc
|
||||
rx_tasklet_cleanup(dev);
|
||||
ar231x_init_cleanup(dev);
|
||||
unregister_netdev(dev);
|
||||
- mdiobus_unregister(sp->mii_bus);
|
||||
- mdiobus_free(sp->mii_bus);
|
||||
+ if (sp->mii_bus) {
|
||||
+ mdiobus_unregister(sp->mii_bus);
|
||||
+ mdiobus_free(sp->mii_bus);
|
||||
+ }
|
||||
kfree(dev);
|
||||
return 0;
|
||||
}
|
||||
@@ -856,7 +874,12 @@ static int ar231x_rx_int(struct net_devi
|
||||
dev->stats.rx_bytes += skb->len;
|
||||
|
||||
/* pass the packet to upper layers */
|
||||
- sp->rx(skb);
|
||||
+ if (sp->rx) {
|
||||
+ sp->rx(skb);
|
||||
+ } else {
|
||||
+ skb->protocol = eth_type_trans(skb, skb->dev);
|
||||
+ netif_rx(skb);
|
||||
+ }
|
||||
skb_new->dev = dev;
|
||||
|
||||
/* 16 bit align */
|
||||
@@ -1153,6 +1176,9 @@ static int ar231x_ioctl(struct net_devic
|
||||
struct ar231x_private *sp = netdev_priv(dev);
|
||||
int ret;
|
||||
|
||||
+ if (!sp->phy_dev)
|
||||
+ return -ENODEV;
|
||||
+
|
||||
switch (cmd) {
|
||||
|
||||
case SIOCETHTOOL:
|
||||
@ -13,21 +13,21 @@
|
||||
+ select SYS_HAS_CPU_MIPS32_R1
|
||||
+ select SYS_SUPPORTS_BIG_ENDIAN
|
||||
+ select SYS_SUPPORTS_32BIT_KERNEL
|
||||
+ select GENERIC_GPIO
|
||||
+ select ARCH_REQUIRE_GPIOLIB
|
||||
+ help
|
||||
+ Support for AR231x and AR531x based boards
|
||||
+
|
||||
config MIPS_COBALT
|
||||
bool "Cobalt Server"
|
||||
select CEVT_R4K
|
||||
@@ -737,6 +750,7 @@ config CAVIUM_OCTEON_REFERENCE_BOARD
|
||||
@@ -813,6 +826,7 @@ config NLM_XLP_BOARD
|
||||
|
||||
endchoice
|
||||
|
||||
+source "arch/mips/ar231x/Kconfig"
|
||||
source "arch/mips/alchemy/Kconfig"
|
||||
source "arch/mips/ath79/Kconfig"
|
||||
source "arch/mips/bcm63xx/Kconfig"
|
||||
source "arch/mips/bcm47xx/Kconfig"
|
||||
--- a/arch/mips/Kbuild.platforms
|
||||
+++ b/arch/mips/Kbuild.platforms
|
||||
@@ -6,6 +6,7 @@ platforms += ath79
|
||||
@ -49,7 +49,7 @@
|
||||
+load-$(CONFIG_ATHEROS_AR231X) += 0xffffffff80041000
|
||||
--- /dev/null
|
||||
+++ b/arch/mips/ar231x/Kconfig
|
||||
@@ -0,0 +1,17 @@
|
||||
@@ -0,0 +1,16 @@
|
||||
+config ATHEROS_AR5312
|
||||
+ bool "Atheros 5312/2312+ support"
|
||||
+ depends on ATHEROS_AR231X
|
||||
@ -65,7 +65,6 @@
|
||||
+ select SYS_HAS_CPU_MIPS32_R1
|
||||
+ select SYS_SUPPORTS_32BIT_KERNEL
|
||||
+ select SYS_SUPPORTS_BIG_ENDIAN
|
||||
+ select GENERIC_GPIO
|
||||
+ default y
|
||||
--- /dev/null
|
||||
+++ b/arch/mips/ar231x/Makefile
|
||||
@ -85,7 +84,7 @@
|
||||
+obj-$(CONFIG_ATHEROS_AR2315) += ar2315.o
|
||||
--- /dev/null
|
||||
+++ b/arch/mips/ar231x/board.c
|
||||
@@ -0,0 +1,258 @@
|
||||
@@ -0,0 +1,259 @@
|
||||
+/*
|
||||
+ * This file is subject to the terms and conditions of the GNU General Public
|
||||
+ * License. See the file "COPYING" in the main directory of this archive
|
||||
@ -106,6 +105,7 @@
|
||||
+#include <linux/kernel.h>
|
||||
+#include <linux/random.h>
|
||||
+#include <linux/etherdevice.h>
|
||||
+#include <linux/irq.h>
|
||||
+#include <asm/irq_cpu.h>
|
||||
+#include <asm/reboot.h>
|
||||
+#include <asm/io.h>
|
||||
@ -638,72 +638,21 @@
|
||||
+#endif /* __ASM_MACH_GENERIC_DMA_COHERENCE_H */
|
||||
--- /dev/null
|
||||
+++ b/arch/mips/include/asm/mach-ar231x/gpio.h
|
||||
@@ -0,0 +1,84 @@
|
||||
@@ -0,0 +1,28 @@
|
||||
+#ifndef _ATHEROS_GPIO_H_
|
||||
+#define _ATHEROS_GPIO_H_
|
||||
+
|
||||
+#include <ar231x.h>
|
||||
+
|
||||
+struct ar231x_gpiodev {
|
||||
+ u32 valid_mask;
|
||||
+ u32 (*get_output)(void);
|
||||
+ u32 (*set_output)(u32 mask, u32 val);
|
||||
+ u32 (*get)(void);
|
||||
+ u32 (*set)(u32 mask, u32 val);
|
||||
+};
|
||||
+
|
||||
+extern const struct ar231x_gpiodev *ar231x_gpiodev;
|
||||
+#define gpio_get_value __gpio_get_value
|
||||
+#define gpio_set_value __gpio_set_value
|
||||
+#define gpio_cansleep __gpio_cansleep
|
||||
+
|
||||
+/*
|
||||
+ * Wrappers for the generic GPIO layer
|
||||
+ */
|
||||
+
|
||||
+static inline int gpio_direction_input(unsigned gpio) {
|
||||
+ u32 mask = 1 << gpio;
|
||||
+
|
||||
+ if (!(ar231x_gpiodev->valid_mask & mask))
|
||||
+ return -ENXIO;
|
||||
+
|
||||
+ ar231x_gpiodev->set_output(mask, 0);
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static inline void gpio_set_value(unsigned gpio, int value) {
|
||||
+ u32 mask = 1 << gpio;
|
||||
+
|
||||
+ if (!(ar231x_gpiodev->valid_mask & mask))
|
||||
+ return;
|
||||
+
|
||||
+ ar231x_gpiodev->set(mask, (!!value) * mask);
|
||||
+}
|
||||
+
|
||||
+static inline int gpio_direction_output(unsigned gpio, int value) {
|
||||
+ u32 mask = 1 << gpio;
|
||||
+
|
||||
+ if (!(ar231x_gpiodev->valid_mask & mask))
|
||||
+ return -ENXIO;
|
||||
+
|
||||
+ ar231x_gpiodev->set_output(mask, mask);
|
||||
+ ar231x_gpiodev->set(mask, (!!value) * mask);
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+/* Reads the gpio pin. Unchecked function */
|
||||
+static inline int gpio_get_value(unsigned gpio) {
|
||||
+ u32 mask = 1 << gpio;
|
||||
+
|
||||
+ if (!(ar231x_gpiodev->valid_mask & mask))
|
||||
+ return 0;
|
||||
+
|
||||
+ return !!(ar231x_gpiodev->get() & mask);
|
||||
+}
|
||||
+
|
||||
+static inline int gpio_request(unsigned gpio, const char *label) {
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static inline void gpio_free(unsigned gpio) {
|
||||
+}
|
||||
+/* not sure if these are used? */
|
||||
+
|
||||
+/* Returns IRQ to attach for gpio. Unchecked function */
|
||||
+static inline int gpio_to_irq(unsigned gpio) {
|
||||
@ -715,11 +664,6 @@
|
||||
+ return (irq - (AR531X_GPIO_IRQ(0)));
|
||||
+}
|
||||
+
|
||||
+static inline int gpio_set_debounce(unsigned gpio, unsigned debounce)
|
||||
+{
|
||||
+ return -ENOSYS;
|
||||
+}
|
||||
+
|
||||
+#include <asm-generic/gpio.h> /* cansleep wrappers */
|
||||
+
|
||||
+#endif
|
||||
@ -1580,7 +1524,7 @@
|
||||
+
|
||||
--- /dev/null
|
||||
+++ b/arch/mips/ar231x/ar5312.c
|
||||
@@ -0,0 +1,529 @@
|
||||
@@ -0,0 +1,579 @@
|
||||
+/*
|
||||
+ * This file is subject to the terms and conditions of the GNU General Public
|
||||
+ * License. See the file "COPYING" in the main directory of this archive
|
||||
@ -1590,6 +1534,7 @@
|
||||
+ * Copyright (C) 2006 FON Technology, SL.
|
||||
+ * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
|
||||
+ * Copyright (C) 2006-2009 Felix Fietkau <nbd@openwrt.org>
|
||||
+ * Copyright (C) 2012 Alexandros C. Couloumbis <alex@ozo.com>
|
||||
+ */
|
||||
+
|
||||
+/*
|
||||
@ -1606,12 +1551,12 @@
|
||||
+#include <linux/kernel.h>
|
||||
+#include <linux/reboot.h>
|
||||
+#include <linux/leds.h>
|
||||
+#include <linux/gpio.h>
|
||||
+#include <asm/bootinfo.h>
|
||||
+#include <asm/reboot.h>
|
||||
+#include <asm/time.h>
|
||||
+#include <asm/irq.h>
|
||||
+#include <linux/irq.h>
|
||||
+#include <asm/io.h>
|
||||
+#include <gpio.h>
|
||||
+
|
||||
+#include <ar231x_platform.h>
|
||||
+#include <ar5312_regs.h>
|
||||
@ -1659,42 +1604,30 @@
|
||||
+
|
||||
+/* Enable the specified AR531X_MISC_IRQ interrupt */
|
||||
+static void
|
||||
+ar5312_misc_intr_enable(unsigned int irq)
|
||||
+ar5312_misc_intr_enable(struct irq_data *d)
|
||||
+{
|
||||
+ unsigned int imr;
|
||||
+
|
||||
+ imr = ar231x_read_reg(AR531X_IMR);
|
||||
+ imr |= (1 << (irq - AR531X_MISC_IRQ_BASE - 1));
|
||||
+ imr |= (1 << (d->irq - AR531X_MISC_IRQ_BASE - 1));
|
||||
+ ar231x_write_reg(AR531X_IMR, imr);
|
||||
+}
|
||||
+
|
||||
+/* Disable the specified AR531X_MISC_IRQ interrupt */
|
||||
+static void
|
||||
+ar5312_misc_intr_disable(unsigned int irq)
|
||||
+ar5312_misc_intr_disable(struct irq_data *d)
|
||||
+{
|
||||
+ unsigned int imr;
|
||||
+
|
||||
+ imr = ar231x_read_reg(AR531X_IMR);
|
||||
+ imr &= ~(1 << (irq - AR531X_MISC_IRQ_BASE - 1));
|
||||
+ imr &= ~(1 << (d->irq - AR531X_MISC_IRQ_BASE - 1));
|
||||
+ ar231x_write_reg(AR531X_IMR, imr);
|
||||
+ ar231x_read_reg(AR531X_IMR); /* flush write buffer */
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+ar5312_misc_intr_end(unsigned int irq)
|
||||
+{
|
||||
+ if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
|
||||
+ ar5312_misc_intr_enable(irq);
|
||||
+}
|
||||
+
|
||||
+static struct irq_chip ar5312_misc_intr_controller = {
|
||||
+ .name = "AR5312-MISC",
|
||||
+ .disable = ar5312_misc_intr_disable,
|
||||
+ .ack = ar5312_misc_intr_disable,
|
||||
+ .mask_ack = ar5312_misc_intr_disable,
|
||||
+ .mask = ar5312_misc_intr_disable,
|
||||
+ .unmask = ar5312_misc_intr_enable,
|
||||
+ .end = ar5312_misc_intr_end,
|
||||
+ .irq_mask = ar5312_misc_intr_disable,
|
||||
+ .irq_unmask = ar5312_misc_intr_enable,
|
||||
+};
|
||||
+
|
||||
+
|
||||
@ -1715,14 +1648,12 @@
|
||||
+
|
||||
+static struct irqaction ar5312_ahb_proc_interrupt = {
|
||||
+ .handler = ar5312_ahb_proc_handler,
|
||||
+ .flags = IRQF_DISABLED,
|
||||
+ .name = "ar5312_ahb_proc_interrupt",
|
||||
+};
|
||||
+
|
||||
+
|
||||
+static struct irqaction cascade = {
|
||||
+ .handler = no_action,
|
||||
+ .flags = IRQF_DISABLED,
|
||||
+ .name = "cascade",
|
||||
+};
|
||||
+
|
||||
@ -1736,24 +1667,13 @@
|
||||
+ ar231x_irq_dispatch = ar5312_irq_dispatch;
|
||||
+ for (i = 0; i < AR531X_MISC_IRQ_COUNT; i++) {
|
||||
+ int irq = AR531X_MISC_IRQ_BASE + i;
|
||||
+ set_irq_chip_and_handler(irq, &ar5312_misc_intr_controller,
|
||||
+ irq_set_chip_and_handler(irq, &ar5312_misc_intr_controller,
|
||||
+ handle_level_irq);
|
||||
+ }
|
||||
+ setup_irq(AR531X_MISC_IRQ_AHB_PROC, &ar5312_ahb_proc_interrupt);
|
||||
+ setup_irq(AR5312_IRQ_MISC_INTRS, &cascade);
|
||||
+}
|
||||
+
|
||||
+const struct ar231x_gpiodev ar5312_gpiodev;
|
||||
+
|
||||
+static u32
|
||||
+ar5312_gpio_get_output(void)
|
||||
+{
|
||||
+ u32 reg;
|
||||
+ reg = ~(ar231x_read_reg(AR531X_GPIO_CR));
|
||||
+ reg &= ar5312_gpiodev.valid_mask;
|
||||
+ return reg;
|
||||
+}
|
||||
+
|
||||
+static u32
|
||||
+ar5312_gpio_set_output(u32 mask, u32 val)
|
||||
+{
|
||||
@ -1767,11 +1687,11 @@
|
||||
+}
|
||||
+
|
||||
+static u32
|
||||
+ar5312_gpio_get(void)
|
||||
+ar5312_gpio_get(u32 valid_mask)
|
||||
+{
|
||||
+ u32 reg;
|
||||
+ reg = ar231x_read_reg(AR531X_GPIO_DI);
|
||||
+ reg &= ar5312_gpiodev.valid_mask;
|
||||
+ reg &= valid_mask;
|
||||
+ return reg;
|
||||
+}
|
||||
+
|
||||
@ -1786,14 +1706,72 @@
|
||||
+ return reg;
|
||||
+}
|
||||
+
|
||||
+const struct ar231x_gpiodev ar5312_gpiodev = {
|
||||
+ .valid_mask = (1 << 8) - 1,
|
||||
+ .get_output = ar5312_gpio_get_output,
|
||||
+ .set_output = ar5312_gpio_set_output,
|
||||
+ .get = ar5312_gpio_get,
|
||||
+ .set = ar5312_gpio_set,
|
||||
+/*
|
||||
+ * gpiolib implementations. Original mask based methods preserved
|
||||
+ */
|
||||
+static int
|
||||
+ar5312_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
|
||||
+{
|
||||
+ struct ar231x_gpio_chip *gpch =
|
||||
+ container_of(chip, struct ar231x_gpio_chip, chip);
|
||||
+ u32 mask = 1 << gpio;
|
||||
+ u32 rett;
|
||||
+ if (!(gpch->valid_mask & mask))
|
||||
+ return 0;
|
||||
+ rett = ar5312_gpio_get(gpch->valid_mask);
|
||||
+ return !!(rett & mask);
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+ar5312_gpio_set_value(struct gpio_chip *chip, unsigned gpio, int value)
|
||||
+{
|
||||
+ struct ar231x_gpio_chip *gpch =
|
||||
+ container_of(chip, struct ar231x_gpio_chip, chip);
|
||||
+ u32 mask = 1 << gpio;
|
||||
+ if (!(gpch->valid_mask & mask))
|
||||
+ return;
|
||||
+ ar5312_gpio_set(mask, (!!value) * mask);
|
||||
+}
|
||||
+
|
||||
+static int
|
||||
+ar5312_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
|
||||
+{
|
||||
+ struct ar231x_gpio_chip *gpch =
|
||||
+ container_of(chip, struct ar231x_gpio_chip, chip);
|
||||
+ u32 mask = 1 << gpio;
|
||||
+ if (!(gpch->valid_mask & mask))
|
||||
+ return -ENXIO;
|
||||
+ ar5312_gpio_set_output(mask, 0);
|
||||
+ return 0;
|
||||
+}
|
||||
+static int
|
||||
+ar5312_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, int value)
|
||||
+{
|
||||
+ struct ar231x_gpio_chip *gpch =
|
||||
+ container_of(chip, struct ar231x_gpio_chip, chip);
|
||||
+ u32 mask = 1 << gpio;
|
||||
+ if (!(gpch->valid_mask & mask))
|
||||
+ return -ENXIO;
|
||||
+ ar5312_gpio_set_output(mask, mask);
|
||||
+ ar5312_gpio_set(mask, (!!value) * mask);
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static struct ar231x_gpio_chip ar5312_gpio_chip = {
|
||||
+ .valid_mask = (1 << 22) - 1,
|
||||
+ .chip = {
|
||||
+ .label = "ar5312-gpio",
|
||||
+ .direction_input = ar5312_gpio_direction_input,
|
||||
+ .direction_output = ar5312_gpio_direction_output,
|
||||
+ .set = ar5312_gpio_set_value,
|
||||
+ .get = ar5312_gpio_get_value,
|
||||
+ .base = 0,
|
||||
+ .ngpio = AR531X_GPIO_IRQ_COUNT, // 22
|
||||
+ }
|
||||
+};
|
||||
+
|
||||
+// end of gpiolib
|
||||
+
|
||||
+static struct physmap_flash_data ar5312_flash_data = {
|
||||
+ .width = 2,
|
||||
+};
|
||||
@ -2069,6 +2047,22 @@
|
||||
+ mips_hpt_frequency = ar5312_cpu_frequency() / 2;
|
||||
+}
|
||||
+
|
||||
+int __init
|
||||
+ar5312_gpio_init(void)
|
||||
+{
|
||||
+ int ret;
|
||||
+ struct ar231x_gpio_chip *gpch;
|
||||
+ gpch = &ar5312_gpio_chip;
|
||||
+ ret = gpiochip_add(&gpch->chip);
|
||||
+ if (ret) {
|
||||
+ printk(KERN_ERR "%s: failed to add gpiochip\n",
|
||||
+ gpch->chip.label);
|
||||
+ return ret;
|
||||
+ }
|
||||
+ printk(KERN_INFO "%s: registered %d GPIOs\n",
|
||||
+ gpch->chip.label, gpch->chip.ngpio);
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+void __init
|
||||
+ar5312_prom_init(void)
|
||||
@ -2092,7 +2086,7 @@
|
||||
+ devid >>= AR531X_REV_WMAC_MIN_S;
|
||||
+ devid &= AR531X_REV_CHIP;
|
||||
+ ar231x_board.devid = (u16) devid;
|
||||
+ ar231x_gpiodev = &ar5312_gpiodev;
|
||||
+ ar5312_gpio_init();
|
||||
+}
|
||||
+
|
||||
+void __init
|
||||
@ -2112,7 +2106,7 @@
|
||||
+
|
||||
--- /dev/null
|
||||
+++ b/arch/mips/ar231x/ar2315.c
|
||||
@@ -0,0 +1,658 @@
|
||||
@@ -0,0 +1,694 @@
|
||||
+/*
|
||||
+ * This file is subject to the terms and conditions of the GNU General Public
|
||||
+ * License. See the file "COPYING" in the main directory of this archive
|
||||
@ -2122,6 +2116,7 @@
|
||||
+ * Copyright (C) 2006 FON Technology, SL.
|
||||
+ * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
|
||||
+ * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
|
||||
+ * Copyright (C) 2012 Alexandros C. Couloumbis <alex@ozo.com>
|
||||
+ */
|
||||
+
|
||||
+/*
|
||||
@ -2138,12 +2133,12 @@
|
||||
+#include <linux/reboot.h>
|
||||
+#include <linux/delay.h>
|
||||
+#include <linux/leds.h>
|
||||
+#include <linux/gpio.h>
|
||||
+#include <asm/bootinfo.h>
|
||||
+#include <asm/reboot.h>
|
||||
+#include <asm/time.h>
|
||||
+#include <asm/irq.h>
|
||||
+#include <linux/irq.h>
|
||||
+#include <asm/io.h>
|
||||
+#include <asm/gpio.h>
|
||||
+
|
||||
+#include <ar231x_platform.h>
|
||||
+#include <ar2315_regs.h>
|
||||
@ -2227,9 +2222,9 @@
|
||||
+ ar231x_write_reg(AR2315_GPIO_INT, reg);
|
||||
+}
|
||||
+
|
||||
+static void ar2315_gpio_intr_enable(unsigned int irq)
|
||||
+static void ar2315_gpio_intr_enable(struct irq_data *d)
|
||||
+{
|
||||
+ unsigned int gpio = irq - AR531X_GPIO_IRQ_BASE;
|
||||
+ unsigned int gpio = d->irq - AR531X_GPIO_IRQ_BASE;
|
||||
+
|
||||
+ /* Enable interrupt with edge detection */
|
||||
+ if ((ar231x_read_reg(AR2315_GPIO_CR) & AR2315_GPIO_CR_M(gpio)) != AR2315_GPIO_CR_I(gpio))
|
||||
@ -2239,49 +2234,27 @@
|
||||
+ ar2315_set_gpiointmask(gpio, 3);
|
||||
+}
|
||||
+
|
||||
+static unsigned int ar2315_gpio_intr_startup(unsigned int irq)
|
||||
+static void ar2315_gpio_intr_disable(struct irq_data *d)
|
||||
+{
|
||||
+ unsigned int gpio = irq - AR531X_GPIO_IRQ_BASE;
|
||||
+
|
||||
+ /* reconfigure GPIO line as input */
|
||||
+ ar231x_mask_reg(AR2315_GPIO_CR, AR2315_GPIO_CR_M(gpio), AR2315_GPIO_CR_I(gpio));
|
||||
+ ar2315_gpio_intr_enable(irq);
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static void ar2315_gpio_intr_disable(unsigned int irq)
|
||||
+{
|
||||
+ unsigned int gpio = irq - AR531X_GPIO_IRQ_BASE;
|
||||
+ unsigned int gpio = d->irq - AR531X_GPIO_IRQ_BASE;
|
||||
+
|
||||
+ /* Disable interrupt */
|
||||
+ gpiointmask &= ~(1 << gpio);
|
||||
+ ar2315_set_gpiointmask(gpio, 0);
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+ar2315_gpio_intr_end(unsigned int irq)
|
||||
+{
|
||||
+ if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
|
||||
+ ar2315_gpio_intr_enable(irq);
|
||||
+}
|
||||
+
|
||||
+static struct irq_chip ar2315_gpio_intr_controller = {
|
||||
+ .name = "AR2315-GPIO",
|
||||
+ .startup = ar2315_gpio_intr_startup,
|
||||
+ .ack = ar2315_gpio_intr_disable,
|
||||
+ .mask_ack = ar2315_gpio_intr_disable,
|
||||
+ .mask = ar2315_gpio_intr_disable,
|
||||
+ .unmask = ar2315_gpio_intr_enable,
|
||||
+ .end = ar2315_gpio_intr_end,
|
||||
+ .irq_mask = ar2315_gpio_intr_disable,
|
||||
+ .irq_unmask = ar2315_gpio_intr_enable,
|
||||
+};
|
||||
+
|
||||
+static void
|
||||
+ar2315_misc_intr_enable(unsigned int irq)
|
||||
+ar2315_misc_intr_enable(struct irq_data *d)
|
||||
+{
|
||||
+ unsigned int imr;
|
||||
+
|
||||
+ imr = ar231x_read_reg(AR2315_IMR);
|
||||
+ switch(irq) {
|
||||
+ switch(d->irq) {
|
||||
+ case AR531X_MISC_IRQ_SPI:
|
||||
+ imr |= AR2315_ISR_SPI;
|
||||
+ break;
|
||||
@ -2307,12 +2280,12 @@
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+ar2315_misc_intr_disable(unsigned int irq)
|
||||
+ar2315_misc_intr_disable(struct irq_data *d)
|
||||
+{
|
||||
+ unsigned int imr;
|
||||
+
|
||||
+ imr = ar231x_read_reg(AR2315_IMR);
|
||||
+ switch(irq) {
|
||||
+ switch(d->irq) {
|
||||
+ case AR531X_MISC_IRQ_SPI:
|
||||
+ imr &= ~AR2315_ISR_SPI;
|
||||
+ break;
|
||||
@ -2337,21 +2310,9 @@
|
||||
+ ar231x_write_reg(AR2315_IMR, imr);
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+ar2315_misc_intr_end(unsigned int irq)
|
||||
+{
|
||||
+ if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
|
||||
+ ar2315_misc_intr_enable(irq);
|
||||
+}
|
||||
+
|
||||
+
|
||||
+static struct irq_chip ar2315_misc_intr_controller = {
|
||||
+ .name = "AR2315-MISC",
|
||||
+ .ack = ar2315_misc_intr_disable,
|
||||
+ .mask_ack = ar2315_misc_intr_disable,
|
||||
+ .mask = ar2315_misc_intr_disable,
|
||||
+ .unmask = ar2315_misc_intr_enable,
|
||||
+ .end = ar2315_misc_intr_end,
|
||||
+ .irq_mask = ar2315_misc_intr_disable,
|
||||
+ .irq_unmask = ar2315_misc_intr_enable,
|
||||
+};
|
||||
+
|
||||
+static irqreturn_t ar2315_ahb_proc_handler(int cpl, void *dev_id)
|
||||
@ -2367,13 +2328,11 @@
|
||||
+
|
||||
+static struct irqaction ar2315_ahb_proc_interrupt = {
|
||||
+ .handler = ar2315_ahb_proc_handler,
|
||||
+ .flags = IRQF_DISABLED,
|
||||
+ .name = "ar2315_ahb_proc_interrupt",
|
||||
+};
|
||||
+
|
||||
+static struct irqaction cascade = {
|
||||
+ .handler = no_action,
|
||||
+ .flags = IRQF_DISABLED,
|
||||
+ .name = "cascade",
|
||||
+};
|
||||
+
|
||||
@ -2389,12 +2348,12 @@
|
||||
+ gpiointval = ar231x_read_reg(AR2315_GPIO_DI);
|
||||
+ for (i = 0; i < AR531X_MISC_IRQ_COUNT; i++) {
|
||||
+ int irq = AR531X_MISC_IRQ_BASE + i;
|
||||
+ set_irq_chip_and_handler(irq, &ar2315_misc_intr_controller,
|
||||
+ irq_set_chip_and_handler(irq, &ar2315_misc_intr_controller,
|
||||
+ handle_level_irq);
|
||||
+ }
|
||||
+ for (i = 0; i < AR531X_GPIO_IRQ_COUNT; i++) {
|
||||
+ int irq = AR531X_GPIO_IRQ_BASE + i;
|
||||
+ set_irq_chip_and_handler(irq, &ar2315_gpio_intr_controller,
|
||||
+ irq_set_chip_and_handler(irq, &ar2315_gpio_intr_controller,
|
||||
+ handle_level_irq);
|
||||
+ }
|
||||
+ setup_irq(AR531X_MISC_IRQ_GPIO, &cascade);
|
||||
@ -2402,17 +2361,6 @@
|
||||
+ setup_irq(AR2315_IRQ_MISC_INTRS, &cascade);
|
||||
+}
|
||||
+
|
||||
+const struct ar231x_gpiodev ar2315_gpiodev;
|
||||
+
|
||||
+static u32
|
||||
+ar2315_gpio_get_output(void)
|
||||
+{
|
||||
+ u32 reg;
|
||||
+ reg = ar231x_read_reg(AR2315_GPIO_CR);
|
||||
+ reg &= ar2315_gpiodev.valid_mask;
|
||||
+ return reg;
|
||||
+}
|
||||
+
|
||||
+static u32
|
||||
+ar2315_gpio_set_output(u32 mask, u32 val)
|
||||
+{
|
||||
@ -2426,11 +2374,11 @@
|
||||
+}
|
||||
+
|
||||
+static u32
|
||||
+ar2315_gpio_get(void)
|
||||
+ar2315_gpio_get(u32 valid_mask)
|
||||
+{
|
||||
+ u32 reg;
|
||||
+ reg = ar231x_read_reg(AR2315_GPIO_DI);
|
||||
+ reg &= ar2315_gpiodev.valid_mask;
|
||||
+ reg &= valid_mask;
|
||||
+ return reg;
|
||||
+}
|
||||
+
|
||||
@ -2445,14 +2393,75 @@
|
||||
+ return reg;
|
||||
+}
|
||||
+
|
||||
+const struct ar231x_gpiodev ar2315_gpiodev = {
|
||||
+/*
|
||||
+ * gpiolib implementation. Original legacy mask based methods
|
||||
+ * preserved for now.
|
||||
+ */
|
||||
+static int
|
||||
+ar2315_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
|
||||
+{
|
||||
+ struct ar231x_gpio_chip *gpch =
|
||||
+ container_of(chip, struct ar231x_gpio_chip, chip);
|
||||
+ u32 mask = 1 << gpio;
|
||||
+ u32 rett;
|
||||
+ if (!(gpch->valid_mask & mask))
|
||||
+ return 0;
|
||||
+ rett = ar2315_gpio_get(gpch->valid_mask); // legacy code
|
||||
+ return !!(rett & mask);
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+ar2315_gpio_set_value(struct gpio_chip *chip, unsigned gpio, int value)
|
||||
+{
|
||||
+ struct ar231x_gpio_chip *gpch =
|
||||
+ container_of(chip, struct ar231x_gpio_chip, chip);
|
||||
+ u32 mask = 1 << gpio;
|
||||
+ if (!(gpch->valid_mask & mask))
|
||||
+ return;
|
||||
+ ar2315_gpio_set(mask, (!!value) * mask); // legacy
|
||||
+}
|
||||
+
|
||||
+static int
|
||||
+ar2315_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
|
||||
+{
|
||||
+ struct ar231x_gpio_chip *gpch =
|
||||
+ container_of(chip, struct ar231x_gpio_chip, chip);
|
||||
+ u32 mask = 1 << gpio;
|
||||
+ if (!(gpch->valid_mask & mask))
|
||||
+ return -ENXIO;
|
||||
+ ar2315_gpio_set_output(mask, 0); // legacy
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int
|
||||
+ar2315_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, int value)
|
||||
+{
|
||||
+ struct ar231x_gpio_chip *gpch =
|
||||
+ container_of(chip, struct ar231x_gpio_chip, chip);
|
||||
+ u32 mask = 1 << gpio;
|
||||
+ if (!(gpch->valid_mask & mask))
|
||||
+ return -ENXIO;
|
||||
+ ar2315_gpio_set_output(mask, mask); // both legacy
|
||||
+ ar2315_gpio_set(mask, (!!value) * mask);
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static struct ar231x_gpio_chip ar2315_gpio_chip = {
|
||||
+ .valid_mask = (1 << 22) - 1,
|
||||
+ .get_output = ar2315_gpio_get_output,
|
||||
+ .set_output = ar2315_gpio_set_output,
|
||||
+ .get = ar2315_gpio_get,
|
||||
+ .set = ar2315_gpio_set,
|
||||
+ .chip = {
|
||||
+ .label = "ar2315-gpio",
|
||||
+ .direction_input = ar2315_gpio_direction_input,
|
||||
+ .direction_output = ar2315_gpio_direction_output,
|
||||
+ .set = ar2315_gpio_set_value,
|
||||
+ .get = ar2315_gpio_get_value,
|
||||
+ .base = 0,
|
||||
+ .ngpio = AR531X_GPIO_IRQ_COUNT, // 22
|
||||
+ }
|
||||
+};
|
||||
+
|
||||
+// end of gpiolib
|
||||
+
|
||||
+
|
||||
+static struct ar231x_eth ar2315_eth_data = {
|
||||
+ .reset_base = AR2315_RESET,
|
||||
+ .reset_mac = AR2315_RESET_ENET0,
|
||||
@ -2586,7 +2595,7 @@
|
||||
+};
|
||||
+
|
||||
+static void __init
|
||||
+ar2315_init_gpio(void)
|
||||
+ar2315_init_gpio_leds(void)
|
||||
+{
|
||||
+ static char led_names[6][6];
|
||||
+ int i, led = 0;
|
||||
@ -2612,7 +2621,7 @@
|
||||
+ platform_device_register(&ar2315_gpio_leds);
|
||||
+}
|
||||
+#else
|
||||
+static inline void ar2315_init_gpio(void)
|
||||
+static inline void ar2315_init_gpio_leds(void)
|
||||
+{
|
||||
+}
|
||||
+#endif
|
||||
@ -2627,7 +2636,7 @@
|
||||
+ ar231x_find_config(ar2315_flash_limit());
|
||||
+ ar2315_eth_data.macaddr = ar231x_board.config->enet0_mac;
|
||||
+
|
||||
+ ar2315_init_gpio();
|
||||
+ ar2315_init_gpio_leds();
|
||||
+ platform_device_register(&ar2315_wdt);
|
||||
+ platform_device_register(&ar2315_spiflash);
|
||||
+ ar231x_add_ethernet(0, KSEG1ADDR(AR2315_ENET0), AR2315_IRQ_ENET0_INTRS,
|
||||
@ -2723,6 +2732,25 @@
|
||||
+ mips_hpt_frequency = ar2315_cpu_frequency() / 2;
|
||||
+}
|
||||
+
|
||||
+int __init
|
||||
+ar2315_gpio_init(void)
|
||||
+{
|
||||
+ int ret;
|
||||
+ struct ar231x_gpio_chip *gpch;
|
||||
+ gpch = &ar2315_gpio_chip;
|
||||
+ ret = gpiochip_add(&gpch->chip);
|
||||
+ if (ret) {
|
||||
+ printk(KERN_ERR "%s: failed to add gpiochip\n",
|
||||
+ gpch->chip.label);
|
||||
+ return ret;
|
||||
+ }
|
||||
+ printk(KERN_INFO "%s: registered %d GPIOs\n",
|
||||
+ gpch->chip.label, gpch->chip.ngpio);
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+
|
||||
+
|
||||
+void __init
|
||||
+ar2315_prom_init(void)
|
||||
+{
|
||||
@ -2749,7 +2777,7 @@
|
||||
+ ar231x_devtype = DEV_TYPE_AR2315;
|
||||
+ break;
|
||||
+ }
|
||||
+ ar231x_gpiodev = &ar2315_gpiodev;
|
||||
+ ar2315_gpio_init();
|
||||
+ ar231x_board.devid = devid;
|
||||
+}
|
||||
+
|
||||
@ -2761,6 +2789,8 @@
|
||||
+ if (!is_2315())
|
||||
+ return;
|
||||
+
|
||||
+ gpio_request(AR2315_RESET_GPIO, "reset");
|
||||
+
|
||||
+ /* Clear any lingering AHB errors */
|
||||
+ config = read_c0_config();
|
||||
+ write_c0_config(config & ~0x3);
|
||||
@ -2911,9 +2941,10 @@
|
||||
+#endif
|
||||
--- /dev/null
|
||||
+++ b/arch/mips/ar231x/devices.h
|
||||
@@ -0,0 +1,37 @@
|
||||
@@ -0,0 +1,42 @@
|
||||
+#ifndef __AR231X_DEVICES_H
|
||||
+#define __AR231X_DEVICES_H
|
||||
+#include <linux/gpio.h>
|
||||
+
|
||||
+enum {
|
||||
+ /* handled by ar5312.c */
|
||||
@ -2948,10 +2979,14 @@
|
||||
+ return !is_2315();
|
||||
+}
|
||||
+
|
||||
+struct ar231x_gpio_chip {
|
||||
+ u32 valid_mask;
|
||||
+ struct gpio_chip chip;
|
||||
+};
|
||||
+#endif
|
||||
--- /dev/null
|
||||
+++ b/arch/mips/ar231x/devices.c
|
||||
@@ -0,0 +1,175 @@
|
||||
@@ -0,0 +1,173 @@
|
||||
+#include <linux/kernel.h>
|
||||
+#include <linux/init.h>
|
||||
+#include <linux/serial.h>
|
||||
@ -2966,8 +3001,6 @@
|
||||
+
|
||||
+struct ar231x_board_config ar231x_board;
|
||||
+int ar231x_devtype = DEV_TYPE_UNKNOWN;
|
||||
+const struct ar231x_gpiodev *ar231x_gpiodev;
|
||||
+EXPORT_SYMBOL(ar231x_gpiodev);
|
||||
+
|
||||
+static struct resource ar231x_eth0_res[] = {
|
||||
+ {
|
||||
@ -61,7 +61,7 @@
|
||||
@@ -130,6 +130,7 @@ config ATHEROS_AR231X
|
||||
select SYS_SUPPORTS_BIG_ENDIAN
|
||||
select SYS_SUPPORTS_32BIT_KERNEL
|
||||
select GENERIC_GPIO
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
+ select SYS_HAS_EARLY_PRINTK
|
||||
help
|
||||
Support for AR231x and AR531x based boards
|
||||
@ -240,9 +240,9 @@
|
||||
+arch_initcall(ar2315_pci_init);
|
||||
--- a/arch/mips/ar231x/Kconfig
|
||||
+++ b/arch/mips/ar231x/Kconfig
|
||||
@@ -15,3 +15,13 @@ config ATHEROS_AR2315
|
||||
@@ -14,3 +14,10 @@ config ATHEROS_AR2315
|
||||
select SYS_SUPPORTS_32BIT_KERNEL
|
||||
select SYS_SUPPORTS_BIG_ENDIAN
|
||||
select GENERIC_GPIO
|
||||
default y
|
||||
+
|
||||
+config ATHEROS_AR2315_PCI
|
||||
@ -250,13 +250,10 @@
|
||||
+ depends on ATHEROS_AR2315
|
||||
+ select HW_HAS_PCI
|
||||
+ select PCI
|
||||
+ select USB_ARCH_HAS_HCD
|
||||
+ select USB_ARCH_HAS_OHCI
|
||||
+ select USB_ARCH_HAS_EHCI
|
||||
+ default y
|
||||
--- a/arch/mips/ar231x/ar2315.c
|
||||
+++ b/arch/mips/ar231x/ar2315.c
|
||||
@@ -63,6 +63,27 @@ static inline void ar2315_gpio_irq(void)
|
||||
@@ -64,6 +64,27 @@ static inline void ar2315_gpio_irq(void)
|
||||
do_IRQ(AR531X_GPIO_IRQ_BASE + bit);
|
||||
}
|
||||
|
||||
@ -284,7 +281,7 @@
|
||||
|
||||
/*
|
||||
* Called when an interrupt is received, this function
|
||||
@@ -81,6 +102,10 @@ ar2315_irq_dispatch(void)
|
||||
@@ -82,6 +103,10 @@ ar2315_irq_dispatch(void)
|
||||
do_IRQ(AR2315_IRQ_WLAN0_INTRS);
|
||||
else if (pending & CAUSEF_IP4)
|
||||
do_IRQ(AR2315_IRQ_ENET0_INTRS);
|
||||
@ -1,31 +1,38 @@
|
||||
--- a/drivers/net/Kconfig
|
||||
+++ b/drivers/net/Kconfig
|
||||
@@ -251,6 +251,12 @@ config AX88796_93CX6
|
||||
help
|
||||
Select this if your platform comes with an external 93CX6 eeprom.
|
||||
|
||||
+config AR231X_ETHERNET
|
||||
+ tristate "AR231x Ethernet support"
|
||||
--- a/drivers/net/ethernet/Kconfig
|
||||
+++ b/drivers/net/ethernet/Kconfig
|
||||
@@ -22,6 +22,7 @@ source "drivers/net/ethernet/adaptec/Kco
|
||||
source "drivers/net/ethernet/aeroflex/Kconfig"
|
||||
source "drivers/net/ethernet/alteon/Kconfig"
|
||||
source "drivers/net/ethernet/amd/Kconfig"
|
||||
+source "drivers/net/ethernet/ar231x/Kconfig"
|
||||
source "drivers/net/ethernet/apple/Kconfig"
|
||||
source "drivers/net/ethernet/atheros/Kconfig"
|
||||
source "drivers/net/ethernet/cadence/Kconfig"
|
||||
--- a/drivers/net/ethernet/Makefile
|
||||
+++ b/drivers/net/ethernet/Makefile
|
||||
@@ -9,6 +9,7 @@ obj-$(CONFIG_GRETH) += aeroflex/
|
||||
obj-$(CONFIG_NET_VENDOR_ALTEON) += alteon/
|
||||
obj-$(CONFIG_NET_VENDOR_AMD) += amd/
|
||||
obj-$(CONFIG_NET_VENDOR_APPLE) += apple/
|
||||
+obj-$(CONFIG_NET_VENDOR_AR231X) += ar231x/
|
||||
obj-$(CONFIG_NET_VENDOR_ATHEROS) += atheros/
|
||||
obj-$(CONFIG_NET_CADENCE) += cadence/
|
||||
obj-$(CONFIG_NET_BFIN) += adi/
|
||||
--- /dev/null
|
||||
+++ b/drivers/net/ethernet/ar231x/Kconfig
|
||||
@@ -0,0 +1,5 @@
|
||||
+config NET_VENDOR_AR231X
|
||||
+ tristate "AR231X Ethernet support"
|
||||
+ depends on ATHEROS_AR231X
|
||||
+ help
|
||||
+ Support for the AR231x/531x ethernet controller
|
||||
+
|
||||
config MACE
|
||||
tristate "MACE (Power Mac ethernet) support"
|
||||
depends on PPC_PMAC && PPC32
|
||||
--- a/drivers/net/Makefile
|
||||
+++ b/drivers/net/Makefile
|
||||
@@ -224,6 +224,7 @@ obj-$(CONFIG_EQUALIZER) += eql.o
|
||||
obj-$(CONFIG_KORINA) += korina.o
|
||||
obj-$(CONFIG_MIPS_JAZZ_SONIC) += jazzsonic.o
|
||||
obj-$(CONFIG_MIPS_AU1X00_ENET) += au1000_eth.o
|
||||
+obj-$(CONFIG_AR231X_ETHERNET) += ar231x.o
|
||||
obj-$(CONFIG_MIPS_SIM_NET) += mipsnet.o
|
||||
obj-$(CONFIG_SGI_IOC3_ETH) += ioc3-eth.o
|
||||
obj-$(CONFIG_DECLANCE) += declance.o
|
||||
--- /dev/null
|
||||
+++ b/drivers/net/ar231x.c
|
||||
@@ -0,0 +1,1293 @@
|
||||
+++ b/drivers/net/ethernet/ar231x/Makefile
|
||||
@@ -0,0 +1 @@
|
||||
+obj-$(CONFIG_NET_VENDOR_AR231X) += ar231x.o
|
||||
--- /dev/null
|
||||
+++ b/drivers/net/ethernet/ar231x/ar231x.c
|
||||
@@ -0,0 +1,1282 @@
|
||||
+/*
|
||||
+ * ar231x.c: Linux driver for the Atheros AR231x Ethernet device.
|
||||
+ *
|
||||
@ -54,6 +61,8 @@
|
||||
+#include <linux/pci.h>
|
||||
+#include <linux/netdevice.h>
|
||||
+#include <linux/etherdevice.h>
|
||||
+#include <linux/interrupt.h>
|
||||
+#include <linux/hardirq.h>
|
||||
+#include <linux/skbuff.h>
|
||||
+#include <linux/init.h>
|
||||
+#include <linux/delay.h>
|
||||
@ -209,7 +218,7 @@
|
||||
+#endif
|
||||
+};
|
||||
+
|
||||
+int __init ar231x_probe(struct platform_device *pdev)
|
||||
+int __devinit ar231x_probe(struct platform_device *pdev)
|
||||
+{
|
||||
+ struct net_device *dev;
|
||||
+ struct ar231x_private *sp;
|
||||
@ -415,19 +424,7 @@
|
||||
+ .remove = __devexit_p(ar231x_remove),
|
||||
+};
|
||||
+
|
||||
+int __init ar231x_module_init(void)
|
||||
+{
|
||||
+ return platform_driver_register(&ar231x_driver);
|
||||
+}
|
||||
+
|
||||
+void __exit ar231x_module_cleanup(void)
|
||||
+{
|
||||
+ platform_driver_unregister(&ar231x_driver);
|
||||
+}
|
||||
+
|
||||
+module_init(ar231x_module_init);
|
||||
+module_exit(ar231x_module_cleanup);
|
||||
+
|
||||
+module_platform_driver(ar231x_driver);
|
||||
+
|
||||
+static void ar231x_free_descriptors(struct net_device *dev)
|
||||
+{
|
||||
@ -1171,7 +1168,6 @@
|
||||
+
|
||||
+static int ar231x_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
|
||||
+{
|
||||
+ struct mii_ioctl_data *data = (struct mii_ioctl_data *) &ifr->ifr_data;
|
||||
+ struct ar231x_private *sp = netdev_priv(dev);
|
||||
+ int ret;
|
||||
+
|
||||
@ -1320,8 +1316,8 @@
|
||||
+}
|
||||
+
|
||||
--- /dev/null
|
||||
+++ b/drivers/net/ar231x.h
|
||||
@@ -0,0 +1,302 @@
|
||||
+++ b/drivers/net/ethernet/ar231x/ar231x.h
|
||||
@@ -0,0 +1,303 @@
|
||||
+/*
|
||||
+ * ar231x.h: Linux driver for the Atheros AR231x Ethernet device.
|
||||
+ *
|
||||
@ -1341,6 +1337,7 @@
|
||||
+#ifndef _AR2313_H_
|
||||
+#define _AR2313_H_
|
||||
+
|
||||
+#include <linux/interrupt.h>
|
||||
+#include <generated/autoconf.h>
|
||||
+#include <linux/bitops.h>
|
||||
+#include <asm/bootinfo.h>
|
||||
@ -1,6 +1,6 @@
|
||||
--- a/drivers/mtd/devices/Kconfig
|
||||
+++ b/drivers/mtd/devices/Kconfig
|
||||
@@ -112,6 +112,10 @@ config MTD_SST25L
|
||||
@@ -120,6 +120,10 @@ config MTD_SST25L
|
||||
Set up your spi devices with the right board-specific platform data,
|
||||
if you want to specify device partitioning.
|
||||
|
||||
@ -13,14 +13,18 @@
|
||||
help
|
||||
--- a/drivers/mtd/devices/Makefile
|
||||
+++ b/drivers/mtd/devices/Makefile
|
||||
@@ -17,3 +17,4 @@ obj-$(CONFIG_MTD_BLOCK2MTD) += block2mtd
|
||||
@@ -18,5 +18,6 @@ obj-$(CONFIG_MTD_BLOCK2MTD) += block2mtd
|
||||
obj-$(CONFIG_MTD_DATAFLASH) += mtd_dataflash.o
|
||||
obj-$(CONFIG_MTD_M25P80) += m25p80.o
|
||||
obj-$(CONFIG_MTD_SST25L) += sst25l.o
|
||||
+obj-$(CONFIG_MTD_AR2315) += ar2315.o
|
||||
|
||||
-CFLAGS_docg3.o += -I$(src)
|
||||
\ No newline at end of file
|
||||
+CFLAGS_docg3.o += -I$(src)
|
||||
--- /dev/null
|
||||
+++ b/drivers/mtd/devices/ar2315.c
|
||||
@@ -0,0 +1,517 @@
|
||||
@@ -0,0 +1,515 @@
|
||||
+
|
||||
+/*
|
||||
+ * MTD driver for the SPI Flash Memory support on Atheros AR2315
|
||||
@ -29,6 +33,7 @@
|
||||
+ * Copyright (C) 2006-2007 FON Technology, SL.
|
||||
+ * Copyright (C) 2006-2007 Imre Kaloz <kaloz@openwrt.org>
|
||||
+ * Copyright (C) 2006-2009 Felix Fietkau <nbd@openwrt.org>
|
||||
+ * Copyright (C) 2012 Alexandros C. Couloumbis <alex@ozo.com>
|
||||
+ *
|
||||
+ * This code is free software; you can redistribute it and/or modify
|
||||
+ * it under the terms of the GNU General Public License version 2 as
|
||||
@ -429,7 +434,7 @@
|
||||
+}
|
||||
+
|
||||
+
|
||||
+#ifdef CONFIG_MTD_PARTITIONS
|
||||
+#if defined CONFIG_MTD_REDBOOT_PARTS || CONFIG_MTD_MYLOADER_PARTS
|
||||
+static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", "MyLoader", NULL };
|
||||
+#endif
|
||||
+
|
||||
@ -438,9 +443,8 @@
|
||||
+spiflash_probe(struct platform_device *pdev)
|
||||
+{
|
||||
+ struct spiflash_priv *priv;
|
||||
+ struct mtd_partition *parts;
|
||||
+ struct mtd_info *mtd;
|
||||
+ int index, num_parts;
|
||||
+ int index;
|
||||
+ int result = 0;
|
||||
+
|
||||
+ priv = kzalloc(sizeof(struct spiflash_priv), GFP_KERNEL);
|
||||
@ -481,13 +485,11 @@
|
||||
+ mtd->write = spiflash_write;
|
||||
+ mtd->owner = THIS_MODULE;
|
||||
+
|
||||
+#ifdef CONFIG_MTD_PARTITIONS
|
||||
+#if defined CONFIG_MTD_REDBOOT_PARTS || CONFIG_MTD_MYLOADER_PARTS
|
||||
+ /* parse redboot partitions */
|
||||
+ num_parts = parse_mtd_partitions(mtd, part_probe_types, &parts, 0);
|
||||
+ if (!num_parts)
|
||||
+ goto error;
|
||||
+
|
||||
+ result = add_mtd_partitions(mtd, parts, num_parts);
|
||||
+ result = mtd_device_parse_register(mtd, part_probe_types,
|
||||
+ NULL, NULL, 0);
|
||||
+#endif
|
||||
+
|
||||
+ return result;
|
||||
@ -505,7 +507,7 @@
|
||||
+ struct spiflash_priv *priv = platform_get_drvdata(pdev);
|
||||
+ struct mtd_info *mtd = &priv->mtd;
|
||||
+
|
||||
+ del_mtd_partitions(mtd);
|
||||
+ mtd_device_unregister(mtd);
|
||||
+ iounmap(priv->mmraddr);
|
||||
+ iounmap(priv->readaddr);
|
||||
+ kfree(priv);
|
||||
@ -100,8 +100,8 @@
|
||||
+ .identity = "ar2315 Watchdog",
|
||||
+};
|
||||
+
|
||||
+static int
|
||||
+ar2315_wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
|
||||
+static long
|
||||
+ar2315_wdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
|
||||
+{
|
||||
+ int new_wdt_timeout;
|
||||
+ int ret = -ENOIOCTLCMD;
|
||||
@ -203,9 +203,9 @@
|
||||
+module_exit(exit_ar2315_wdt);
|
||||
--- a/drivers/watchdog/Kconfig
|
||||
+++ b/drivers/watchdog/Kconfig
|
||||
@@ -930,6 +930,12 @@ config BCM63XX_WDT
|
||||
To compile this driver as a loadable module, choose M here.
|
||||
The module will be called bcm63xx_wdt.
|
||||
@@ -1033,6 +1033,12 @@ config LANTIQ_WDT
|
||||
help
|
||||
Hardware driver for the Lantiq SoC Watchdog Timer.
|
||||
|
||||
+config ATHEROS_WDT
|
||||
+ tristate "Atheros wisoc Watchdog Timer"
|
||||
@ -218,7 +218,7 @@
|
||||
# POWERPC Architecture
|
||||
--- a/drivers/watchdog/Makefile
|
||||
+++ b/drivers/watchdog/Makefile
|
||||
@@ -116,6 +116,7 @@ obj-$(CONFIG_WDT_MTX1) += mtx-1_wdt.o
|
||||
@@ -128,6 +128,7 @@ obj-$(CONFIG_WDT_MTX1) += mtx-1_wdt.o
|
||||
obj-$(CONFIG_PNX833X_WDT) += pnx833x_wdt.o
|
||||
obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o
|
||||
obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
|
||||
@ -1,6 +1,6 @@
|
||||
--- a/drivers/mtd/redboot.c
|
||||
+++ b/drivers/mtd/redboot.c
|
||||
@@ -78,31 +78,32 @@ static int parse_redboot_partitions(stru
|
||||
@@ -79,6 +79,11 @@ static int parse_redboot_partitions(stru
|
||||
static char nullstring[] = "unallocated";
|
||||
#endif
|
||||
|
||||
@ -11,9 +11,8 @@
|
||||
+ restart:
|
||||
if ( directory < 0 ) {
|
||||
offset = master->size + directory * master->erasesize;
|
||||
- while (master->block_isbad &&
|
||||
+ while (master->block_isbad &&
|
||||
master->block_isbad(master, offset)) {
|
||||
while (mtd_can_have_bb(master) &&
|
||||
@@ -86,6 +91,7 @@ static int parse_redboot_partitions(stru
|
||||
if (!offset) {
|
||||
nogood:
|
||||
printk(KERN_NOTICE "Failed to find a non-bad block to check for RedBoot partition table\n");
|
||||
@ -21,14 +20,7 @@
|
||||
return -EIO;
|
||||
}
|
||||
offset -= master->erasesize;
|
||||
}
|
||||
} else {
|
||||
offset = directory * master->erasesize;
|
||||
- while (master->block_isbad &&
|
||||
+ while (master->block_isbad &&
|
||||
master->block_isbad(master, offset)) {
|
||||
offset += master->erasesize;
|
||||
if (offset == master->size)
|
||||
@@ -99,10 +105,6 @@ static int parse_redboot_partitions(stru
|
||||
goto nogood;
|
||||
}
|
||||
}
|
||||
@ -36,11 +28,10 @@
|
||||
-
|
||||
- if (!buf)
|
||||
- return -ENOMEM;
|
||||
-
|
||||
|
||||
printk(KERN_NOTICE "Searching for RedBoot partition table in %s at offset 0x%lx\n",
|
||||
master->name, offset);
|
||||
|
||||
@@ -174,6 +175,11 @@ static int parse_redboot_partitions(stru
|
||||
@@ -175,6 +177,11 @@ static int parse_redboot_partitions(stru
|
||||
}
|
||||
if (i == numslots) {
|
||||
/* Didn't find it */
|
||||
@ -1,6 +1,6 @@
|
||||
--- a/drivers/mtd/redboot.c
|
||||
+++ b/drivers/mtd/redboot.c
|
||||
@@ -57,6 +57,22 @@ static inline int redboot_checksum(struc
|
||||
@@ -58,6 +58,22 @@ static inline int redboot_checksum(struc
|
||||
return 1;
|
||||
}
|
||||
|
||||
@ -21,9 +21,9 @@
|
||||
+}
|
||||
+
|
||||
static int parse_redboot_partitions(struct mtd_info *master,
|
||||
struct mtd_partition **pparts,
|
||||
unsigned long fis_origin)
|
||||
@@ -73,6 +89,7 @@ static int parse_redboot_partitions(stru
|
||||
struct mtd_partition **pparts,
|
||||
struct mtd_part_parser_data *data)
|
||||
@@ -74,6 +90,7 @@ static int parse_redboot_partitions(stru
|
||||
int namelen = 0;
|
||||
int nulllen = 0;
|
||||
int numslots;
|
||||
@ -31,7 +31,7 @@
|
||||
unsigned long offset;
|
||||
#ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED
|
||||
static char nullstring[] = "unallocated";
|
||||
@@ -186,7 +203,10 @@ static int parse_redboot_partitions(stru
|
||||
@@ -188,7 +205,10 @@ static int parse_redboot_partitions(stru
|
||||
goto out;
|
||||
}
|
||||
|
||||
@ -43,7 +43,7 @@
|
||||
struct fis_list *new_fl, **prev;
|
||||
|
||||
if (buf[i].name[0] == 0xff) {
|
||||
@@ -262,12 +282,13 @@ static int parse_redboot_partitions(stru
|
||||
@@ -263,12 +283,13 @@ static int parse_redboot_partitions(stru
|
||||
}
|
||||
#endif
|
||||
for ( ; i<nrparts; i++) {
|
||||
@ -59,7 +59,7 @@
|
||||
strcpy(names, fl->img->name);
|
||||
#ifdef CONFIG_MTD_REDBOOT_PARTS_READONLY
|
||||
if (!memcmp(names, "RedBoot", 8) ||
|
||||
@@ -297,7 +318,9 @@ static int parse_redboot_partitions(stru
|
||||
@@ -298,7 +319,9 @@ static int parse_redboot_partitions(stru
|
||||
fl = fl->next;
|
||||
kfree(tmp_fl);
|
||||
}
|
||||
@ -1,6 +1,6 @@
|
||||
--- a/drivers/net/ar231x.c
|
||||
+++ b/drivers/net/ar231x.c
|
||||
@@ -755,6 +755,7 @@ static void ar231x_load_rx_ring(struct n
|
||||
--- a/drivers/net/ethernet/ar231x/ar231x.c
|
||||
+++ b/drivers/net/ethernet/ar231x/ar231x.c
|
||||
@@ -745,6 +745,7 @@ static void ar231x_load_rx_ring(struct n
|
||||
for (i = 0; i < nr_bufs; i++) {
|
||||
struct sk_buff *skb;
|
||||
ar231x_descr_t *rd;
|
||||
@ -8,7 +8,7 @@
|
||||
|
||||
if (sp->rx_skb[idx])
|
||||
break;
|
||||
@@ -770,7 +771,9 @@ static void ar231x_load_rx_ring(struct n
|
||||
@@ -760,7 +761,9 @@ static void ar231x_load_rx_ring(struct n
|
||||
* Make sure IP header starts on a fresh cache line.
|
||||
*/
|
||||
skb->dev = dev;
|
||||
@ -19,7 +19,7 @@
|
||||
sp->rx_skb[idx] = skb;
|
||||
|
||||
rd = (ar231x_descr_t *) & sp->rx_ring[idx];
|
||||
@@ -844,20 +847,23 @@ static int ar231x_rx_int(struct net_devi
|
||||
@@ -834,20 +837,23 @@ static int ar231x_rx_int(struct net_devi
|
||||
/* alloc new buffer. */
|
||||
skb_new = netdev_alloc_skb(dev, AR2313_BUFSIZE + RX_OFFSET);
|
||||
if (skb_new != NULL) {
|
||||
@ -48,7 +48,7 @@
|
||||
/* reset descriptor's curr_addr */
|
||||
rxdesc->addr = virt_to_phys(skb_new->data);
|
||||
|
||||
@@ -1269,6 +1275,8 @@ static int ar231x_mdiobus_probe (struct
|
||||
@@ -1258,6 +1264,8 @@ static int ar231x_mdiobus_probe (struct
|
||||
return PTR_ERR(phydev);
|
||||
}
|
||||
|
||||
@ -57,9 +57,9 @@
|
||||
/* mask with MAC supported features */
|
||||
phydev->supported &= (SUPPORTED_10baseT_Half
|
||||
| SUPPORTED_10baseT_Full
|
||||
--- a/drivers/net/ar231x.h
|
||||
+++ b/drivers/net/ar231x.h
|
||||
@@ -221,6 +221,8 @@ typedef struct {
|
||||
--- a/drivers/net/ethernet/ar231x/ar231x.h
|
||||
+++ b/drivers/net/ethernet/ar231x/ar231x.h
|
||||
@@ -222,6 +222,8 @@ typedef struct {
|
||||
*/
|
||||
struct ar231x_private {
|
||||
struct net_device *dev;
|
||||
11
target/linux/atheros/patches-3.3/201-multicast_list.patch
Normal file
11
target/linux/atheros/patches-3.3/201-multicast_list.patch
Normal file
@ -0,0 +1,11 @@
|
||||
--- a/drivers/net/ethernet/ar231x/ar231x.c
|
||||
+++ b/drivers/net/ethernet/ar231x/ar231x.c
|
||||
@@ -172,7 +172,7 @@ static const struct net_device_ops ar231
|
||||
.ndo_open = ar231x_open,
|
||||
.ndo_stop = ar231x_close,
|
||||
.ndo_start_xmit = ar231x_start_xmit,
|
||||
- .ndo_set_multicast_list = ar231x_multicast_list,
|
||||
+ .ndo_set_rx_mode = ar231x_multicast_list,
|
||||
.ndo_do_ioctl = ar231x_ioctl,
|
||||
.ndo_change_mtu = eth_change_mtu,
|
||||
.ndo_validate_addr = eth_validate_addr,
|
||||
72
target/linux/atheros/patches-3.3/210-reset_button.patch
Normal file
72
target/linux/atheros/patches-3.3/210-reset_button.patch
Normal file
@ -0,0 +1,72 @@
|
||||
--- a/arch/mips/ar231x/Makefile
|
||||
+++ b/arch/mips/ar231x/Makefile
|
||||
@@ -8,7 +8,7 @@
|
||||
# Copyright (C) 2006-2009 Felix Fietkau <nbd@openwrt.org>
|
||||
#
|
||||
|
||||
-obj-y += board.o prom.o devices.o
|
||||
+obj-y += board.o prom.o devices.o reset.o
|
||||
|
||||
obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
|
||||
|
||||
--- /dev/null
|
||||
+++ b/arch/mips/ar231x/reset.c
|
||||
@@ -0,0 +1,58 @@
|
||||
+#include <linux/init.h>
|
||||
+#include <linux/slab.h>
|
||||
+#include <linux/platform_device.h>
|
||||
+#include <linux/gpio_keys.h>
|
||||
+#include <linux/input.h>
|
||||
+#include <ar231x_platform.h>
|
||||
+#include <ar231x.h>
|
||||
+#include "devices.h"
|
||||
+
|
||||
+static int __init
|
||||
+ar231x_init_reset(void)
|
||||
+{
|
||||
+ struct platform_device *pdev;
|
||||
+ struct gpio_keys_platform_data pdata;
|
||||
+ struct gpio_keys_button *p;
|
||||
+ int err;
|
||||
+
|
||||
+ if (ar231x_board.config->resetConfigGpio == 0xffff)
|
||||
+ return -ENODEV;
|
||||
+
|
||||
+ p = kzalloc(sizeof(*p), GFP_KERNEL);
|
||||
+ if (!p)
|
||||
+ goto err;
|
||||
+
|
||||
+ p->desc = "reset";
|
||||
+ p->type = EV_KEY;
|
||||
+ p->code = KEY_RESTART;
|
||||
+ p->debounce_interval = 60;
|
||||
+ p->gpio = ar231x_board.config->resetConfigGpio;
|
||||
+
|
||||
+ memset(&pdata, 0, sizeof(pdata));
|
||||
+ pdata.poll_interval = 20;
|
||||
+ pdata.buttons = p;
|
||||
+ pdata.nbuttons = 1;
|
||||
+
|
||||
+ pdev = platform_device_alloc("gpio-keys-polled", 0);
|
||||
+ if (!pdev)
|
||||
+ goto err_free;
|
||||
+
|
||||
+ err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
|
||||
+ if (err)
|
||||
+ goto err_put_pdev;
|
||||
+
|
||||
+ err = platform_device_add(pdev);
|
||||
+ if (err)
|
||||
+ goto err_put_pdev;
|
||||
+
|
||||
+ return 0;
|
||||
+
|
||||
+err_put_pdev:
|
||||
+ platform_device_put(pdev);
|
||||
+err_free:
|
||||
+ kfree(p);
|
||||
+err:
|
||||
+ return -ENOMEM;
|
||||
+}
|
||||
+
|
||||
+module_init(ar231x_init_reset);
|
||||
@ -1,6 +1,6 @@
|
||||
--- a/drivers/net/ar231x.c
|
||||
+++ b/drivers/net/ar231x.c
|
||||
@@ -149,6 +149,7 @@ static int ar231x_mdiobus_write(struct m
|
||||
--- a/drivers/net/ethernet/ar231x/ar231x.c
|
||||
+++ b/drivers/net/ethernet/ar231x/ar231x.c
|
||||
@@ -151,6 +151,7 @@ static int ar231x_mdiobus_write(struct m
|
||||
static int ar231x_mdiobus_reset(struct mii_bus *bus);
|
||||
static int ar231x_mdiobus_probe (struct net_device *dev);
|
||||
static void ar231x_adjust_link(struct net_device *dev);
|
||||
@ -8,7 +8,7 @@
|
||||
|
||||
#ifndef ERR
|
||||
#define ERR(fmt, args...) printk("%s: " fmt, __func__, ##args)
|
||||
@@ -298,6 +299,21 @@ int __init ar231x_probe(struct platform_
|
||||
@@ -300,6 +301,21 @@ int __devinit ar231x_probe(struct platfo
|
||||
|
||||
mdiobus_register(sp->mii_bus);
|
||||
|
||||
@ -30,7 +30,7 @@
|
||||
if (ar231x_mdiobus_probe(dev) != 0) {
|
||||
printk(KERN_ERR "%s: mdiobus_probe failed\n", dev->name);
|
||||
rx_tasklet_cleanup(dev);
|
||||
@@ -354,8 +370,10 @@ static int __devexit ar231x_remove(struc
|
||||
@@ -356,8 +372,10 @@ static int __devexit ar231x_remove(struc
|
||||
rx_tasklet_cleanup(dev);
|
||||
ar231x_init_cleanup(dev);
|
||||
unregister_netdev(dev);
|
||||
@ -43,7 +43,7 @@
|
||||
kfree(dev);
|
||||
return 0;
|
||||
}
|
||||
@@ -856,7 +874,12 @@ static int ar231x_rx_int(struct net_devi
|
||||
@@ -846,7 +864,12 @@ static int ar231x_rx_int(struct net_devi
|
||||
dev->stats.rx_bytes += skb->len;
|
||||
|
||||
/* pass the packet to upper layers */
|
||||
@ -57,7 +57,7 @@
|
||||
skb_new->dev = dev;
|
||||
|
||||
/* 16 bit align */
|
||||
@@ -1153,6 +1176,9 @@ static int ar231x_ioctl(struct net_devic
|
||||
@@ -1142,6 +1165,9 @@ static int ar231x_ioctl(struct net_devic
|
||||
struct ar231x_private *sp = netdev_priv(dev);
|
||||
int ret;
|
||||
|
||||
@ -43,7 +43,6 @@ MODULE_LICENSE("GPL");
|
||||
struct mvswitch_priv {
|
||||
const struct net_device_ops *ndo_old;
|
||||
struct net_device_ops ndo;
|
||||
struct vlan_group *grp;
|
||||
u8 vlans[16];
|
||||
};
|
||||
|
||||
@ -162,9 +161,6 @@ mvswitch_mangle_rx(struct sk_buff *skb, int napi)
|
||||
if (!priv)
|
||||
goto error;
|
||||
|
||||
if (!priv->grp)
|
||||
goto error;
|
||||
|
||||
#ifdef HEADER_MODE
|
||||
buf = skb->data;
|
||||
skb_pull(skb, MV_HEADER_SIZE);
|
||||
@ -185,10 +181,11 @@ mvswitch_mangle_rx(struct sk_buff *skb, int napi)
|
||||
|
||||
skb->protocol = eth_type_trans(skb, skb->dev);
|
||||
|
||||
__vlan_hwaccel_put_tag(skb, vlan);
|
||||
if (napi)
|
||||
return vlan_hwaccel_receive_skb(skb, priv->grp, vlan);
|
||||
return netif_receive_skb(skb);
|
||||
else
|
||||
return vlan_hwaccel_rx(skb, priv->grp, vlan);
|
||||
return netif_rx(skb);
|
||||
|
||||
error:
|
||||
/* no vlan? eat the packet! */
|
||||
@ -210,14 +207,6 @@ mvswitch_netif_receive_skb(struct sk_buff *skb)
|
||||
}
|
||||
|
||||
|
||||
static void
|
||||
mvswitch_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
|
||||
{
|
||||
struct mvswitch_priv *priv = dev->phy_ptr;
|
||||
priv->grp = grp;
|
||||
}
|
||||
|
||||
|
||||
static int
|
||||
mvswitch_wait_mask(struct phy_device *pdev, int addr, int reg, u16 mask, u16 val)
|
||||
{
|
||||
@ -346,7 +335,6 @@ mvswitch_config_init(struct phy_device *pdev)
|
||||
priv->ndo_old = dev->netdev_ops;
|
||||
memcpy(&priv->ndo, priv->ndo_old, sizeof(struct net_device_ops));
|
||||
priv->ndo.ndo_start_xmit = mvswitch_mangle_tx;
|
||||
priv->ndo.ndo_vlan_rx_register = mvswitch_vlan_rx_register;
|
||||
dev->netdev_ops = &priv->ndo;
|
||||
|
||||
pdev->pkt_align = 2;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user