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ar71xx: set pad6 cfg for AR8327 on the AP136 board
Also override the pll_1000 value. Without these settings ethernet suffers from packet loss. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34316 3c298f89-4303-0410-b956-a3cf2f4a3e73
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@ -56,7 +56,7 @@
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static struct gpio_led ap136_leds_gpio[] __initdata = {
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{
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@@ -98,63 +104,82 @@ static struct gpio_keys_button ap136_gpi
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@@ -98,63 +104,91 @@ static struct gpio_keys_button ap136_gpi
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},
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};
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@ -78,31 +78,40 @@
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- .max_speed_hz = 25000000,
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- .modalias = "mx25l6405d",
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- .controller_data = &ap136_spi0_data,
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- }
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+static struct ar8327_pad_cfg ap136_ar8327_pad6_cfg = {
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+ .mode = AR8327_PAD_MAC_SGMII,
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+ .txclk_delay_en = false,
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+ .rxclk_delay_en = true,
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+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL0,
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+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL0,
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};
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-static struct ath79_spi_platform_data ap136_spi_data = {
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- .bus_num = 0,
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- .num_chipselect = 1,
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+static struct ar8327_platform_data ap136_ar8327_data = {
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+ .pad0_cfg = &ap136_ar8327_pad0_cfg,
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+ .pad6_cfg = &ap136_ar8327_pad6_cfg,
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+ .cpuport_cfg = {
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+ .force_link = 1,
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+ .speed = AR8327_PORT_SPEED_1000,
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+ .duplex = 1,
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+ .txpause = 1,
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+ .rxpause = 1,
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}
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+ }
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};
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-static struct ath79_spi_platform_data ap136_spi_data = {
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- .bus_num = 0,
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- .num_chipselect = 1,
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-#ifdef CONFIG_PCI
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-static struct ath9k_platform_data ap136_ath9k_data;
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+static struct mdio_board_info ap136_mdio0_info[] = {
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+ {
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+ .bus_id = "ag71xx-mdio.0",
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+ .phy_addr = 0,
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+ .platform_data = &ap136_ar8327_data,
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+ },
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};
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+};
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-#ifdef CONFIG_PCI
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-static struct ath9k_platform_data ap136_ath9k_data;
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-
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-static int ap136_pci_plat_dev_init(struct pci_dev *dev)
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+static void __init ap136_gmac_setup(void)
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{
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@ -167,7 +176,7 @@
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+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
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+ ath79_eth0_data.phy_mask = BIT(0);
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+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
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+ ath79_eth0_pll_data.pll_1000 = 0x06000000;
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+ ath79_eth0_pll_data.pll_1000 = 0xa6000000;
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+
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+ ath79_register_eth(0);
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}
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@ -56,7 +56,7 @@
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static struct gpio_led ap136_leds_gpio[] __initdata = {
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{
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@@ -98,63 +104,82 @@ static struct gpio_keys_button ap136_gpi
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@@ -98,63 +104,91 @@ static struct gpio_keys_button ap136_gpi
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},
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};
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@ -78,31 +78,40 @@
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- .max_speed_hz = 25000000,
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- .modalias = "mx25l6405d",
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- .controller_data = &ap136_spi0_data,
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- }
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+static struct ar8327_pad_cfg ap136_ar8327_pad6_cfg = {
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+ .mode = AR8327_PAD_MAC_SGMII,
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+ .txclk_delay_en = false,
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+ .rxclk_delay_en = true,
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+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL0,
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+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL0,
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};
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-static struct ath79_spi_platform_data ap136_spi_data = {
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- .bus_num = 0,
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- .num_chipselect = 1,
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+static struct ar8327_platform_data ap136_ar8327_data = {
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+ .pad0_cfg = &ap136_ar8327_pad0_cfg,
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+ .pad6_cfg = &ap136_ar8327_pad6_cfg,
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+ .cpuport_cfg = {
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+ .force_link = 1,
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+ .speed = AR8327_PORT_SPEED_1000,
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+ .duplex = 1,
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+ .txpause = 1,
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+ .rxpause = 1,
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}
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+ }
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};
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-static struct ath79_spi_platform_data ap136_spi_data = {
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- .bus_num = 0,
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- .num_chipselect = 1,
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-#ifdef CONFIG_PCI
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-static struct ath9k_platform_data ap136_ath9k_data;
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+static struct mdio_board_info ap136_mdio0_info[] = {
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+ {
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+ .bus_id = "ag71xx-mdio.0",
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+ .phy_addr = 0,
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+ .platform_data = &ap136_ar8327_data,
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+ },
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};
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+};
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-#ifdef CONFIG_PCI
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-static struct ath9k_platform_data ap136_ath9k_data;
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-
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-static int ap136_pci_plat_dev_init(struct pci_dev *dev)
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+static void __init ap136_gmac_setup(void)
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{
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@ -167,7 +176,7 @@
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+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
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+ ath79_eth0_data.phy_mask = BIT(0);
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+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
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+ ath79_eth0_pll_data.pll_1000 = 0x06000000;
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+ ath79_eth0_pll_data.pll_1000 = 0xa6000000;
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+
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+ ath79_register_eth(0);
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}
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