1
0
mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2024-12-26 01:18:58 +02:00

danube_led cleanup

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@9758 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
blogic 2007-12-14 21:32:48 +00:00
parent d9cf9b6852
commit f770cc114f

View File

@ -23,212 +23,68 @@
#include <linux/version.h> #include <linux/version.h>
#include <linux/types.h> #include <linux/types.h>
#include <linux/fs.h> #include <linux/fs.h>
#include <linux/miscdevice.h>
#include <linux/init.h> #include <linux/init.h>
#include <asm/uaccess.h> #include <asm/uaccess.h>
#include <asm/unistd.h> #include <asm/unistd.h>
#include <linux/errno.h> #include <linux/errno.h>
#include <asm/danube/danube.h> #include <asm/danube/danube.h>
#include <asm/danube/danube_gpio.h> #include <asm/danube/danube_gpio.h>
#include <asm/delay.h>
#define LED_CONFIG 0x01
#define CONFIG_OPERATION_UPDATE_SOURCE 0x0001
#define CONFIG_OPERATION_BLINK 0x0002
#define CONFIG_OPERATION_UPDATE_CLOCK 0x0004
#define CONFIG_OPERATION_STORE_MODE 0x0008
#define CONFIG_OPERATION_SHIFT_CLOCK 0x0010
#define CONFIG_OPERATION_DATA_OFFSET 0x0020
#define CONFIG_OPERATION_NUMBER_OF_LED 0x0040
#define CONFIG_OPERATION_DATA 0x0080
#define CONFIG_OPERATION_MIPS0_ACCESS 0x0100
#define CONFIG_DATA_CLOCK_EDGE 0x0200
#define DANUBE_LED_CLK_EDGE DANUBE_LED_FALLING #define DANUBE_LED_CLK_EDGE DANUBE_LED_FALLING
//#define DANUBE_LED_CLK_EDGE DANUBE_LED_RISING //#define DANUBE_LED_CLK_EDGE DANUBE_LED_RISING
#define LED_SH_PORT 0 #define DANUBE_LED_SPEED DANUBE_LED_8HZ
#define LED_SH_PIN 4
#define LED_SH_DIR 1
#define LED_SH_ALTSEL0 1
#define LED_SH_ALTSEL1 0
#define LED_SH_OPENDRAIN 1
#define LED_D_PORT 0
#define LED_D_PIN 5
#define LED_D_DIR 1
#define LED_D_ALTSEL0 1
#define LED_D_ALTSEL1 0
#define LED_D_OPENDRAIN 1
#define LED_ST_PORT 0
#define LED_ST_PIN 6
#define LED_ST_DIR 1
#define LED_ST_ALTSEL0 1
#define LED_ST_ALTSEL1 0
#define LED_ST_OPENDRAIN 1
#define LED_ADSL0_PORT 0 #define DANUBE_LED_GPIO_PORT 0
#define LED_ADSL0_PIN 4
#define LED_ADSL0_DIR 1
#define LED_ADSL0_ALTSEL0 0
#define LED_ADSL0_ALTSEL1 1
#define LED_ADSL0_OPENDRAIN 1
#define LED_ADSL1_PORT 0
#define LED_ADSL1_PIN 5
#define LED_ADSL1_DIR 1
#define LED_ADSL1_ALTSEL0 1
#define LED_ADSL1_ALTSEL1 1
#define LED_ADSL1_OPENDRAIN 1
#if (LED_SH_PORT == LED_ADSL0_PORT && LED_SH_PIN == LED_ADSL0_PIN) \
|| (LED_D_PORT == LED_ADSL0_PORT && LED_D_PIN == LED_ADSL0_PIN) \
|| (LED_ST_PORT == LED_ADSL0_PORT && LED_ST_PIN == LED_ADSL0_PIN) \
|| (LED_SH_PORT == LED_ADSL1_PORT && LED_SH_PIN == LED_ADSL1_PIN) \
|| (LED_D_PORT == LED_ADSL1_PORT && LED_D_PIN == LED_ADSL1_PIN) \
|| (LED_ST_PORT == LED_ADSL1_PORT && LED_ST_PIN == LED_ADSL1_PIN)
#define ADSL_LED_IS_EXCLUSIVE 1
#else
#define ADSL_LED_IS_EXCLUSIVE 0
#endif
#if LED_SH_DIR
#define LED_SH_DIR_SETUP danube_port_set_dir_out
#else
#define LED_SH_DIR_SETUP danube_port_clear_dir_out
#endif
#if LED_SH_ALTSEL0
#define LED_SH_ALTSEL0_SETUP danube_port_set_altsel0
#else
#define LED_SH_ALTSEL0_SETUP danube_port_clear_altsel0
#endif
#if LED_SH_ALTSEL1
#define LED_SH_ALTSEL1_SETUP danube_port_set_altsel1
#else
#define LED_SH_ALTSEL1_SETUP danube_port_clear_altsel1
#endif
#if LED_SH_OPENDRAIN
#define LED_SH_OPENDRAIN_SETUP danube_port_set_open_drain
#else
#define LED_SH_OPENDRAIN_SETUP danube_port_clear_open_drain
#endif
#if LED_D_DIR
#define LED_D_DIR_SETUP danube_port_set_dir_out
#else
#define LED_D_DIR_SETUP danube_port_clear_dir_out
#endif
#if LED_D_ALTSEL0
#define LED_D_ALTSEL0_SETUP danube_port_set_altsel0
#else
#define LED_D_ALTSEL0_SETUP danube_port_clear_altsel0
#endif
#if LED_D_ALTSEL1
#define LED_D_ALTSEL1_SETUP danube_port_set_altsel1
#else
#define LED_D_ALTSEL1_SETUP danube_port_clear_altsel1
#endif
#if LED_D_OPENDRAIN
#define LED_D_OPENDRAIN_SETUP danube_port_set_open_drain
#else
#define LED_D_OPENDRAIN_SETUP danube_port_clear_open_drain
#endif
#if LED_ST_DIR
#define LED_ST_DIR_SETUP danube_port_set_dir_out
#else
#define LED_ST_DIR_SETUP danube_port_clear_dir_out
#endif
#if LED_ST_ALTSEL0
#define LED_ST_ALTSEL0_SETUP danube_port_set_altsel0
#else
#define LED_ST_ALTSEL0_SETUP danube_port_clear_altsel0
#endif
#if LED_ST_ALTSEL1
#define LED_ST_ALTSEL1_SETUP danube_port_set_altsel1
#else
#define LED_ST_ALTSEL1_SETUP danube_port_clear_altsel1
#endif
#if LED_ST_OPENDRAIN
#define LED_ST_OPENDRAIN_SETUP danube_port_set_open_drain
#else
#define LED_ST_OPENDRAIN_SETUP danube_port_clear_open_drain
#endif
#if LED_ADSL0_DIR
#define LED_ADSL0_DIR_SETUP danube_port_set_dir_out
#else
#define LED_ADSL0_DIR_SETUP danube_port_clear_dir_out
#endif
#if LED_ADSL0_ALTSEL0
#define LED_ADSL0_ALTSEL0_SETUP danube_port_set_altsel0
#else
#define LED_ADSL0_ALTSEL0_SETUP danube_port_clear_altsel0
#endif
#if LED_ADSL0_ALTSEL1
#define LED_ADSL0_ALTSEL1_SETUP danube_port_set_altsel1
#else
#define LED_ADSL0_ALTSEL1_SETUP danube_port_clear_altsel1
#endif
#if LED_ADSL0_OPENDRAIN
#define LED_ADSL0_OPENDRAIN_SETUP danube_port_set_open_drain
#else
#define LED_ADSL0_OPENDRAIN_SETUP danube_port_clear_open_drain
#endif
#if LED_ADSL1_DIR
#define LED_ADSL1_DIR_SETUP danube_port_set_dir_out
#else
#define LED_ADSL1_DIR_SETUP danube_port_clear_dir_out
#endif
#if LED_ADSL1_ALTSEL0
#define LED_ADSL1_ALTSEL0_SETUP danube_port_set_altsel0
#else
#define LED_ADSL1_ALTSEL0_SETUP danube_port_clear_altsel0
#endif
#if LED_ADSL1_ALTSEL1
#define LED_ADSL1_ALTSEL1_SETUP danube_port_set_altsel1
#else
#define LED_ADSL1_ALTSEL1_SETUP danube_port_clear_altsel1
#endif
#if LED_ADSL1_OPENDRAIN
#define LED_ADSL1_OPENDRAIN_SETUP danube_port_set_open_drain
#else
#define LED_ADSL1_OPENDRAIN_SETUP danube_port_clear_open_drain
#endif
#define SET_BITS(x, msb, lsb, value) (((x) & ~(((1 << ((msb) + 1)) - 1) ^ ((1 << (lsb)) - 1))) | (((value) & ((1 << (1 + (msb) - (lsb))) - 1)) << (lsb)))
static int danube_led_major; static int danube_led_major;
static int void
danube_led_set (unsigned int led)
{
led &= 0xffffff;
writel(readl(DANUBE_LED_CPU0) | led, DANUBE_LED_CPU0);
}
EXPORT_SYMBOL(danube_led_set);
void
danube_led_clear (unsigned int led)
{
led = ~(led & 0xffffff);
writel(readl(DANUBE_LED_CPU0) & led, DANUBE_LED_CPU0);
}
EXPORT_SYMBOL(danube_led_clear);
void
danube_led_blink_set (unsigned int led)
{
led &= 0xffffff;
writel(readl(DANUBE_LED_CON0) | led, DANUBE_LED_CON0);
}
EXPORT_SYMBOL(danube_led_blink_set);
void
danube_led_blink_clear (unsigned int led)
{
led = ~(led & 0xffffff);
writel(readl(DANUBE_LED_CON0) & led, DANUBE_LED_CON0);
}
EXPORT_SYMBOL(danube_led_blink_clear);
void
danube_led_setup_gpio (void) danube_led_setup_gpio (void)
{ {
/* int i = 0;
* Set LED_ST
* I don't check the return value, because I'm sure the value is valid
* and the pins are reserved already.
*/
LED_ST_ALTSEL0_SETUP(LED_ST_PORT, LED_ST_PIN);
LED_ST_ALTSEL1_SETUP(LED_ST_PORT, LED_ST_PIN);
LED_ST_DIR_SETUP(LED_ST_PORT, LED_ST_PIN);
LED_ST_OPENDRAIN_SETUP(LED_ST_PORT, LED_ST_PIN);
/* /* we need to setup pins SH,D,ST (4,5,6) */
* Set LED_D for (i = 4; i < 7; i++)
*/ {
LED_D_ALTSEL0_SETUP(LED_D_PORT, LED_D_PIN); danube_port_set_altsel0(DANUBE_LED_GPIO_PORT, i);
LED_D_ALTSEL1_SETUP(LED_D_PORT, LED_D_PIN); danube_port_clear_altsel1(DANUBE_LED_GPIO_PORT, i);
LED_D_DIR_SETUP(LED_D_PORT, LED_D_PIN); danube_port_set_dir_out(DANUBE_LED_GPIO_PORT, i);
LED_D_OPENDRAIN_SETUP(LED_D_PORT, LED_D_PIN); danube_port_set_open_drain(DANUBE_LED_GPIO_PORT, i);
}
/*
* Set LED_SH
*/
LED_SH_ALTSEL0_SETUP(LED_SH_PORT, LED_SH_PIN);
LED_SH_ALTSEL1_SETUP(LED_SH_PORT, LED_SH_PIN);
LED_SH_DIR_SETUP(LED_SH_PORT, LED_SH_PIN);
LED_SH_OPENDRAIN_SETUP(LED_SH_PORT, LED_SH_PIN);
return 0;
} }
static void static void
@ -256,8 +112,6 @@ led_ioctl (struct inode *inode, struct file *file, unsigned int cmd, unsigned lo
switch ( cmd ) switch ( cmd )
{ {
case LED_CONFIG:
break;
} }
return ret; return ret;
@ -309,9 +163,10 @@ danube_led_init (void)
danube_led_setup_gpio(); danube_led_setup_gpio();
writel(0, DANUBE_LED_AR); writel(0, DANUBE_LED_AR);
writel(0xff00, DANUBE_LED_CPU0); writel(0, DANUBE_LED_CPU0);
writel(0, DANUBE_LED_CPU1); writel(0, DANUBE_LED_CPU1);
writel(0x8000ffff, DANUBE_LED_CON0); writel(LED_CON0_SWU, DANUBE_LED_CON0);
writel(0, DANUBE_LED_CON1);
/* setup the clock edge that the shift register is triggered on */ /* setup the clock edge that the shift register is triggered on */
writel(readl(DANUBE_LED_CON0) & ~DANUBE_LED_EDGE_MASK, DANUBE_LED_CON0); writel(readl(DANUBE_LED_CON0) & ~DANUBE_LED_EDGE_MASK, DANUBE_LED_CON0);
@ -326,7 +181,7 @@ danube_led_init (void)
/* set led update speed */ /* set led update speed */
writel(readl(DANUBE_LED_CON1) & ~DANUBE_LED_MASK, DANUBE_LED_CON1); writel(readl(DANUBE_LED_CON1) & ~DANUBE_LED_MASK, DANUBE_LED_CON1);
writel(readl(DANUBE_LED_CON1) | DANUBE_LED_8HZ, DANUBE_LED_CON1); writel(readl(DANUBE_LED_CON1) | DANUBE_LED_SPEED, DANUBE_LED_CON1);
/* adsl 0 and 1 leds are updated by the arc */ /* adsl 0 and 1 leds are updated by the arc */
writel(readl(DANUBE_LED_CON0) | DANUBE_LED_ADSL_SRC, DANUBE_LED_CON0); writel(readl(DANUBE_LED_CON0) | DANUBE_LED_ADSL_SRC, DANUBE_LED_CON0);