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mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2024-11-27 17:15:00 +02:00

[ltq-dsl] fix for 3.2.9

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@31065 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
blogic 2012-03-25 08:50:42 +00:00
parent 5da154a599
commit f966720eb0
4 changed files with 30 additions and 12 deletions

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@ -40,6 +40,7 @@
#include <linux/proc_fs.h> #include <linux/proc_fs.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/ioctl.h> #include <linux/ioctl.h>
#include <linux/clk.h>
#include <asm/delay.h> #include <asm/delay.h>
/* /*
@ -107,23 +108,27 @@ static inline void init_pmu(void)
{ {
//*(unsigned long *)0xBF10201C &= ~((1 << 15) | (1 << 13) | (1 << 9)); //*(unsigned long *)0xBF10201C &= ~((1 << 15) | (1 << 13) | (1 << 9));
//PPE_TOP_PMU_SETUP(IFX_PMU_ENABLE); //PPE_TOP_PMU_SETUP(IFX_PMU_ENABLE);
PPE_SLL01_PMU_SETUP(IFX_PMU_ENABLE); /* PPE_SLL01_PMU_SETUP(IFX_PMU_ENABLE);
PPE_TC_PMU_SETUP(IFX_PMU_ENABLE); PPE_TC_PMU_SETUP(IFX_PMU_ENABLE);
PPE_EMA_PMU_SETUP(IFX_PMU_ENABLE); PPE_EMA_PMU_SETUP(IFX_PMU_ENABLE);
//PPE_QSB_PMU_SETUP(IFX_PMU_ENABLE); //PPE_QSB_PMU_SETUP(IFX_PMU_ENABLE);
PPE_TPE_PMU_SETUP(IFX_PMU_ENABLE); PPE_TPE_PMU_SETUP(IFX_PMU_ENABLE);
DSL_DFE_PMU_SETUP(IFX_PMU_ENABLE); DSL_DFE_PMU_SETUP(IFX_PMU_ENABLE);*/
struct clk *clk = clk_get_sys("ltq_dsl", NULL);
clk_enable(clk);
} }
static inline void uninit_pmu(void) static inline void uninit_pmu(void)
{ {
PPE_SLL01_PMU_SETUP(IFX_PMU_DISABLE); /* PPE_SLL01_PMU_SETUP(IFX_PMU_DISABLE);
PPE_TC_PMU_SETUP(IFX_PMU_DISABLE); PPE_TC_PMU_SETUP(IFX_PMU_DISABLE);
PPE_EMA_PMU_SETUP(IFX_PMU_DISABLE); PPE_EMA_PMU_SETUP(IFX_PMU_DISABLE);
//PPE_QSB_PMU_SETUP(IFX_PMU_DISABLE); //PPE_QSB_PMU_SETUP(IFX_PMU_DISABLE);
PPE_TPE_PMU_SETUP(IFX_PMU_DISABLE); PPE_TPE_PMU_SETUP(IFX_PMU_DISABLE);
DSL_DFE_PMU_SETUP(IFX_PMU_DISABLE); DSL_DFE_PMU_SETUP(IFX_PMU_DISABLE);
//PPE_TOP_PMU_SETUP(IFX_PMU_DISABLE); //PPE_TOP_PMU_SETUP(IFX_PMU_DISABLE);*/
struct clk *clk = clk_get_sys("ltq_dsl", NULL);
clk_disable(clk);
} }
static inline void reset_ppe(void) static inline void reset_ppe(void)

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@ -40,6 +40,7 @@
#include <linux/proc_fs.h> #include <linux/proc_fs.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/ioctl.h> #include <linux/ioctl.h>
#include <linux/clk.h>
#include <asm/delay.h> #include <asm/delay.h>
/* /*
@ -114,23 +115,27 @@ static inline void init_pmu(void)
{ {
//*(unsigned long *)0xBF10201C &= ~((1 << 15) | (1 << 13) | (1 << 9)); //*(unsigned long *)0xBF10201C &= ~((1 << 15) | (1 << 13) | (1 << 9));
//PPE_TOP_PMU_SETUP(IFX_PMU_ENABLE); //PPE_TOP_PMU_SETUP(IFX_PMU_ENABLE);
PPE_SLL01_PMU_SETUP(IFX_PMU_ENABLE); /* PPE_SLL01_PMU_SETUP(IFX_PMU_ENABLE);
PPE_TC_PMU_SETUP(IFX_PMU_ENABLE); PPE_TC_PMU_SETUP(IFX_PMU_ENABLE);
PPE_EMA_PMU_SETUP(IFX_PMU_ENABLE); PPE_EMA_PMU_SETUP(IFX_PMU_ENABLE);
PPE_QSB_PMU_SETUP(IFX_PMU_ENABLE); PPE_QSB_PMU_SETUP(IFX_PMU_ENABLE);
PPE_TPE_PMU_SETUP(IFX_PMU_ENABLE); PPE_TPE_PMU_SETUP(IFX_PMU_ENABLE);
DSL_DFE_PMU_SETUP(IFX_PMU_ENABLE); DSL_DFE_PMU_SETUP(IFX_PMU_ENABLE);*/
struct clk *clk = clk_get_sys("ltq_dsl", NULL);
clk_enable(clk);
} }
static inline void uninit_pmu(void) static inline void uninit_pmu(void)
{ {
PPE_SLL01_PMU_SETUP(IFX_PMU_DISABLE); /* PPE_SLL01_PMU_SETUP(IFX_PMU_DISABLE);
PPE_TC_PMU_SETUP(IFX_PMU_DISABLE); PPE_TC_PMU_SETUP(IFX_PMU_DISABLE);
PPE_EMA_PMU_SETUP(IFX_PMU_DISABLE); PPE_EMA_PMU_SETUP(IFX_PMU_DISABLE);
PPE_QSB_PMU_SETUP(IFX_PMU_DISABLE); PPE_QSB_PMU_SETUP(IFX_PMU_DISABLE);
PPE_TPE_PMU_SETUP(IFX_PMU_DISABLE); PPE_TPE_PMU_SETUP(IFX_PMU_DISABLE);
DSL_DFE_PMU_SETUP(IFX_PMU_DISABLE); DSL_DFE_PMU_SETUP(IFX_PMU_DISABLE);*/
//PPE_TOP_PMU_SETUP(IFX_PMU_DISABLE); //PPE_TOP_PMU_SETUP(IFX_PMU_DISABLE);
struct clk *clk = clk_get_sys("ltq_dsl", NULL);
clk_disable(clk);
} }
static inline void reset_ppe(void) static inline void reset_ppe(void)

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@ -40,6 +40,7 @@
#include <linux/proc_fs.h> #include <linux/proc_fs.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/ioctl.h> #include <linux/ioctl.h>
#include <linux/clk.h>
#include <asm/delay.h> #include <asm/delay.h>
/* /*
@ -109,23 +110,27 @@ static inline void init_pmu(void)
{ {
//*(unsigned long *)0xBF10201C &= ~((1 << 15) | (1 << 13) | (1 << 9)); //*(unsigned long *)0xBF10201C &= ~((1 << 15) | (1 << 13) | (1 << 9));
//PPE_TOP_PMU_SETUP(IFX_PMU_ENABLE); //PPE_TOP_PMU_SETUP(IFX_PMU_ENABLE);
PPE_SLL01_PMU_SETUP(IFX_PMU_ENABLE); /* PPE_SLL01_PMU_SETUP(IFX_PMU_ENABLE);
PPE_TC_PMU_SETUP(IFX_PMU_ENABLE); PPE_TC_PMU_SETUP(IFX_PMU_ENABLE);
PPE_EMA_PMU_SETUP(IFX_PMU_ENABLE); PPE_EMA_PMU_SETUP(IFX_PMU_ENABLE);
PPE_QSB_PMU_SETUP(IFX_PMU_ENABLE); PPE_QSB_PMU_SETUP(IFX_PMU_ENABLE);
PPE_TPE_PMU_SETUP(IFX_PMU_ENABLE); PPE_TPE_PMU_SETUP(IFX_PMU_ENABLE);
DSL_DFE_PMU_SETUP(IFX_PMU_ENABLE); DSL_DFE_PMU_SETUP(IFX_PMU_ENABLE);*/
struct clk *clk = clk_get_sys("ltq_dsl", NULL);
clk_enable(clk);
} }
static inline void uninit_pmu(void) static inline void uninit_pmu(void)
{ {
PPE_SLL01_PMU_SETUP(IFX_PMU_DISABLE); /* PPE_SLL01_PMU_SETUP(IFX_PMU_DISABLE);
PPE_TC_PMU_SETUP(IFX_PMU_DISABLE); PPE_TC_PMU_SETUP(IFX_PMU_DISABLE);
PPE_EMA_PMU_SETUP(IFX_PMU_DISABLE); PPE_EMA_PMU_SETUP(IFX_PMU_DISABLE);
PPE_QSB_PMU_SETUP(IFX_PMU_DISABLE); PPE_QSB_PMU_SETUP(IFX_PMU_DISABLE);
PPE_TPE_PMU_SETUP(IFX_PMU_DISABLE); PPE_TPE_PMU_SETUP(IFX_PMU_DISABLE);
DSL_DFE_PMU_SETUP(IFX_PMU_DISABLE); DSL_DFE_PMU_SETUP(IFX_PMU_DISABLE);*/
//PPE_TOP_PMU_SETUP(IFX_PMU_DISABLE); //PPE_TOP_PMU_SETUP(IFX_PMU_DISABLE);
struct clk *clk = clk_get_sys("ltq_dsl", NULL);
clk_disable(clk);
} }
static inline void reset_ppe(void) static inline void reset_ppe(void)

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@ -34,6 +34,9 @@
#define IFX_PMU_MODULE_PPE_EMA (1 << 22) #define IFX_PMU_MODULE_PPE_EMA (1 << 22)
#define IFX_PMU_MODULE_PPE_TOP (1 << 29) #define IFX_PMU_MODULE_PPE_TOP (1 << 29)
extern void ltq_pmu_enable(unsigned int module);
extern void ltq_pmu_disable(unsigned int module);
#define ifx_pmu_set(a,b) {if(a == IFX_PMU_ENABLE) ltq_pmu_enable(b); else ltq_pmu_disable(b);} #define ifx_pmu_set(a,b) {if(a == IFX_PMU_ENABLE) ltq_pmu_enable(b); else ltq_pmu_disable(b);}
#define PPE_TOP_PMU_SETUP(__x) ifx_pmu_set(IFX_PMU_MODULE_PPE_TOP, (__x)) #define PPE_TOP_PMU_SETUP(__x) ifx_pmu_set(IFX_PMU_MODULE_PPE_TOP, (__x))