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git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-29 13:28:58 +02:00
[u-boot] remove useless files
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@ -6,11 +6,10 @@ From: Xiangfu Liu <xiangfu@sharism.cc>
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---
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---
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Makefile | 10 +
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Makefile | 10 +
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board/qi_lb60/qi_lb60.c | 39 +++-
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common/env_common.c | 2
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common/env_common.c | 2
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common/lcd.c | 45 ++++
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common/lcd.c | 45 ++++
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common/main.c | 4
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common/main.c | 4
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cpu/mips/Makefile | 4
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cpu/mips/Makefile | 5
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cpu/mips/cache.S | 280 ++++++++++----------------
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cpu/mips/cache.S | 280 ++++++++++----------------
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cpu/mips/config.mk | 6 -
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cpu/mips/config.mk | 6 -
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cpu/mips/cpu.c | 75 +++++++
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cpu/mips/cpu.c | 75 +++++++
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@ -19,13 +18,11 @@ From: Xiangfu Liu <xiangfu@sharism.cc>
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examples/standalone/mips.lds | 2
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examples/standalone/mips.lds | 2
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include/asm-mips/addrspace.h | 2
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include/asm-mips/addrspace.h | 2
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include/asm-mips/global_data.h | 11 +
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include/asm-mips/global_data.h | 11 +
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include/configs/qi_lb60.h | 2
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include/lcd.h | 56 +++++
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include/lcd.h | 56 +++++
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lib_mips/board.c | 18 +-
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lib_mips/board.c | 18 +-
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lib_mips/bootm.c | 7 +
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lib_mips/bootm.c | 7 +
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lib_mips/time.c | 4
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lib_mips/time.c | 4
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nand_spl/nand_boot_jz4740.c | 46 +---
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17 files changed, 757 insertions(+), 290 deletions(-)
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20 files changed, 800 insertions(+), 333 deletions(-)
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diff --git a/Makefile b/Makefile
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diff --git a/Makefile b/Makefile
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@ -49,89 +46,6 @@ index f06a97c..a318eb4 100644
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## MIPS64 5Kc
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## MIPS64 5Kc
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#########################################################################
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#########################################################################
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diff --git a/board/qi_lb60/qi_lb60.c b/board/qi_lb60/qi_lb60.c
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index 54625c3..aa7b85b 100644
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--- a/board/qi_lb60/qi_lb60.c
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+++ b/board/qi_lb60/qi_lb60.c
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@@ -12,6 +12,8 @@
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#include <asm/mipsregs.h>
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#include <asm/jz4740.h>
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+DECLARE_GLOBAL_DATA_PTR;
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+
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static void gpio_init(void)
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{
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/*
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@@ -25,11 +27,6 @@ static void gpio_init(void)
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__gpio_as_sdram_32bit();
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/*
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- * Initialize UART0 pins
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- */
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- __gpio_as_uart0();
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-
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- /*
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* Initialize LCD pins
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*/
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__gpio_as_lcd_18bit();
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@@ -43,17 +40,31 @@ static void gpio_init(void)
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* Initialize Other pins
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*/
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unsigned int i;
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+ for (i = 0; i < 7; i++){
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+ __gpio_as_input(GPIO_KEYIN_BASE + i);
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+ __gpio_enable_pull(GPIO_KEYIN_BASE + i);
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+ }
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+
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for (i = 0; i < 8; i++) {
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__gpio_as_output(GPIO_KEYOUT_BASE + i);
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- __gpio_set_pin(GPIO_KEYOUT_BASE + i);
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+ __gpio_clear_pin(GPIO_KEYOUT_BASE + i);
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}
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- for (i = 0; i < 7; i++){
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- __gpio_as_input(GPIO_KEYIN_BASE + i);
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- __gpio_enable_pull(GPIO_KEYIN_BASE + i);
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+ /*
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+ * Initialize UART0 pins, in Ben NanoNote uart0 and keyin8 use the
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+ * same gpio, init the gpio as uart0 cause a keyboard bug. so for
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+ * end user we disable the uart0
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+ */
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+ if (__gpio_get_pin(GPIO_KEYIN_BASE + 2) == 0){
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+ /* if pressed [S] */
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+ printf("[S] pressed, enable UART0\n");
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+ gd->boot_option = 5;
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+ __gpio_as_uart0();
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+ } else {
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+ printf("[S] not pressed, disable UART0\n");
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+ __gpio_as_input(GPIO_KEYIN_8);
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+ __gpio_enable_pull(GPIO_KEYIN_8);
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}
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- /* __gpio_as_input( GPIO_KEYIN_8 ); */
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- /* __gpio_enable_pull( GPIO_KEYIN_8 ); */
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__gpio_as_output(GPIO_AUDIO_POP);
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__gpio_set_pin(GPIO_AUDIO_POP);
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@@ -73,6 +84,11 @@ static void gpio_init(void)
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__gpio_as_input(GPIO_USB_DETECT);
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__gpio_enable_pull(GPIO_USB_DETECT);
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+
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+ if (__gpio_get_pin(GPIO_KEYIN_BASE + 3) == 0) {
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+ printf("[M] pressed, boot from sd card\n");
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+ gd->boot_option = 1;
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+ }
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}
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static void cpm_init(void)
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@@ -98,7 +114,6 @@ void board_early_init(void)
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int checkboard (void)
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{
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- DECLARE_GLOBAL_DATA_PTR;
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printf("Board: Qi LB60 (Ingenic XBurst Jz4740 SoC, Speed %d MHz)\n",
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gd->cpu_clk/1000000);
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diff --git a/common/env_common.c b/common/env_common.c
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diff --git a/common/env_common.c b/common/env_common.c
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index 439a4a9..6cfe30b 100644
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index 439a4a9..6cfe30b 100644
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--- a/common/env_common.c
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--- a/common/env_common.c
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@ -267,15 +181,16 @@ index 10d8904..ff11ad7 100644
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# ifdef CONFIG_BOOT_RETRY_TIME
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# ifdef CONFIG_BOOT_RETRY_TIME
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diff --git a/cpu/mips/Makefile b/cpu/mips/Makefile
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diff --git a/cpu/mips/Makefile b/cpu/mips/Makefile
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index 28a1cbb..5207bc5 100644
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index 28a1cbb..33afb66 100644
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--- a/cpu/mips/Makefile
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--- a/cpu/mips/Makefile
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+++ b/cpu/mips/Makefile
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+++ b/cpu/mips/Makefile
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@@ -33,6 +33,10 @@ SOBJS-$(CONFIG_INCA_IP) += incaip_wdt.o
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@@ -32,7 +32,10 @@ COBJS-y = cpu.o interrupts.o
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SOBJS-$(CONFIG_INCA_IP) += incaip_wdt.o
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COBJS-$(CONFIG_INCA_IP) += asc_serial.o incaip_clock.o
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COBJS-$(CONFIG_INCA_IP) += asc_serial.o incaip_clock.o
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COBJS-$(CONFIG_PURPLE) += asc_serial.o
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COBJS-$(CONFIG_PURPLE) += asc_serial.o
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COBJS-$(CONFIG_SOC_AU1X00) += au1x00_eth.o au1x00_serial.o au1x00_usb_ohci.o
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-COBJS-$(CONFIG_SOC_AU1X00) += au1x00_eth.o au1x00_serial.o au1x00_usb_ohci.o
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+COBJS-$(CONFIG_JZSOC) += jz4740.o jz_serial.o jz_i2c.o jz_mmc.o jz4740_nand.o
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+COBJS-$(CONFIG_JZSOC) += jz_serial.o jz_i2c.o jz_mmc.o
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+COBJS-$(CONFIG_DRIVER_CS8900) += jz_cs8900.o
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+COBJS-$(CONFIG_JZ4740) += jz4740.o jz4740_nand.o
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+COBJS-$(CONFIG_QI_LB60) += qi_lb60_gpm940b0.o
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+COBJS-$(CONFIG_QI_LB60) += qi_lb60_gpm940b0.o
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+
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+
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@ -1514,19 +1429,6 @@ index b2c4891..23f597e 100644
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unsigned long baudrate;
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unsigned long baudrate;
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unsigned long have_console; /* serial_init() was called */
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unsigned long have_console; /* serial_init() was called */
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phys_size_t ram_size; /* RAM size */
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phys_size_t ram_size; /* RAM size */
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diff --git a/include/configs/qi_lb60.h b/include/configs/qi_lb60.h
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index 02af607..c3bf9c7 100644
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--- a/include/configs/qi_lb60.h
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+++ b/include/configs/qi_lb60.h
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@@ -45,6 +45,8 @@
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#define CONFIG_BOOTDELAY 0
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#define CONFIG_BOOTFILE "uImage" /* file to load */
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#define CONFIG_BOOTARGS "mem=32M console=ttyS0,57600n8 ubi.mtd=2 rootfstype=ubifs root=ubi0:rootfs rw rootwait"
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+#define CONFIG_EXTRA_ENV_SETTINGS 1
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+#define CONFIG_BOOTARGSFROMSD "mem=32M console=ttyS0,57600n8 rootfstype=ext2 root=/dev/mmcblk0p1 rw rootwait"
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#define CONFIG_BOOTCOMMAND "nand read 0x80600000 0x400000 0x200000;bootm"
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/*
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diff --git a/include/lcd.h b/include/lcd.h
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diff --git a/include/lcd.h b/include/lcd.h
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index 1f85daa..997e246 100644
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index 1f85daa..997e246 100644
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--- a/include/lcd.h
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--- a/include/lcd.h
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@ -1745,83 +1647,3 @@ index 07e356d..4654bf4 100644
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}
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}
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+
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+
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+#endif /* !CONFIG_JzRISC */
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+#endif /* !CONFIG_JzRISC */
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diff --git a/nand_spl/nand_boot_jz4740.c b/nand_spl/nand_boot_jz4740.c
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index 924a47a..146de19 100644
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--- a/nand_spl/nand_boot_jz4740.c
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+++ b/nand_spl/nand_boot_jz4740.c
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@@ -24,10 +24,8 @@
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#include <asm/io.h>
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#include <asm/jz4740.h>
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-#define KEY_1_OUT (32 * 3 + 21)
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-#define KEY_1_IN (32 * 3 + 19)
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-#define KEY_2_OUT (32 * 3 + 25)
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-#define KEY_2_IN (32 * 3 + 26)
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+#define KEY_U_OUT (32 * 2 + 16)
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+#define KEY_U_IN (32 * 3 + 19)
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/*
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* NAND flash definitions
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@@ -350,40 +348,25 @@ static void gpio_init(void)
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static int is_usb_boot()
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{
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- int key2,keyh;
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-
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- key2 = 0;
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- keyh = 0;
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+ int keyU = 0;
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- __gpio_as_output(KEY_1_OUT);
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- __gpio_as_output(KEY_2_OUT);
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- __gpio_as_input(KEY_1_IN);
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- __gpio_as_input(KEY_2_IN);
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- __gpio_disable_pull(KEY_1_IN);
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- __gpio_disable_pull(KEY_2_IN);
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+ __gpio_as_input(KEY_U_IN);
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+ __gpio_enable_pull(KEY_U_IN);
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- __gpio_clear_pin(KEY_1_OUT);
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- __gpio_clear_pin(KEY_2_OUT);
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-
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- key2 = __gpio_get_pin(KEY_2_IN);
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- keyh = __gpio_get_pin(KEY_1_IN);
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+ __gpio_as_output(KEY_U_OUT);
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+ __gpio_clear_pin(KEY_U_OUT);
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- if(key2)
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- serial_puts("key2");
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- else
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- serial_puts("key2--");
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+ keyU = __gpio_get_pin(KEY_U_IN);
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- if(keyh)
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- serial_puts("keyh");
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+ if (keyU)
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+ serial_puts("[U] not pressed\n");
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else
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- serial_puts("keyh--");
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+ serial_puts("[U] pressed\n");
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-
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- if( ( key2 == 0 ) && ( keyh == 0 ) )
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+ if (keyU == 0)
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return 1;
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else
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return 0;
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-
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}
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void nand_boot(void)
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@@ -402,9 +385,8 @@ void nand_boot(void)
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pll_init();
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sdram_init();
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- int ret = 0;
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- ret = is_usb_boot();
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- if(ret) {
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+ if(is_usb_boot()) {
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+ serial_puts("enter USB BOOT mode\n");
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usb_boot();
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}
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