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ar71xx: add ar71xx_gpio_function_setup
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@20053 3c298f89-4303-0410-b956-a3cf2f4a3e73
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@ -1,7 +1,7 @@
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/*
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/*
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* Atheros AR71xx SoC GPIO API support
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* Atheros AR71xx SoC GPIO API support
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*
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*
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* Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* This program is free software; you can redistribute it and/or modify it
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@ -109,6 +109,8 @@ void ar71xx_gpio_function_enable(u32 mask)
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spin_lock_irqsave(&ar71xx_gpio_lock, flags);
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spin_lock_irqsave(&ar71xx_gpio_lock, flags);
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ar71xx_gpio_wr(GPIO_REG_FUNC, ar71xx_gpio_rr(GPIO_REG_FUNC) | mask);
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ar71xx_gpio_wr(GPIO_REG_FUNC, ar71xx_gpio_rr(GPIO_REG_FUNC) | mask);
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/* flush write */
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(void) ar71xx_gpio_rr(GPIO_REG_FUNC);
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spin_unlock_irqrestore(&ar71xx_gpio_lock, flags);
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spin_unlock_irqrestore(&ar71xx_gpio_lock, flags);
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}
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}
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@ -120,10 +122,27 @@ void ar71xx_gpio_function_disable(u32 mask)
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spin_lock_irqsave(&ar71xx_gpio_lock, flags);
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spin_lock_irqsave(&ar71xx_gpio_lock, flags);
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ar71xx_gpio_wr(GPIO_REG_FUNC, ar71xx_gpio_rr(GPIO_REG_FUNC) & ~mask);
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ar71xx_gpio_wr(GPIO_REG_FUNC, ar71xx_gpio_rr(GPIO_REG_FUNC) & ~mask);
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/* flush write */
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(void) ar71xx_gpio_rr(GPIO_REG_FUNC);
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spin_unlock_irqrestore(&ar71xx_gpio_lock, flags);
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spin_unlock_irqrestore(&ar71xx_gpio_lock, flags);
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}
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}
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void ar71xx_gpio_function_setup(u32 set, u32 clear)
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{
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unsigned long flags;
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spin_lock_irqsave(&ar71xx_gpio_lock, flags);
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ar71xx_gpio_wr(GPIO_REG_FUNC,
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(ar71xx_gpio_rr(GPIO_REG_FUNC) & ~clear) | set);
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/* flush write */
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(void) ar71xx_gpio_rr(GPIO_REG_FUNC);
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spin_unlock_irqrestore(&ar71xx_gpio_lock, flags);
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}
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EXPORT_SYMBOL(ar71xx_gpio_function_setup);
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void __init ar71xx_gpio_init(void)
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void __init ar71xx_gpio_init(void)
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{
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{
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int err;
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int err;
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@ -269,6 +269,7 @@ static inline u32 ar71xx_gpio_rr(unsigned reg)
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void ar71xx_gpio_init(void) __init;
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void ar71xx_gpio_init(void) __init;
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void ar71xx_gpio_function_enable(u32 mask);
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void ar71xx_gpio_function_enable(u32 mask);
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void ar71xx_gpio_function_disable(u32 mask);
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void ar71xx_gpio_function_disable(u32 mask);
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void ar71xx_gpio_function_setup(u32 set, u32 clear);
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/*
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/*
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* DDR_CTRL block
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* DDR_CTRL block
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