mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-24 19:37:43 +02:00
ath5k: add some more performance improvements
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@26566 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
parent
42a36fdda9
commit
fbadef915d
@ -0,0 +1,89 @@
|
|||||||
|
--- a/drivers/net/wireless/ath/ath5k/desc.c
|
||||||
|
+++ b/drivers/net/wireless/ath/ath5k/desc.c
|
||||||
|
@@ -184,6 +184,7 @@ static int ath5k_hw_setup_4word_tx_desc(
|
||||||
|
{
|
||||||
|
struct ath5k_hw_4w_tx_ctl *tx_ctl;
|
||||||
|
unsigned int frame_len;
|
||||||
|
+ u32 txctl0 = 0, txctl1 = 0, txctl2 = 0, txctl3 = 0;
|
||||||
|
|
||||||
|
tx_ctl = &desc->ud.ds_tx5212.tx_ctl;
|
||||||
|
|
||||||
|
@@ -209,7 +210,8 @@ static int ath5k_hw_setup_4word_tx_desc(
|
||||||
|
tx_power = AR5K_TUNE_MAX_TXPOWER;
|
||||||
|
|
||||||
|
/* Clear descriptor */
|
||||||
|
- memset(&desc->ud.ds_tx5212, 0, sizeof(struct ath5k_hw_5212_tx_desc));
|
||||||
|
+ memset(&desc->ud.ds_tx5212.tx_stat, 0,
|
||||||
|
+ sizeof(desc->ud.ds_tx5212.tx_stat));
|
||||||
|
|
||||||
|
/* Setup control descriptor */
|
||||||
|
|
||||||
|
@@ -221,7 +223,7 @@ static int ath5k_hw_setup_4word_tx_desc(
|
||||||
|
if (frame_len & ~AR5K_4W_TX_DESC_CTL0_FRAME_LEN)
|
||||||
|
return -EINVAL;
|
||||||
|
|
||||||
|
- tx_ctl->tx_control_0 = frame_len & AR5K_4W_TX_DESC_CTL0_FRAME_LEN;
|
||||||
|
+ txctl0 = frame_len & AR5K_4W_TX_DESC_CTL0_FRAME_LEN;
|
||||||
|
|
||||||
|
/* Verify and set buffer length */
|
||||||
|
|
||||||
|
@@ -232,21 +234,17 @@ static int ath5k_hw_setup_4word_tx_desc(
|
||||||
|
if (pkt_len & ~AR5K_4W_TX_DESC_CTL1_BUF_LEN)
|
||||||
|
return -EINVAL;
|
||||||
|
|
||||||
|
- tx_ctl->tx_control_1 = pkt_len & AR5K_4W_TX_DESC_CTL1_BUF_LEN;
|
||||||
|
+ txctl1 = pkt_len & AR5K_4W_TX_DESC_CTL1_BUF_LEN;
|
||||||
|
|
||||||
|
- tx_ctl->tx_control_0 |=
|
||||||
|
- AR5K_REG_SM(tx_power, AR5K_4W_TX_DESC_CTL0_XMIT_POWER) |
|
||||||
|
- AR5K_REG_SM(antenna_mode, AR5K_4W_TX_DESC_CTL0_ANT_MODE_XMIT);
|
||||||
|
- tx_ctl->tx_control_1 |= AR5K_REG_SM(type,
|
||||||
|
- AR5K_4W_TX_DESC_CTL1_FRAME_TYPE);
|
||||||
|
- tx_ctl->tx_control_2 = AR5K_REG_SM(tx_tries0,
|
||||||
|
- AR5K_4W_TX_DESC_CTL2_XMIT_TRIES0);
|
||||||
|
- tx_ctl->tx_control_3 = tx_rate0 & AR5K_4W_TX_DESC_CTL3_XMIT_RATE0;
|
||||||
|
+ txctl0 |= AR5K_REG_SM(tx_power, AR5K_4W_TX_DESC_CTL0_XMIT_POWER) |
|
||||||
|
+ AR5K_REG_SM(antenna_mode, AR5K_4W_TX_DESC_CTL0_ANT_MODE_XMIT);
|
||||||
|
+ txctl1 |= AR5K_REG_SM(type, AR5K_4W_TX_DESC_CTL1_FRAME_TYPE);
|
||||||
|
+ txctl2 = AR5K_REG_SM(tx_tries0, AR5K_4W_TX_DESC_CTL2_XMIT_TRIES0);
|
||||||
|
+ txctl3 = tx_rate0 & AR5K_4W_TX_DESC_CTL3_XMIT_RATE0;
|
||||||
|
|
||||||
|
#define _TX_FLAGS(_c, _flag) \
|
||||||
|
if (flags & AR5K_TXDESC_##_flag) { \
|
||||||
|
- tx_ctl->tx_control_##_c |= \
|
||||||
|
- AR5K_4W_TX_DESC_CTL##_c##_##_flag; \
|
||||||
|
+ txctl##_c |= AR5K_4W_TX_DESC_CTL##_c##_##_flag; \
|
||||||
|
}
|
||||||
|
|
||||||
|
_TX_FLAGS(0, CLRDMASK);
|
||||||
|
@@ -262,8 +260,8 @@ static int ath5k_hw_setup_4word_tx_desc(
|
||||||
|
* WEP crap
|
||||||
|
*/
|
||||||
|
if (key_index != AR5K_TXKEYIX_INVALID) {
|
||||||
|
- tx_ctl->tx_control_0 |= AR5K_4W_TX_DESC_CTL0_ENCRYPT_KEY_VALID;
|
||||||
|
- tx_ctl->tx_control_1 |= AR5K_REG_SM(key_index,
|
||||||
|
+ txctl0 |= AR5K_4W_TX_DESC_CTL0_ENCRYPT_KEY_VALID;
|
||||||
|
+ txctl1 |= AR5K_REG_SM(key_index,
|
||||||
|
AR5K_4W_TX_DESC_CTL1_ENCRYPT_KEY_IDX);
|
||||||
|
}
|
||||||
|
|
||||||
|
@@ -274,12 +272,16 @@ static int ath5k_hw_setup_4word_tx_desc(
|
||||||
|
if ((flags & AR5K_TXDESC_RTSENA) &&
|
||||||
|
(flags & AR5K_TXDESC_CTSENA))
|
||||||
|
return -EINVAL;
|
||||||
|
- tx_ctl->tx_control_2 |= rtscts_duration &
|
||||||
|
- AR5K_4W_TX_DESC_CTL2_RTS_DURATION;
|
||||||
|
- tx_ctl->tx_control_3 |= AR5K_REG_SM(rtscts_rate,
|
||||||
|
+ txctl2 |= rtscts_duration & AR5K_4W_TX_DESC_CTL2_RTS_DURATION;
|
||||||
|
+ txctl3 |= AR5K_REG_SM(rtscts_rate,
|
||||||
|
AR5K_4W_TX_DESC_CTL3_RTS_CTS_RATE);
|
||||||
|
}
|
||||||
|
|
||||||
|
+ tx_ctl->tx_control_0 = txctl0;
|
||||||
|
+ tx_ctl->tx_control_1 = txctl1;
|
||||||
|
+ tx_ctl->tx_control_2 = txctl2;
|
||||||
|
+ tx_ctl->tx_control_3 = txctl3;
|
||||||
|
+
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
54
package/mac80211/patches/465-ath5k_remove_ts_rate.patch
Normal file
54
package/mac80211/patches/465-ath5k_remove_ts_rate.patch
Normal file
@ -0,0 +1,54 @@
|
|||||||
|
--- a/drivers/net/wireless/ath/ath5k/ath5k.h
|
||||||
|
+++ b/drivers/net/wireless/ath/ath5k/ath5k.h
|
||||||
|
@@ -452,7 +452,6 @@ struct ath5k_tx_status {
|
||||||
|
u16 ts_seqnum;
|
||||||
|
u16 ts_tstamp;
|
||||||
|
u8 ts_status;
|
||||||
|
- u8 ts_rate[4];
|
||||||
|
u8 ts_retry[4];
|
||||||
|
u8 ts_final_idx;
|
||||||
|
s8 ts_rssi;
|
||||||
|
--- a/drivers/net/wireless/ath/ath5k/desc.c
|
||||||
|
+++ b/drivers/net/wireless/ath/ath5k/desc.c
|
||||||
|
@@ -375,8 +375,6 @@ static int ath5k_hw_proc_2word_tx_status
|
||||||
|
AR5K_DESC_TX_STATUS1_ACK_SIG_STRENGTH);
|
||||||
|
ts->ts_antenna = 1;
|
||||||
|
ts->ts_status = 0;
|
||||||
|
- ts->ts_rate[0] = AR5K_REG_MS(tx_ctl->tx_control_0,
|
||||||
|
- AR5K_2W_TX_DESC_CTL0_XMIT_RATE);
|
||||||
|
ts->ts_retry[0] = ts->ts_longretry;
|
||||||
|
ts->ts_final_idx = 0;
|
||||||
|
|
||||||
|
@@ -439,32 +437,21 @@ static int ath5k_hw_proc_4word_tx_status
|
||||||
|
ts->ts_retry[ts->ts_final_idx] = ts->ts_longretry;
|
||||||
|
switch (ts->ts_final_idx) {
|
||||||
|
case 3:
|
||||||
|
- ts->ts_rate[3] = AR5K_REG_MS(tx_ctl->tx_control_3,
|
||||||
|
- AR5K_4W_TX_DESC_CTL3_XMIT_RATE3);
|
||||||
|
-
|
||||||
|
ts->ts_retry[2] = AR5K_REG_MS(tx_ctl->tx_control_2,
|
||||||
|
AR5K_4W_TX_DESC_CTL2_XMIT_TRIES2);
|
||||||
|
ts->ts_longretry += ts->ts_retry[2];
|
||||||
|
/* fall through */
|
||||||
|
case 2:
|
||||||
|
- ts->ts_rate[2] = AR5K_REG_MS(tx_ctl->tx_control_3,
|
||||||
|
- AR5K_4W_TX_DESC_CTL3_XMIT_RATE2);
|
||||||
|
-
|
||||||
|
ts->ts_retry[1] = AR5K_REG_MS(tx_ctl->tx_control_2,
|
||||||
|
AR5K_4W_TX_DESC_CTL2_XMIT_TRIES1);
|
||||||
|
ts->ts_longretry += ts->ts_retry[1];
|
||||||
|
/* fall through */
|
||||||
|
case 1:
|
||||||
|
- ts->ts_rate[1] = AR5K_REG_MS(tx_ctl->tx_control_3,
|
||||||
|
- AR5K_4W_TX_DESC_CTL3_XMIT_RATE1);
|
||||||
|
-
|
||||||
|
ts->ts_retry[0] = AR5K_REG_MS(tx_ctl->tx_control_2,
|
||||||
|
AR5K_4W_TX_DESC_CTL2_XMIT_TRIES1);
|
||||||
|
ts->ts_longretry += ts->ts_retry[0];
|
||||||
|
/* fall through */
|
||||||
|
case 0:
|
||||||
|
- ts->ts_rate[0] = tx_ctl->tx_control_3 &
|
||||||
|
- AR5K_4W_TX_DESC_CTL3_XMIT_RATE0;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
90
package/mac80211/patches/466-ath5k_optimize_tx_status.patch
Normal file
90
package/mac80211/patches/466-ath5k_optimize_tx_status.patch
Normal file
@ -0,0 +1,90 @@
|
|||||||
|
--- a/drivers/net/wireless/ath/ath5k/desc.c
|
||||||
|
+++ b/drivers/net/wireless/ath/ath5k/desc.c
|
||||||
|
@@ -401,32 +401,38 @@ static int ath5k_hw_proc_4word_tx_status
|
||||||
|
{
|
||||||
|
struct ath5k_hw_4w_tx_ctl *tx_ctl;
|
||||||
|
struct ath5k_hw_tx_status *tx_status;
|
||||||
|
+ u32 txstat0, txstat1, txctl2;
|
||||||
|
|
||||||
|
tx_ctl = &desc->ud.ds_tx5212.tx_ctl;
|
||||||
|
tx_status = &desc->ud.ds_tx5212.tx_stat;
|
||||||
|
|
||||||
|
+ txstat1 = ACCESS_ONCE(tx_status->tx_status_1);
|
||||||
|
+
|
||||||
|
/* No frame has been send or error */
|
||||||
|
- if (unlikely(!(tx_status->tx_status_1 & AR5K_DESC_TX_STATUS1_DONE)))
|
||||||
|
+ if (unlikely(!(txstat1 & AR5K_DESC_TX_STATUS1_DONE)))
|
||||||
|
return -EINPROGRESS;
|
||||||
|
|
||||||
|
+ txstat0 = ACCESS_ONCE(tx_status->tx_status_0);
|
||||||
|
+ txctl2 = ACCESS_ONCE(tx_ctl->tx_control_2);
|
||||||
|
+
|
||||||
|
/*
|
||||||
|
* Get descriptor status
|
||||||
|
*/
|
||||||
|
- ts->ts_tstamp = AR5K_REG_MS(tx_status->tx_status_0,
|
||||||
|
+ ts->ts_tstamp = AR5K_REG_MS(txstat0,
|
||||||
|
AR5K_DESC_TX_STATUS0_SEND_TIMESTAMP);
|
||||||
|
- ts->ts_shortretry = AR5K_REG_MS(tx_status->tx_status_0,
|
||||||
|
+ ts->ts_shortretry = AR5K_REG_MS(txstat0,
|
||||||
|
AR5K_DESC_TX_STATUS0_SHORT_RETRY_COUNT);
|
||||||
|
- ts->ts_longretry = AR5K_REG_MS(tx_status->tx_status_0,
|
||||||
|
+ ts->ts_longretry = AR5K_REG_MS(txstat0,
|
||||||
|
AR5K_DESC_TX_STATUS0_LONG_RETRY_COUNT);
|
||||||
|
- ts->ts_seqnum = AR5K_REG_MS(tx_status->tx_status_1,
|
||||||
|
+ ts->ts_seqnum = AR5K_REG_MS(txstat1,
|
||||||
|
AR5K_DESC_TX_STATUS1_SEQ_NUM);
|
||||||
|
- ts->ts_rssi = AR5K_REG_MS(tx_status->tx_status_1,
|
||||||
|
+ ts->ts_rssi = AR5K_REG_MS(txstat1,
|
||||||
|
AR5K_DESC_TX_STATUS1_ACK_SIG_STRENGTH);
|
||||||
|
- ts->ts_antenna = (tx_status->tx_status_1 &
|
||||||
|
+ ts->ts_antenna = (txstat1 &
|
||||||
|
AR5K_DESC_TX_STATUS1_XMIT_ANTENNA_5212) ? 2 : 1;
|
||||||
|
ts->ts_status = 0;
|
||||||
|
|
||||||
|
- ts->ts_final_idx = AR5K_REG_MS(tx_status->tx_status_1,
|
||||||
|
+ ts->ts_final_idx = AR5K_REG_MS(txstat1,
|
||||||
|
AR5K_DESC_TX_STATUS1_FINAL_TS_IX_5212);
|
||||||
|
|
||||||
|
/* The longretry counter has the number of un-acked retries
|
||||||
|
@@ -437,17 +443,17 @@ static int ath5k_hw_proc_4word_tx_status
|
||||||
|
ts->ts_retry[ts->ts_final_idx] = ts->ts_longretry;
|
||||||
|
switch (ts->ts_final_idx) {
|
||||||
|
case 3:
|
||||||
|
- ts->ts_retry[2] = AR5K_REG_MS(tx_ctl->tx_control_2,
|
||||||
|
+ ts->ts_retry[2] = AR5K_REG_MS(txctl2,
|
||||||
|
AR5K_4W_TX_DESC_CTL2_XMIT_TRIES2);
|
||||||
|
ts->ts_longretry += ts->ts_retry[2];
|
||||||
|
/* fall through */
|
||||||
|
case 2:
|
||||||
|
- ts->ts_retry[1] = AR5K_REG_MS(tx_ctl->tx_control_2,
|
||||||
|
+ ts->ts_retry[1] = AR5K_REG_MS(txctl2,
|
||||||
|
AR5K_4W_TX_DESC_CTL2_XMIT_TRIES1);
|
||||||
|
ts->ts_longretry += ts->ts_retry[1];
|
||||||
|
/* fall through */
|
||||||
|
case 1:
|
||||||
|
- ts->ts_retry[0] = AR5K_REG_MS(tx_ctl->tx_control_2,
|
||||||
|
+ ts->ts_retry[0] = AR5K_REG_MS(txctl2,
|
||||||
|
AR5K_4W_TX_DESC_CTL2_XMIT_TRIES1);
|
||||||
|
ts->ts_longretry += ts->ts_retry[0];
|
||||||
|
/* fall through */
|
||||||
|
@@ -456,15 +462,14 @@ static int ath5k_hw_proc_4word_tx_status
|
||||||
|
}
|
||||||
|
|
||||||
|
/* TX error */
|
||||||
|
- if (!(tx_status->tx_status_0 & AR5K_DESC_TX_STATUS0_FRAME_XMIT_OK)) {
|
||||||
|
- if (tx_status->tx_status_0 &
|
||||||
|
- AR5K_DESC_TX_STATUS0_EXCESSIVE_RETRIES)
|
||||||
|
+ if (!(txstat0 & AR5K_DESC_TX_STATUS0_FRAME_XMIT_OK)) {
|
||||||
|
+ if (txstat0 & AR5K_DESC_TX_STATUS0_EXCESSIVE_RETRIES)
|
||||||
|
ts->ts_status |= AR5K_TXERR_XRETRY;
|
||||||
|
|
||||||
|
- if (tx_status->tx_status_0 & AR5K_DESC_TX_STATUS0_FIFO_UNDERRUN)
|
||||||
|
+ if (txstat0 & AR5K_DESC_TX_STATUS0_FIFO_UNDERRUN)
|
||||||
|
ts->ts_status |= AR5K_TXERR_FIFO;
|
||||||
|
|
||||||
|
- if (tx_status->tx_status_0 & AR5K_DESC_TX_STATUS0_FILTERED)
|
||||||
|
+ if (txstat0 & AR5K_DESC_TX_STATUS0_FILTERED)
|
||||||
|
ts->ts_status |= AR5K_TXERR_FILT;
|
||||||
|
}
|
||||||
|
|
86
package/mac80211/patches/467-ath5k_optimize_rx_status.patch
Normal file
86
package/mac80211/patches/467-ath5k_optimize_rx_status.patch
Normal file
@ -0,0 +1,86 @@
|
|||||||
|
--- a/drivers/net/wireless/ath/ath5k/desc.c
|
||||||
|
+++ b/drivers/net/wireless/ath/ath5k/desc.c
|
||||||
|
@@ -603,37 +603,37 @@ static int ath5k_hw_proc_5212_rx_status(
|
||||||
|
struct ath5k_rx_status *rs)
|
||||||
|
{
|
||||||
|
struct ath5k_hw_rx_status *rx_status;
|
||||||
|
+ u32 rxstat0, rxstat1;
|
||||||
|
|
||||||
|
rx_status = &desc->ud.ds_rx.rx_stat;
|
||||||
|
+ rxstat1 = ACCESS_ONCE(rx_status->rx_status_1);
|
||||||
|
|
||||||
|
/* No frame received / not ready */
|
||||||
|
- if (unlikely(!(rx_status->rx_status_1 &
|
||||||
|
- AR5K_5212_RX_DESC_STATUS1_DONE)))
|
||||||
|
+ if (unlikely(!(rxstat1 & AR5K_5212_RX_DESC_STATUS1_DONE)))
|
||||||
|
return -EINPROGRESS;
|
||||||
|
|
||||||
|
memset(rs, 0, sizeof(struct ath5k_rx_status));
|
||||||
|
+ rxstat0 = ACCESS_ONCE(rx_status->rx_status_0);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Frame receive status
|
||||||
|
*/
|
||||||
|
- rs->rs_datalen = rx_status->rx_status_0 &
|
||||||
|
- AR5K_5212_RX_DESC_STATUS0_DATA_LEN;
|
||||||
|
- rs->rs_rssi = AR5K_REG_MS(rx_status->rx_status_0,
|
||||||
|
+ rs->rs_datalen = rxstat0 & AR5K_5212_RX_DESC_STATUS0_DATA_LEN;
|
||||||
|
+ rs->rs_rssi = AR5K_REG_MS(rxstat0,
|
||||||
|
AR5K_5212_RX_DESC_STATUS0_RECEIVE_SIGNAL);
|
||||||
|
- rs->rs_rate = AR5K_REG_MS(rx_status->rx_status_0,
|
||||||
|
+ rs->rs_rate = AR5K_REG_MS(rxstat0,
|
||||||
|
AR5K_5212_RX_DESC_STATUS0_RECEIVE_RATE);
|
||||||
|
- rs->rs_antenna = AR5K_REG_MS(rx_status->rx_status_0,
|
||||||
|
+ rs->rs_antenna = AR5K_REG_MS(rxstat0,
|
||||||
|
AR5K_5212_RX_DESC_STATUS0_RECEIVE_ANTENNA);
|
||||||
|
- rs->rs_more = !!(rx_status->rx_status_0 &
|
||||||
|
- AR5K_5212_RX_DESC_STATUS0_MORE);
|
||||||
|
- rs->rs_tstamp = AR5K_REG_MS(rx_status->rx_status_1,
|
||||||
|
+ rs->rs_more = !!(rxstat0 & AR5K_5212_RX_DESC_STATUS0_MORE);
|
||||||
|
+ rs->rs_tstamp = AR5K_REG_MS(rxstat1,
|
||||||
|
AR5K_5212_RX_DESC_STATUS1_RECEIVE_TIMESTAMP);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Key table status
|
||||||
|
*/
|
||||||
|
- if (rx_status->rx_status_1 & AR5K_5212_RX_DESC_STATUS1_KEY_INDEX_VALID)
|
||||||
|
- rs->rs_keyix = AR5K_REG_MS(rx_status->rx_status_1,
|
||||||
|
+ if (rxstat1 & AR5K_5212_RX_DESC_STATUS1_KEY_INDEX_VALID)
|
||||||
|
+ rs->rs_keyix = AR5K_REG_MS(rxstat1,
|
||||||
|
AR5K_5212_RX_DESC_STATUS1_KEY_INDEX);
|
||||||
|
else
|
||||||
|
rs->rs_keyix = AR5K_RXKEYIX_INVALID;
|
||||||
|
@@ -641,27 +641,22 @@ static int ath5k_hw_proc_5212_rx_status(
|
||||||
|
/*
|
||||||
|
* Receive/descriptor errors
|
||||||
|
*/
|
||||||
|
- if (!(rx_status->rx_status_1 &
|
||||||
|
- AR5K_5212_RX_DESC_STATUS1_FRAME_RECEIVE_OK)) {
|
||||||
|
- if (rx_status->rx_status_1 &
|
||||||
|
- AR5K_5212_RX_DESC_STATUS1_CRC_ERROR)
|
||||||
|
+ if (!(rxstat1 & AR5K_5212_RX_DESC_STATUS1_FRAME_RECEIVE_OK)) {
|
||||||
|
+ if (rxstat1 & AR5K_5212_RX_DESC_STATUS1_CRC_ERROR)
|
||||||
|
rs->rs_status |= AR5K_RXERR_CRC;
|
||||||
|
|
||||||
|
- if (rx_status->rx_status_1 &
|
||||||
|
- AR5K_5212_RX_DESC_STATUS1_PHY_ERROR) {
|
||||||
|
+ if (rxstat1 & AR5K_5212_RX_DESC_STATUS1_PHY_ERROR) {
|
||||||
|
rs->rs_status |= AR5K_RXERR_PHY;
|
||||||
|
- rs->rs_phyerr = AR5K_REG_MS(rx_status->rx_status_1,
|
||||||
|
+ rs->rs_phyerr = AR5K_REG_MS(rxstat1,
|
||||||
|
AR5K_5212_RX_DESC_STATUS1_PHY_ERROR_CODE);
|
||||||
|
if (!ah->ah_capabilities.cap_has_phyerr_counters)
|
||||||
|
ath5k_ani_phy_error_report(ah, rs->rs_phyerr);
|
||||||
|
}
|
||||||
|
|
||||||
|
- if (rx_status->rx_status_1 &
|
||||||
|
- AR5K_5212_RX_DESC_STATUS1_DECRYPT_CRC_ERROR)
|
||||||
|
+ if (rxstat1 & AR5K_5212_RX_DESC_STATUS1_DECRYPT_CRC_ERROR)
|
||||||
|
rs->rs_status |= AR5K_RXERR_DECRYPT;
|
||||||
|
|
||||||
|
- if (rx_status->rx_status_1 &
|
||||||
|
- AR5K_5212_RX_DESC_STATUS1_MIC_ERROR)
|
||||||
|
+ if (rxstat1 & AR5K_5212_RX_DESC_STATUS1_MIC_ERROR)
|
||||||
|
rs->rs_status |= AR5K_RXERR_MIC;
|
||||||
|
}
|
||||||
|
return 0;
|
125
package/mac80211/patches/468-ath5k_remove_ts_retry.patch
Normal file
125
package/mac80211/patches/468-ath5k_remove_ts_retry.patch
Normal file
@ -0,0 +1,125 @@
|
|||||||
|
--- a/drivers/net/wireless/ath/ath5k/ath5k.h
|
||||||
|
+++ b/drivers/net/wireless/ath/ath5k/ath5k.h
|
||||||
|
@@ -452,11 +452,10 @@ struct ath5k_tx_status {
|
||||||
|
u16 ts_seqnum;
|
||||||
|
u16 ts_tstamp;
|
||||||
|
u8 ts_status;
|
||||||
|
- u8 ts_retry[4];
|
||||||
|
u8 ts_final_idx;
|
||||||
|
+ u8 ts_final_retry;
|
||||||
|
s8 ts_rssi;
|
||||||
|
u8 ts_shortretry;
|
||||||
|
- u8 ts_longretry;
|
||||||
|
u8 ts_virtcol;
|
||||||
|
u8 ts_antenna;
|
||||||
|
};
|
||||||
|
--- a/drivers/net/wireless/ath/ath5k/base.c
|
||||||
|
+++ b/drivers/net/wireless/ath/ath5k/base.c
|
||||||
|
@@ -1573,20 +1573,27 @@ ath5k_tx_frame_completed(struct ath5k_so
|
||||||
|
struct ath5k_txq *txq, struct ath5k_tx_status *ts)
|
||||||
|
{
|
||||||
|
struct ieee80211_tx_info *info;
|
||||||
|
+ u8 tries[3];
|
||||||
|
int i;
|
||||||
|
|
||||||
|
sc->stats.tx_all_count++;
|
||||||
|
sc->stats.tx_bytes_count += skb->len;
|
||||||
|
info = IEEE80211_SKB_CB(skb);
|
||||||
|
|
||||||
|
+ tries[0] = info->status.rates[0].count;
|
||||||
|
+ tries[1] = info->status.rates[1].count;
|
||||||
|
+ tries[2] = info->status.rates[2].count;
|
||||||
|
+
|
||||||
|
ieee80211_tx_info_clear_status(info);
|
||||||
|
- for (i = 0; i <= ts->ts_final_idx; i++) {
|
||||||
|
+
|
||||||
|
+ for (i = 0; i < ts->ts_final_idx; i++) {
|
||||||
|
struct ieee80211_tx_rate *r =
|
||||||
|
&info->status.rates[i];
|
||||||
|
|
||||||
|
- r->count = ts->ts_retry[i];
|
||||||
|
+ r->count = tries[i];
|
||||||
|
}
|
||||||
|
|
||||||
|
+ info->status.rates[ts->ts_final_idx].count = ts->ts_final_retry;
|
||||||
|
info->status.rates[ts->ts_final_idx + 1].idx = -1;
|
||||||
|
|
||||||
|
if (unlikely(ts->ts_status)) {
|
||||||
|
--- a/drivers/net/wireless/ath/ath5k/desc.c
|
||||||
|
+++ b/drivers/net/wireless/ath/ath5k/desc.c
|
||||||
|
@@ -366,7 +366,7 @@ static int ath5k_hw_proc_2word_tx_status
|
||||||
|
AR5K_DESC_TX_STATUS0_SEND_TIMESTAMP);
|
||||||
|
ts->ts_shortretry = AR5K_REG_MS(tx_status->tx_status_0,
|
||||||
|
AR5K_DESC_TX_STATUS0_SHORT_RETRY_COUNT);
|
||||||
|
- ts->ts_longretry = AR5K_REG_MS(tx_status->tx_status_0,
|
||||||
|
+ ts->ts_final_retry = AR5K_REG_MS(tx_status->tx_status_0,
|
||||||
|
AR5K_DESC_TX_STATUS0_LONG_RETRY_COUNT);
|
||||||
|
/*TODO: ts->ts_virtcol + test*/
|
||||||
|
ts->ts_seqnum = AR5K_REG_MS(tx_status->tx_status_1,
|
||||||
|
@@ -375,7 +375,6 @@ static int ath5k_hw_proc_2word_tx_status
|
||||||
|
AR5K_DESC_TX_STATUS1_ACK_SIG_STRENGTH);
|
||||||
|
ts->ts_antenna = 1;
|
||||||
|
ts->ts_status = 0;
|
||||||
|
- ts->ts_retry[0] = ts->ts_longretry;
|
||||||
|
ts->ts_final_idx = 0;
|
||||||
|
|
||||||
|
if (!(tx_status->tx_status_0 & AR5K_DESC_TX_STATUS0_FRAME_XMIT_OK)) {
|
||||||
|
@@ -401,7 +400,7 @@ static int ath5k_hw_proc_4word_tx_status
|
||||||
|
{
|
||||||
|
struct ath5k_hw_4w_tx_ctl *tx_ctl;
|
||||||
|
struct ath5k_hw_tx_status *tx_status;
|
||||||
|
- u32 txstat0, txstat1, txctl2;
|
||||||
|
+ u32 txstat0, txstat1;
|
||||||
|
|
||||||
|
tx_ctl = &desc->ud.ds_tx5212.tx_ctl;
|
||||||
|
tx_status = &desc->ud.ds_tx5212.tx_stat;
|
||||||
|
@@ -413,7 +412,6 @@ static int ath5k_hw_proc_4word_tx_status
|
||||||
|
return -EINPROGRESS;
|
||||||
|
|
||||||
|
txstat0 = ACCESS_ONCE(tx_status->tx_status_0);
|
||||||
|
- txctl2 = ACCESS_ONCE(tx_ctl->tx_control_2);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Get descriptor status
|
||||||
|
@@ -422,7 +420,7 @@ static int ath5k_hw_proc_4word_tx_status
|
||||||
|
AR5K_DESC_TX_STATUS0_SEND_TIMESTAMP);
|
||||||
|
ts->ts_shortretry = AR5K_REG_MS(txstat0,
|
||||||
|
AR5K_DESC_TX_STATUS0_SHORT_RETRY_COUNT);
|
||||||
|
- ts->ts_longretry = AR5K_REG_MS(txstat0,
|
||||||
|
+ ts->ts_final_retry = AR5K_REG_MS(txstat0,
|
||||||
|
AR5K_DESC_TX_STATUS0_LONG_RETRY_COUNT);
|
||||||
|
ts->ts_seqnum = AR5K_REG_MS(txstat1,
|
||||||
|
AR5K_DESC_TX_STATUS1_SEQ_NUM);
|
||||||
|
@@ -435,32 +433,6 @@ static int ath5k_hw_proc_4word_tx_status
|
||||||
|
ts->ts_final_idx = AR5K_REG_MS(txstat1,
|
||||||
|
AR5K_DESC_TX_STATUS1_FINAL_TS_IX_5212);
|
||||||
|
|
||||||
|
- /* The longretry counter has the number of un-acked retries
|
||||||
|
- * for the final rate. To get the total number of retries
|
||||||
|
- * we have to add the retry counters for the other rates
|
||||||
|
- * as well
|
||||||
|
- */
|
||||||
|
- ts->ts_retry[ts->ts_final_idx] = ts->ts_longretry;
|
||||||
|
- switch (ts->ts_final_idx) {
|
||||||
|
- case 3:
|
||||||
|
- ts->ts_retry[2] = AR5K_REG_MS(txctl2,
|
||||||
|
- AR5K_4W_TX_DESC_CTL2_XMIT_TRIES2);
|
||||||
|
- ts->ts_longretry += ts->ts_retry[2];
|
||||||
|
- /* fall through */
|
||||||
|
- case 2:
|
||||||
|
- ts->ts_retry[1] = AR5K_REG_MS(txctl2,
|
||||||
|
- AR5K_4W_TX_DESC_CTL2_XMIT_TRIES1);
|
||||||
|
- ts->ts_longretry += ts->ts_retry[1];
|
||||||
|
- /* fall through */
|
||||||
|
- case 1:
|
||||||
|
- ts->ts_retry[0] = AR5K_REG_MS(txctl2,
|
||||||
|
- AR5K_4W_TX_DESC_CTL2_XMIT_TRIES1);
|
||||||
|
- ts->ts_longretry += ts->ts_retry[0];
|
||||||
|
- /* fall through */
|
||||||
|
- case 0:
|
||||||
|
- break;
|
||||||
|
- }
|
||||||
|
-
|
||||||
|
/* TX error */
|
||||||
|
if (!(txstat0 & AR5K_DESC_TX_STATUS0_FRAME_XMIT_OK)) {
|
||||||
|
if (txstat0 & AR5K_DESC_TX_STATUS0_EXCESSIVE_RETRIES)
|
Loading…
Reference in New Issue
Block a user