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changed Makefile and profiles, added patches for kernel 2.6.24

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(stable-branch of Openmoko)


git-svn-id: svn://svn.openwrt.org/openwrt/trunk@13613 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
mirko
2008-12-12 11:58:53 +00:00
parent d9f49b62b2
commit fc54b9bf15
589 changed files with 178974 additions and 18 deletions
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143
target/linux/s3c24xx/patches-2.6.24/1026-s3c24xx-nand-largepage.patch.patch Normal file
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@@ -0,0 +1,143 @@
From cddfb6f606768265f2b36658761ea9467f098f0a Mon Sep 17 00:00:00 2001
From: mokopatches <mokopatches@openmoko.org>
Date: Fri, 4 Apr 2008 11:33:44 +0100
Subject: [PATCH] s3c24xx-nand-largepage.patch
MTD: S3C24XX large page NAND support
This adds support for using large page NAND devices
with the S3C24XX NAND controller. This also adds the
file Documentation/arm/Samsung-S3C24XX/NAND.txt to
describe the differences.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
---
Documentation/arm/Samsung-S3C24XX/NAND.txt | 30 +++++++++++++++++++
Documentation/arm/Samsung-S3C24XX/Overview.txt | 2 +
drivers/mtd/nand/s3c2410.c | 38 ++++++++++++++++++++---
3 files changed, 65 insertions(+), 5 deletions(-)
create mode 100644 Documentation/arm/Samsung-S3C24XX/NAND.txt
diff --git a/Documentation/arm/Samsung-S3C24XX/NAND.txt b/Documentation/arm/Samsung-S3C24XX/NAND.txt
new file mode 100644
index 0000000..bc478a3
--- /dev/null
+++ b/Documentation/arm/Samsung-S3C24XX/NAND.txt
@@ -0,0 +1,30 @@
+ S3C24XX NAND Support
+ ====================
+
+Introduction
+------------
+
+Small Page NAND
+---------------
+
+The driver uses a 512 byte (1 page) ECC code for this setup. The
+ECC code is not directly compatible with the default kernel ECC
+code, so the driver enforces its own OOB layout and ECC parameters
+
+Large Page NAND
+---------------
+
+The driver is capable of handling NAND flash with a 2KiB page
+size, with support for hardware ECC generation and correction.
+
+Unlike the 512byte page mode, the driver generates ECC data for
+each 256 byte block in an 2KiB page. This means that more than
+one error in a page can be rectified. It also means that the
+OOB layout remains the default kernel layout for these flashes.
+
+
+Document Author
+---------------
+
+Ben Dooks, Copyright 2007 Simtec Electronics
+
diff --git a/Documentation/arm/Samsung-S3C24XX/Overview.txt b/Documentation/arm/Samsung-S3C24XX/Overview.txt
index c31b76f..d04e1e3 100644
--- a/Documentation/arm/Samsung-S3C24XX/Overview.txt
+++ b/Documentation/arm/Samsung-S3C24XX/Overview.txt
@@ -156,6 +156,8 @@ NAND
controller. If there are any problems the latest linux-mtd
code can be found from http://www.linux-mtd.infradead.org/
+ For more information see Documentation/arm/Samsung-S3C24XX/NAND.txt
+
Serial
------
diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c
index 770306c..5c1c09d 100644
--- a/drivers/mtd/nand/s3c2410.c
+++ b/drivers/mtd/nand/s3c2410.c
@@ -473,7 +473,7 @@ static int s3c2440_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u
ecc_code[1] = ecc >> 8;
ecc_code[2] = ecc >> 16;
- pr_debug("%s: returning ecc %06lx\n", __func__, ecc);
+ pr_debug("%s: returning ecc %06lx\n", __func__, ecc & 0xffffff);
return 0;
}
@@ -662,9 +662,6 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
chip->ecc.calculate = s3c2410_nand_calculate_ecc;
chip->ecc.correct = s3c2410_nand_correct_data;
chip->ecc.mode = NAND_ECC_HW;
- chip->ecc.size = 512;
- chip->ecc.bytes = 3;
- chip->ecc.layout = &nand_hw_eccoob;
switch (info->cpu_type) {
case TYPE_S3C2410:
@@ -688,6 +685,34 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
}
}
+/* s3c2410_nand_update_chip
+ *
+ * post-probe chip update, to change any items, such as the
+ * layout for large page nand
+ */
+
+static void s3c2410_nand_update_chip(struct s3c2410_nand_info *info,
+ struct s3c2410_nand_mtd *nmtd)
+{
+ struct nand_chip *chip = &nmtd->chip;
+
+ printk("%s: chip %p: %d\n", __func__, chip, chip->page_shift);
+
+ if (hardware_ecc) {
+ /* change the behaviour depending on wether we are using
+ * the large or small page nand device */
+
+ if (chip->page_shift > 10) {
+ chip->ecc.size = 256;
+ chip->ecc.bytes = 3;
+ } else {
+ chip->ecc.size = 512;
+ chip->ecc.bytes = 3;
+ chip->ecc.layout = &nand_hw_eccoob;
+ }
+ }
+}
+
/* s3c2410_nand_probe
*
* called by device layer when it finds a device matching
@@ -794,9 +819,12 @@ static int s3c24xx_nand_probe(struct platform_device *pdev,
s3c2410_nand_init_chip(info, nmtd, sets);
- nmtd->scan_res = nand_scan(&nmtd->mtd, (sets) ? sets->nr_chips : 1);
+ nmtd->scan_res = nand_scan_ident(&nmtd->mtd,
+ (sets) ? sets->nr_chips : 1);
if (nmtd->scan_res == 0) {
+ s3c2410_nand_update_chip(info, nmtd);
+ nand_scan_tail(&nmtd->mtd);
s3c2410_nand_add_partition(info, nmtd, sets);
}
--
1.5.6.5