mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2025-04-21 12:27:27 +03:00
Merge commit 'nbd/master' into xburst
This commit is contained in:
@@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk
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||||
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||||
BOARD:=adm5120
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BOARDNAME:=Infineon/ADMtek ADM5120
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LINUX_VERSION:=2.6.30.10
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LINUX_VERSION:=2.6.32.9
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SUBTARGETS:=router_le router_be
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INITRAMFS_EXTRA_FILES:=
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||||
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@@ -13,8 +13,8 @@
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||||
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static struct gpio_led br6104kp_gpio_leds[] __initdata = {
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GPIO_LED_STD(ADM5120_GPIO_PIN0, "power", NULL),
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GPIO_LED_STD(ADM5120_GPIO_PIN1, "usb1", NULL),
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GPIO_LED_INV(ADM5120_GPIO_PIN3, "usb2", NULL),
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GPIO_LED_INV(ADM5120_GPIO_PIN3, "usb1", NULL),
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GPIO_LED_INV(ADM5120_GPIO_PIN1, "usb2", NULL),
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GPIO_LED_INV(ADM5120_GPIO_P0L1, "wan_speed", NULL),
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GPIO_LED_INV(ADM5120_GPIO_P0L0, "wan_lnkact", NULL),
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GPIO_LED_INV(ADM5120_GPIO_P1L1, "lan1_speed", NULL),
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@@ -1,57 +0,0 @@
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--- a/arch/mips/Kconfig
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+++ b/arch/mips/Kconfig
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@@ -19,6 +19,21 @@ choice
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prompt "System type"
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default SGI_IP22
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+config ADM5120
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+ bool "Infineon/ADMtek ADM5120 SoC based machines"
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+ select CEVT_R4K
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+ select CSRC_R4K
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+ select SYS_HAS_CPU_MIPS32_R1
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+ select SYS_HAS_EARLY_PRINTK
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+ select DMA_NONCOHERENT
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+ select IRQ_CPU
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+ select SYS_SUPPORTS_LITTLE_ENDIAN
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+ select SYS_SUPPORTS_BIG_ENDIAN
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+ select SYS_SUPPORTS_32BIT_KERNEL
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+ select ARCH_REQUIRE_GPIOLIB
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+ select SWAP_IO_SPACE if CPU_BIG_ENDIAN
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+ select MIPS_MACHINE
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+
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config MACH_ALCHEMY
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bool "Alchemy processor based machines"
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@@ -658,6 +673,7 @@ config CAVIUM_OCTEON_REFERENCE_BOARD
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endchoice
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+source "arch/mips/adm5120/Kconfig"
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source "arch/mips/alchemy/Kconfig"
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source "arch/mips/basler/excite/Kconfig"
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source "arch/mips/jazz/Kconfig"
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--- a/arch/mips/Makefile
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+++ b/arch/mips/Makefile
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@@ -187,6 +187,22 @@ cflags-$(CONFIG_MACH_JAZZ) += -I$(srctre
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load-$(CONFIG_MACH_JAZZ) += 0xffffffff80080000
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#
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+# Infineon/ADMtek ADM5120
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+#
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+libs-$(CONFIG_ADM5120) += arch/mips/adm5120/prom/
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+core-$(CONFIG_ADM5120) += arch/mips/adm5120/common/
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+core-$(CONFIG_ADM5120_OEM_CELLVISION) += arch/mips/adm5120/cellvision/
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+core-$(CONFIG_ADM5120_OEM_COMPEX) += arch/mips/adm5120/compex/
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+core-$(CONFIG_ADM5120_OEM_EDIMAX) += arch/mips/adm5120/edimax/
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+core-$(CONFIG_ADM5120_OEM_INFINEON) += arch/mips/adm5120/infineon/
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+core-$(CONFIG_ADM5120_OEM_MIKROTIK) += arch/mips/adm5120/mikrotik/
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+core-$(CONFIG_ADM5120_OEM_MOTOROLA) += arch/mips/adm5120/motorola/
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+core-$(CONFIG_ADM5120_OEM_OSBRIDGE) += arch/mips/adm5120/osbridge/
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+core-$(CONFIG_ADM5120_OEM_ZYXEL) += arch/mips/adm5120/zyxel/
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+cflags-$(CONFIG_ADM5120) += -I$(srctree)/arch/mips/include/asm/mach-adm5120
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+load-$(CONFIG_ADM5120) += 0xffffffff80001000
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+
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+#
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# Common Alchemy Au1x00 stuff
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#
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core-$(CONFIG_SOC_AU1X00) += arch/mips/alchemy/common/
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@@ -1,21 +0,0 @@
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||||
--- a/drivers/mtd/maps/Kconfig
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+++ b/drivers/mtd/maps/Kconfig
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@@ -546,4 +546,8 @@ config MTD_VMU
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||||
To build this as a module select M here, the module will be called
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||||
vmu-flash.
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||||
+config MTD_ADM5120
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+ tristate "Map driver for ADM5120 based boards"
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+ depends on ADM5120
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||||
+
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||||
endmenu
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--- a/drivers/mtd/maps/Makefile
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||||
+++ b/drivers/mtd/maps/Makefile
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||||
@@ -41,6 +41,7 @@ obj-$(CONFIG_MTD_DBOX2) += dbox2-flash.
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obj-$(CONFIG_MTD_SOLUTIONENGINE)+= solutionengine.o
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obj-$(CONFIG_MTD_PCI) += pci.o
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||||
obj-$(CONFIG_MTD_ALCHEMY) += alchemy-flash.o
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+obj-$(CONFIG_MTD_ADM5120) += adm5120-flash.o
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obj-$(CONFIG_MTD_AUTCPU12) += autcpu12-nvram.o
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obj-$(CONFIG_MTD_EDB7312) += edb7312.o
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obj-$(CONFIG_MTD_IMPA7) += impa7.o
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@@ -1,23 +0,0 @@
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||||
--- a/drivers/net/Kconfig
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+++ b/drivers/net/Kconfig
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||||
@@ -602,6 +602,10 @@ config MIPS_AU1X00_ENET
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If you have an Alchemy Semi AU1X00 based system
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say Y. Otherwise, say N.
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+config ADM5120_ENET
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+ tristate "ADM5120 Ethernet switch support"
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+ depends on ADM5120
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+
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config SGI_IOC3_ETH
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bool "SGI IOC3 Ethernet"
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depends on PCI && SGI_IP27
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--- a/drivers/net/Makefile
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||||
+++ b/drivers/net/Makefile
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||||
@@ -203,6 +203,7 @@ obj-$(CONFIG_SC92031) += sc92031.o
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# This is also a 82596 and should probably be merged
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obj-$(CONFIG_LP486E) += lp486e.o
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+obj-$(CONFIG_ADM5120_ENET) += adm5120sw.o
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obj-$(CONFIG_ETH16I) += eth16i.o
|
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obj-$(CONFIG_ZORRO8390) += zorro8390.o 8390.o
|
||||
obj-$(CONFIG_HPLANCE) += hplance.o 7990.o
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||||
@@ -1,33 +0,0 @@
|
||||
--- a/drivers/usb/Makefile
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||||
+++ b/drivers/usb/Makefile
|
||||
@@ -9,6 +9,7 @@ obj-$(CONFIG_USB) += core/
|
||||
obj-$(CONFIG_USB_MON) += mon/
|
||||
|
||||
obj-$(CONFIG_PCI) += host/
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||||
+obj-$(CONFIG_USB_ADM5120_HCD) += host/
|
||||
obj-$(CONFIG_USB_EHCI_HCD) += host/
|
||||
obj-$(CONFIG_USB_ISP116X_HCD) += host/
|
||||
obj-$(CONFIG_USB_OHCI_HCD) += host/
|
||||
--- a/drivers/usb/host/Kconfig
|
||||
+++ b/drivers/usb/host/Kconfig
|
||||
@@ -4,6 +4,10 @@
|
||||
comment "USB Host Controller Drivers"
|
||||
depends on USB
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||||
|
||||
+config USB_ADM5120_HCD
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+ tristate "ADM5120 HCD support (EXPERIMENTAL)"
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||||
+ depends on USB && ADM5120 && EXPERIMENTAL
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||||
+
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||||
config USB_C67X00_HCD
|
||||
tristate "Cypress C67x00 HCD support"
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||||
depends on USB
|
||||
--- a/drivers/usb/host/Makefile
|
||||
+++ b/drivers/usb/host/Makefile
|
||||
@@ -18,6 +18,7 @@ obj-$(CONFIG_USB_WHCI_HCD) += whci/
|
||||
|
||||
obj-$(CONFIG_PCI) += pci-quirks.o
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||||
|
||||
+obj-$(CONFIG_USB_ADM5120_HCD) += adm5120-hcd.o
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obj-$(CONFIG_USB_EHCI_HCD) += ehci-hcd.o
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obj-$(CONFIG_USB_OXU210HP_HCD) += oxu210hp-hcd.o
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obj-$(CONFIG_USB_ISP116X_HCD) += isp116x-hcd.o
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||||
@@ -1,22 +0,0 @@
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||||
--- a/arch/mips/pci/Makefile
|
||||
+++ b/arch/mips/pci/Makefile
|
||||
@@ -53,6 +53,7 @@ obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capc
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||||
obj-$(CONFIG_WR_PPMC) += fixup-wrppmc.o
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||||
obj-$(CONFIG_MIKROTIK_RB532) += pci-rc32434.o ops-rc32434.o fixup-rc32434.o
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obj-$(CONFIG_CPU_CAVIUM_OCTEON) += pci-octeon.o pcie-octeon.o
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+obj-$(CONFIG_ADM5120) += pci-adm5120.o
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ifdef CONFIG_PCI_MSI
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obj-$(CONFIG_CPU_CAVIUM_OCTEON) += msi-octeon.o
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--- a/include/linux/pci_ids.h
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+++ b/include/linux/pci_ids.h
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||||
@@ -1735,6 +1735,9 @@
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#define PCI_VENDOR_ID_ESDGMBH 0x12fe
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#define PCI_DEVICE_ID_ESDGMBH_CPCIASIO4 0x0111
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||||
+#define PCI_VENDOR_ID_ADMTEK 0x1317
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+#define PCI_DEVICE_ID_ADMTEK_ADM5120 0x5120
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||||
+
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||||
#define PCI_VENDOR_ID_SIIG 0x131f
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||||
#define PCI_SUBVENDOR_ID_SIIG 0x131f
|
||||
#define PCI_DEVICE_ID_SIIG_1S_10x_550 0x1000
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||||
@@ -1,22 +0,0 @@
|
||||
--- a/drivers/leds/Kconfig
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||||
+++ b/drivers/leds/Kconfig
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||||
@@ -308,4 +308,12 @@ config LEDS_TRIGGER_NETDEV
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||||
This allows LEDs to be controlled by network device activity.
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||||
If unsure, say Y.
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||||
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||||
+config LEDS_TRIGGER_ADM5120_SWITCH
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||||
+ tristate "LED ADM5120 Switch Port Status Trigger"
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||||
+ depends on LEDS_TRIGGERS && ADM5120
|
||||
+ help
|
||||
+ This allows LEDs to be controlled by the port states of
|
||||
+ the ADM5120 built-in Ethernet Switch
|
||||
+ If unsure, say N.
|
||||
+
|
||||
endif # NEW_LEDS
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||||
--- a/drivers/leds/Makefile
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||||
+++ b/drivers/leds/Makefile
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||||
@@ -41,3 +41,4 @@ obj-$(CONFIG_LEDS_TRIGGER_GPIO) += ledt
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||||
obj-$(CONFIG_LEDS_TRIGGER_DEFAULT_ON) += ledtrig-default-on.o
|
||||
obj-$(CONFIG_LEDS_TRIGGER_MORSE) += ledtrig-morse.o
|
||||
obj-$(CONFIG_LEDS_TRIGGER_NETDEV) += ledtrig-netdev.o
|
||||
+obj-$(CONFIG_LEDS_TRIGGER_ADM5120_SWITCH) += ledtrig-adm5120-switch.o
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||||
@@ -1,84 +0,0 @@
|
||||
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
|
||||
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
|
||||
@@ -53,6 +53,12 @@
|
||||
#define AT49BV6416 0x00d6
|
||||
#define MANUFACTURER_SAMSUNG 0x00ec
|
||||
|
||||
+/* Macronix */
|
||||
+#define MX29LV160B 0x2249 /* MX29LV160 Bottom-boot chip */
|
||||
+#define MX29LV160T 0x22C4 /* MX29LV160 Top-boot chip */
|
||||
+#define MX29LV320B 0x22A8 /* MX29LV320 Bottom-boot chip */
|
||||
+#define MX29LV320T 0x22A7 /* MX29LV320 Top-boot chip */
|
||||
+
|
||||
static int cfi_amdstd_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
|
||||
static int cfi_amdstd_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
|
||||
static int cfi_amdstd_write_buffers(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
|
||||
@@ -293,6 +299,41 @@ static void fixup_M29W128G_write_buffer(
|
||||
}
|
||||
}
|
||||
|
||||
+#ifdef CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC
|
||||
+/*
|
||||
+ * Some Macronix chips has no/bad bootblock information in the CFI table
|
||||
+ */
|
||||
+static void fixup_macronix_bootloc(struct mtd_info *mtd, void* param)
|
||||
+{
|
||||
+ struct map_info *map = mtd->priv;
|
||||
+ struct cfi_private *cfi = map->fldrv_priv;
|
||||
+ struct cfi_pri_amdstd *extp = cfi->cmdset_priv;
|
||||
+ __u8 t;
|
||||
+
|
||||
+ switch (cfi->id) {
|
||||
+ /* TODO: put affected chip ids here */
|
||||
+ case MX29LV160B:
|
||||
+ case MX29LV320B:
|
||||
+ t = 2; /* Bottom boot */
|
||||
+ break;
|
||||
+ case MX29LV160T:
|
||||
+ case MX29LV320T:
|
||||
+ t = 3; /* Top boot */
|
||||
+ break;
|
||||
+ default:
|
||||
+ return;
|
||||
+ }
|
||||
+
|
||||
+ if (extp->TopBottom == t)
|
||||
+ /* boot location detected by the CFI layer is correct */
|
||||
+ return;
|
||||
+
|
||||
+ extp->TopBottom = t;
|
||||
+ printk("%s: Macronix chip detected, id:0x%04X, boot location forced "
|
||||
+ "to %s\n", map->name, cfi->id, (t == 2) ? "bottom" : "top");
|
||||
+}
|
||||
+#endif /* CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC */
|
||||
+
|
||||
static struct cfi_fixup cfi_fixup_table[] = {
|
||||
{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
|
||||
#ifdef AMD_BOOTLOC_BUG
|
||||
@@ -330,6 +371,9 @@ static struct cfi_fixup fixup_table[] =
|
||||
*/
|
||||
{ CFI_MFR_ANY, CFI_ID_ANY, fixup_use_erase_chip, NULL },
|
||||
{ CFI_MFR_ATMEL, AT49BV6416, fixup_use_atmel_lock, NULL },
|
||||
+#ifdef CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC
|
||||
+ { MANUFACTURER_MACRONIX, CFI_ID_ANY, fixup_macronix_bootloc, NULL, },
|
||||
+#endif
|
||||
{ 0, 0, NULL, NULL }
|
||||
};
|
||||
|
||||
--- a/drivers/mtd/chips/Kconfig
|
||||
+++ b/drivers/mtd/chips/Kconfig
|
||||
@@ -198,6 +198,14 @@ config MTD_CFI_AMDSTD
|
||||
provides support for one of those command sets, used on chips
|
||||
including the AMD Am29LV320.
|
||||
|
||||
+config MTD_CFI_FIXUP_MACRONIX_BOOTLOC
|
||||
+ bool "Fix boot-block location for Macronix flash chips"
|
||||
+ depends on MTD_CFI_AMDSTD
|
||||
+ help
|
||||
+ Some Macronix flash chips have no/wrong boot-block location in the
|
||||
+ CFI table, and the driver may detect the type incorrectly. Select
|
||||
+ this if your board has such chip.
|
||||
+
|
||||
config MTD_CFI_STAA
|
||||
tristate "Support for ST (Advanced Architecture) flash chips"
|
||||
depends on MTD_GEN_PROBE
|
||||
@@ -1,68 +0,0 @@
|
||||
--- a/drivers/mtd/chips/jedec_probe.c
|
||||
+++ b/drivers/mtd/chips/jedec_probe.c
|
||||
@@ -128,6 +128,10 @@
|
||||
#define UPD29F064115 0x221C
|
||||
|
||||
/* PMC */
|
||||
+#define PM39LV512 0x001B
|
||||
+#define PM39LV010 0x001C
|
||||
+#define PM39LV020 0x003D
|
||||
+#define PM39LV040 0x003E
|
||||
#define PM49FL002 0x006D
|
||||
#define PM49FL004 0x006E
|
||||
#define PM49FL008 0x006A
|
||||
@@ -1250,6 +1254,54 @@ static const struct amd_flash_info jedec
|
||||
ERASEINFO(0x02000,2),
|
||||
ERASEINFO(0x04000,1),
|
||||
}
|
||||
+ }, {
|
||||
+ .mfr_id = MANUFACTURER_PMC,
|
||||
+ .dev_id = PM39LV512,
|
||||
+ .name = "PMC Pm39LV512",
|
||||
+ .devtypes = CFI_DEVICETYPE_X8,
|
||||
+ .uaddr = MTD_UADDR_0x0555_0x02AA,
|
||||
+ .dev_size = SIZE_64KiB,
|
||||
+ .cmd_set = P_ID_AMD_STD,
|
||||
+ .nr_regions = 1,
|
||||
+ .regions = {
|
||||
+ ERASEINFO(0x01000,16),
|
||||
+ }
|
||||
+ }, {
|
||||
+ .mfr_id = MANUFACTURER_PMC,
|
||||
+ .dev_id = PM39LV010,
|
||||
+ .name = "PMC Pm39LV010",
|
||||
+ .devtypes = CFI_DEVICETYPE_X8,
|
||||
+ .uaddr = MTD_UADDR_0x0555_0x02AA,
|
||||
+ .dev_size = SIZE_128KiB,
|
||||
+ .cmd_set = P_ID_AMD_STD,
|
||||
+ .nr_regions = 1,
|
||||
+ .regions = {
|
||||
+ ERASEINFO(0x01000,32),
|
||||
+ }
|
||||
+ }, {
|
||||
+ .mfr_id = MANUFACTURER_PMC,
|
||||
+ .dev_id = PM39LV020,
|
||||
+ .name = "PMC Pm39LV020",
|
||||
+ .devtypes = CFI_DEVICETYPE_X8,
|
||||
+ .uaddr = MTD_UADDR_0x0555_0x02AA,
|
||||
+ .dev_size = SIZE_256KiB,
|
||||
+ .cmd_set = P_ID_AMD_STD,
|
||||
+ .nr_regions = 1,
|
||||
+ .regions = {
|
||||
+ ERASEINFO(0x01000,64),
|
||||
+ }
|
||||
+ }, {
|
||||
+ .mfr_id = MANUFACTURER_PMC,
|
||||
+ .dev_id = PM39LV040,
|
||||
+ .name = "PMC Pm39LV040",
|
||||
+ .devtypes = CFI_DEVICETYPE_X8,
|
||||
+ .uaddr = MTD_UADDR_0x0555_0x02AA,
|
||||
+ .dev_size = SIZE_512KiB,
|
||||
+ .cmd_set = P_ID_AMD_STD,
|
||||
+ .nr_regions = 1,
|
||||
+ .regions = {
|
||||
+ ERASEINFO(0x01000,128),
|
||||
+ }
|
||||
}, {
|
||||
.mfr_id = MANUFACTURER_PMC,
|
||||
.dev_id = PM49FL002,
|
||||
@@ -1,24 +0,0 @@
|
||||
--- a/drivers/mtd/Kconfig
|
||||
+++ b/drivers/mtd/Kconfig
|
||||
@@ -63,6 +63,11 @@ config MTD_ROOTFS_SPLIT
|
||||
depends on MTD_PARTITIONS
|
||||
default y
|
||||
|
||||
+config MTD_TRXSPLIT
|
||||
+ bool "Automatically find and split TRX partitions"
|
||||
+ depends on MTD_PARTITIONS
|
||||
+ default n
|
||||
+
|
||||
config MTD_REDBOOT_PARTS
|
||||
tristate "RedBoot partition table parsing"
|
||||
depends on MTD_PARTITIONS
|
||||
--- a/drivers/mtd/Makefile
|
||||
+++ b/drivers/mtd/Makefile
|
||||
@@ -8,6 +8,7 @@ mtd-y := mtdcore.o mtdsuper.o mtdbdi.
|
||||
mtd-$(CONFIG_MTD_PARTITIONS) += mtdpart.o
|
||||
|
||||
obj-$(CONFIG_MTD_CONCAT) += mtdconcat.o
|
||||
+obj-$(CONFIG_MTD_TRXSPLIT) += trxsplit.o
|
||||
obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o
|
||||
obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o
|
||||
obj-$(CONFIG_MTD_AFS_PARTS) += afs.o
|
||||
@@ -1,28 +0,0 @@
|
||||
--- a/drivers/ata/Makefile
|
||||
+++ b/drivers/ata/Makefile
|
||||
@@ -75,6 +75,7 @@ obj-$(CONFIG_PATA_PLATFORM) += pata_plat
|
||||
obj-$(CONFIG_PATA_AT91) += pata_at91.o
|
||||
obj-$(CONFIG_PATA_OF_PLATFORM) += pata_of_platform.o
|
||||
obj-$(CONFIG_PATA_ICSIDE) += pata_icside.o
|
||||
+obj-$(CONFIG_PATA_RB153_CF) += pata_rb153_cf.o
|
||||
# Should be last but two libata driver
|
||||
obj-$(CONFIG_PATA_ACPI) += pata_acpi.o
|
||||
# Should be last but one libata driver
|
||||
--- a/drivers/ata/Kconfig
|
||||
+++ b/drivers/ata/Kconfig
|
||||
@@ -577,6 +577,15 @@ config PATA_RADISYS
|
||||
|
||||
If unsure, say N.
|
||||
|
||||
+config PATA_RB153_CF
|
||||
+ tristate "RouterBOARD 153 Compact Flash support"
|
||||
+ depends on ADM5120_MACH_RB_153
|
||||
+ help
|
||||
+ This option enables support for a Compact Flash connected on
|
||||
+ the RouterBOARD 153.
|
||||
+
|
||||
+ If unsure, say N.
|
||||
+
|
||||
config PATA_RB532
|
||||
tristate "RouterBoard 532 PATA CompactFlash support"
|
||||
depends on MIKROTIK_RB532
|
||||
@@ -1,378 +0,0 @@
|
||||
--- a/drivers/serial/amba-pl010.c
|
||||
+++ b/drivers/serial/amba-pl010.c
|
||||
@@ -50,11 +50,10 @@
|
||||
|
||||
#include <asm/io.h>
|
||||
|
||||
-#define UART_NR 8
|
||||
-
|
||||
#define SERIAL_AMBA_MAJOR 204
|
||||
#define SERIAL_AMBA_MINOR 16
|
||||
-#define SERIAL_AMBA_NR UART_NR
|
||||
+#define SERIAL_AMBA_NR CONFIG_SERIAL_AMBA_PL010_NUMPORTS
|
||||
+#define SERIAL_AMBA_NAME CONFIG_SERIAL_AMBA_PL010_PORTNAME
|
||||
|
||||
#define AMBA_ISR_PASS_LIMIT 256
|
||||
|
||||
@@ -80,9 +79,9 @@ static void pl010_stop_tx(struct uart_po
|
||||
struct uart_amba_port *uap = (struct uart_amba_port *)port;
|
||||
unsigned int cr;
|
||||
|
||||
- cr = readb(uap->port.membase + UART010_CR);
|
||||
+ cr = __raw_readl(uap->port.membase + UART010_CR);
|
||||
cr &= ~UART010_CR_TIE;
|
||||
- writel(cr, uap->port.membase + UART010_CR);
|
||||
+ __raw_writel(cr, uap->port.membase + UART010_CR);
|
||||
}
|
||||
|
||||
static void pl010_start_tx(struct uart_port *port)
|
||||
@@ -90,9 +89,9 @@ static void pl010_start_tx(struct uart_p
|
||||
struct uart_amba_port *uap = (struct uart_amba_port *)port;
|
||||
unsigned int cr;
|
||||
|
||||
- cr = readb(uap->port.membase + UART010_CR);
|
||||
+ cr = __raw_readl(uap->port.membase + UART010_CR);
|
||||
cr |= UART010_CR_TIE;
|
||||
- writel(cr, uap->port.membase + UART010_CR);
|
||||
+ __raw_writel(cr, uap->port.membase + UART010_CR);
|
||||
}
|
||||
|
||||
static void pl010_stop_rx(struct uart_port *port)
|
||||
@@ -100,9 +99,9 @@ static void pl010_stop_rx(struct uart_po
|
||||
struct uart_amba_port *uap = (struct uart_amba_port *)port;
|
||||
unsigned int cr;
|
||||
|
||||
- cr = readb(uap->port.membase + UART010_CR);
|
||||
+ cr = __raw_readl(uap->port.membase + UART010_CR);
|
||||
cr &= ~(UART010_CR_RIE | UART010_CR_RTIE);
|
||||
- writel(cr, uap->port.membase + UART010_CR);
|
||||
+ __raw_writel(cr, uap->port.membase + UART010_CR);
|
||||
}
|
||||
|
||||
static void pl010_enable_ms(struct uart_port *port)
|
||||
@@ -110,9 +109,9 @@ static void pl010_enable_ms(struct uart_
|
||||
struct uart_amba_port *uap = (struct uart_amba_port *)port;
|
||||
unsigned int cr;
|
||||
|
||||
- cr = readb(uap->port.membase + UART010_CR);
|
||||
+ cr = __raw_readl(uap->port.membase + UART010_CR);
|
||||
cr |= UART010_CR_MSIE;
|
||||
- writel(cr, uap->port.membase + UART010_CR);
|
||||
+ __raw_writel(cr, uap->port.membase + UART010_CR);
|
||||
}
|
||||
|
||||
static void pl010_rx_chars(struct uart_amba_port *uap)
|
||||
@@ -120,9 +119,9 @@ static void pl010_rx_chars(struct uart_a
|
||||
struct tty_struct *tty = uap->port.info->port.tty;
|
||||
unsigned int status, ch, flag, rsr, max_count = 256;
|
||||
|
||||
- status = readb(uap->port.membase + UART01x_FR);
|
||||
+ status = __raw_readl(uap->port.membase + UART01x_FR);
|
||||
while (UART_RX_DATA(status) && max_count--) {
|
||||
- ch = readb(uap->port.membase + UART01x_DR);
|
||||
+ ch = __raw_readl(uap->port.membase + UART01x_DR);
|
||||
flag = TTY_NORMAL;
|
||||
|
||||
uap->port.icount.rx++;
|
||||
@@ -131,9 +130,9 @@ static void pl010_rx_chars(struct uart_a
|
||||
* Note that the error handling code is
|
||||
* out of the main execution path
|
||||
*/
|
||||
- rsr = readb(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
|
||||
+ rsr = __raw_readl(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
|
||||
if (unlikely(rsr & UART01x_RSR_ANY)) {
|
||||
- writel(0, uap->port.membase + UART01x_ECR);
|
||||
+ __raw_writel(0, uap->port.membase + UART01x_ECR);
|
||||
|
||||
if (rsr & UART01x_RSR_BE) {
|
||||
rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE);
|
||||
@@ -163,7 +162,7 @@ static void pl010_rx_chars(struct uart_a
|
||||
uart_insert_char(&uap->port, rsr, UART01x_RSR_OE, ch, flag);
|
||||
|
||||
ignore_char:
|
||||
- status = readb(uap->port.membase + UART01x_FR);
|
||||
+ status = __raw_readl(uap->port.membase + UART01x_FR);
|
||||
}
|
||||
spin_unlock(&uap->port.lock);
|
||||
tty_flip_buffer_push(tty);
|
||||
@@ -176,7 +175,7 @@ static void pl010_tx_chars(struct uart_a
|
||||
int count;
|
||||
|
||||
if (uap->port.x_char) {
|
||||
- writel(uap->port.x_char, uap->port.membase + UART01x_DR);
|
||||
+ __raw_writel(uap->port.x_char, uap->port.membase + UART01x_DR);
|
||||
uap->port.icount.tx++;
|
||||
uap->port.x_char = 0;
|
||||
return;
|
||||
@@ -188,7 +187,7 @@ static void pl010_tx_chars(struct uart_a
|
||||
|
||||
count = uap->port.fifosize >> 1;
|
||||
do {
|
||||
- writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
|
||||
+ __raw_writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
|
||||
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
|
||||
uap->port.icount.tx++;
|
||||
if (uart_circ_empty(xmit))
|
||||
@@ -206,9 +205,9 @@ static void pl010_modem_status(struct ua
|
||||
{
|
||||
unsigned int status, delta;
|
||||
|
||||
- writel(0, uap->port.membase + UART010_ICR);
|
||||
+ __raw_writel(0, uap->port.membase + UART010_ICR);
|
||||
|
||||
- status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
|
||||
+ status = __raw_readl(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
|
||||
|
||||
delta = status ^ uap->old_status;
|
||||
uap->old_status = status;
|
||||
@@ -236,7 +235,7 @@ static irqreturn_t pl010_int(int irq, vo
|
||||
|
||||
spin_lock(&uap->port.lock);
|
||||
|
||||
- status = readb(uap->port.membase + UART010_IIR);
|
||||
+ status = __raw_readl(uap->port.membase + UART010_IIR);
|
||||
if (status) {
|
||||
do {
|
||||
if (status & (UART010_IIR_RTIS | UART010_IIR_RIS))
|
||||
@@ -249,7 +248,7 @@ static irqreturn_t pl010_int(int irq, vo
|
||||
if (pass_counter-- == 0)
|
||||
break;
|
||||
|
||||
- status = readb(uap->port.membase + UART010_IIR);
|
||||
+ status = __raw_readl(uap->port.membase + UART010_IIR);
|
||||
} while (status & (UART010_IIR_RTIS | UART010_IIR_RIS |
|
||||
UART010_IIR_TIS));
|
||||
handled = 1;
|
||||
@@ -263,7 +262,7 @@ static irqreturn_t pl010_int(int irq, vo
|
||||
static unsigned int pl010_tx_empty(struct uart_port *port)
|
||||
{
|
||||
struct uart_amba_port *uap = (struct uart_amba_port *)port;
|
||||
- unsigned int status = readb(uap->port.membase + UART01x_FR);
|
||||
+ unsigned int status = __raw_readl(uap->port.membase + UART01x_FR);
|
||||
return status & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;
|
||||
}
|
||||
|
||||
@@ -273,7 +272,7 @@ static unsigned int pl010_get_mctrl(stru
|
||||
unsigned int result = 0;
|
||||
unsigned int status;
|
||||
|
||||
- status = readb(uap->port.membase + UART01x_FR);
|
||||
+ status = __raw_readl(uap->port.membase + UART01x_FR);
|
||||
if (status & UART01x_FR_DCD)
|
||||
result |= TIOCM_CAR;
|
||||
if (status & UART01x_FR_DSR)
|
||||
@@ -299,12 +298,12 @@ static void pl010_break_ctl(struct uart_
|
||||
unsigned int lcr_h;
|
||||
|
||||
spin_lock_irqsave(&uap->port.lock, flags);
|
||||
- lcr_h = readb(uap->port.membase + UART010_LCRH);
|
||||
+ lcr_h = __raw_readl(uap->port.membase + UART010_LCRH);
|
||||
if (break_state == -1)
|
||||
lcr_h |= UART01x_LCRH_BRK;
|
||||
else
|
||||
lcr_h &= ~UART01x_LCRH_BRK;
|
||||
- writel(lcr_h, uap->port.membase + UART010_LCRH);
|
||||
+ __raw_writel(lcr_h, uap->port.membase + UART010_LCRH);
|
||||
spin_unlock_irqrestore(&uap->port.lock, flags);
|
||||
}
|
||||
|
||||
@@ -332,12 +331,12 @@ static int pl010_startup(struct uart_por
|
||||
/*
|
||||
* initialise the old status of the modem signals
|
||||
*/
|
||||
- uap->old_status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
|
||||
+ uap->old_status = __raw_readl(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
|
||||
|
||||
/*
|
||||
* Finally, enable interrupts
|
||||
*/
|
||||
- writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
|
||||
+ __raw_writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
|
||||
uap->port.membase + UART010_CR);
|
||||
|
||||
return 0;
|
||||
@@ -360,10 +359,10 @@ static void pl010_shutdown(struct uart_p
|
||||
/*
|
||||
* disable all interrupts, disable the port
|
||||
*/
|
||||
- writel(0, uap->port.membase + UART010_CR);
|
||||
+ __raw_writel(0, uap->port.membase + UART010_CR);
|
||||
|
||||
/* disable break condition and fifos */
|
||||
- writel(readb(uap->port.membase + UART010_LCRH) &
|
||||
+ __raw_writel(__raw_readl(uap->port.membase + UART010_LCRH) &
|
||||
~(UART01x_LCRH_BRK | UART01x_LCRH_FEN),
|
||||
uap->port.membase + UART010_LCRH);
|
||||
|
||||
@@ -385,7 +384,7 @@ pl010_set_termios(struct uart_port *port
|
||||
/*
|
||||
* Ask the core to calculate the divisor for us.
|
||||
*/
|
||||
- baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16);
|
||||
+ baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16);
|
||||
quot = uart_get_divisor(port, baud);
|
||||
|
||||
switch (termios->c_cflag & CSIZE) {
|
||||
@@ -448,25 +447,25 @@ pl010_set_termios(struct uart_port *port
|
||||
uap->port.ignore_status_mask |= UART_DUMMY_RSR_RX;
|
||||
|
||||
/* first, disable everything */
|
||||
- old_cr = readb(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
|
||||
+ old_cr = __raw_readl(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
|
||||
|
||||
if (UART_ENABLE_MS(port, termios->c_cflag))
|
||||
old_cr |= UART010_CR_MSIE;
|
||||
|
||||
- writel(0, uap->port.membase + UART010_CR);
|
||||
+ __raw_writel(0, uap->port.membase + UART010_CR);
|
||||
|
||||
/* Set baud rate */
|
||||
quot -= 1;
|
||||
- writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
|
||||
- writel(quot & 0xff, uap->port.membase + UART010_LCRL);
|
||||
+ __raw_writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
|
||||
+ __raw_writel(quot & 0xff, uap->port.membase + UART010_LCRL);
|
||||
|
||||
/*
|
||||
* ----------v----------v----------v----------v-----
|
||||
* NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L
|
||||
* ----------^----------^----------^----------^-----
|
||||
*/
|
||||
- writel(lcr_h, uap->port.membase + UART010_LCRH);
|
||||
- writel(old_cr, uap->port.membase + UART010_CR);
|
||||
+ __raw_writel(lcr_h, uap->port.membase + UART010_LCRH);
|
||||
+ __raw_writel(old_cr, uap->port.membase + UART010_CR);
|
||||
|
||||
spin_unlock_irqrestore(&uap->port.lock, flags);
|
||||
}
|
||||
@@ -538,7 +537,7 @@ static struct uart_ops amba_pl010_pops =
|
||||
.verify_port = pl010_verify_port,
|
||||
};
|
||||
|
||||
-static struct uart_amba_port *amba_ports[UART_NR];
|
||||
+static struct uart_amba_port *amba_ports[SERIAL_AMBA_NR];
|
||||
|
||||
#ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE
|
||||
|
||||
@@ -548,10 +547,10 @@ static void pl010_console_putchar(struct
|
||||
unsigned int status;
|
||||
|
||||
do {
|
||||
- status = readb(uap->port.membase + UART01x_FR);
|
||||
+ status = __raw_readl(uap->port.membase + UART01x_FR);
|
||||
barrier();
|
||||
} while (!UART_TX_READY(status));
|
||||
- writel(ch, uap->port.membase + UART01x_DR);
|
||||
+ __raw_writel(ch, uap->port.membase + UART01x_DR);
|
||||
}
|
||||
|
||||
static void
|
||||
@@ -565,8 +564,8 @@ pl010_console_write(struct console *co,
|
||||
/*
|
||||
* First save the CR then disable the interrupts
|
||||
*/
|
||||
- old_cr = readb(uap->port.membase + UART010_CR);
|
||||
- writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
|
||||
+ old_cr = __raw_readl(uap->port.membase + UART010_CR);
|
||||
+ __raw_writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
|
||||
|
||||
uart_console_write(&uap->port, s, count, pl010_console_putchar);
|
||||
|
||||
@@ -575,10 +574,10 @@ pl010_console_write(struct console *co,
|
||||
* and restore the TCR
|
||||
*/
|
||||
do {
|
||||
- status = readb(uap->port.membase + UART01x_FR);
|
||||
+ status = __raw_readl(uap->port.membase + UART01x_FR);
|
||||
barrier();
|
||||
} while (status & UART01x_FR_BUSY);
|
||||
- writel(old_cr, uap->port.membase + UART010_CR);
|
||||
+ __raw_writel(old_cr, uap->port.membase + UART010_CR);
|
||||
|
||||
clk_disable(uap->clk);
|
||||
}
|
||||
@@ -587,9 +586,9 @@ static void __init
|
||||
pl010_console_get_options(struct uart_amba_port *uap, int *baud,
|
||||
int *parity, int *bits)
|
||||
{
|
||||
- if (readb(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
|
||||
+ if (__raw_readl(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
|
||||
unsigned int lcr_h, quot;
|
||||
- lcr_h = readb(uap->port.membase + UART010_LCRH);
|
||||
+ lcr_h = __raw_readl(uap->port.membase + UART010_LCRH);
|
||||
|
||||
*parity = 'n';
|
||||
if (lcr_h & UART01x_LCRH_PEN) {
|
||||
@@ -604,8 +603,8 @@ pl010_console_get_options(struct uart_am
|
||||
else
|
||||
*bits = 8;
|
||||
|
||||
- quot = readb(uap->port.membase + UART010_LCRL) |
|
||||
- readb(uap->port.membase + UART010_LCRM) << 8;
|
||||
+ quot = __raw_readl(uap->port.membase + UART010_LCRL) |
|
||||
+ __raw_readl(uap->port.membase + UART010_LCRM) << 8;
|
||||
*baud = uap->port.uartclk / (16 * (quot + 1));
|
||||
}
|
||||
}
|
||||
@@ -623,7 +622,7 @@ static int __init pl010_console_setup(st
|
||||
* if so, search for the first available port that does have
|
||||
* console support.
|
||||
*/
|
||||
- if (co->index >= UART_NR)
|
||||
+ if (co->index >= SERIAL_AMBA_NR)
|
||||
co->index = 0;
|
||||
uap = amba_ports[co->index];
|
||||
if (!uap)
|
||||
@@ -641,7 +640,7 @@ static int __init pl010_console_setup(st
|
||||
|
||||
static struct uart_driver amba_reg;
|
||||
static struct console amba_console = {
|
||||
- .name = "ttyAM",
|
||||
+ .name = SERIAL_AMBA_NAME,
|
||||
.write = pl010_console_write,
|
||||
.device = uart_console_device,
|
||||
.setup = pl010_console_setup,
|
||||
@@ -657,11 +656,11 @@ static struct console amba_console = {
|
||||
|
||||
static struct uart_driver amba_reg = {
|
||||
.owner = THIS_MODULE,
|
||||
- .driver_name = "ttyAM",
|
||||
- .dev_name = "ttyAM",
|
||||
+ .driver_name = SERIAL_AMBA_NAME,
|
||||
+ .dev_name = SERIAL_AMBA_NAME,
|
||||
.major = SERIAL_AMBA_MAJOR,
|
||||
.minor = SERIAL_AMBA_MINOR,
|
||||
- .nr = UART_NR,
|
||||
+ .nr = SERIAL_AMBA_NR,
|
||||
.cons = AMBA_CONSOLE,
|
||||
};
|
||||
|
||||
--- a/drivers/serial/Kconfig
|
||||
+++ b/drivers/serial/Kconfig
|
||||
@@ -284,10 +284,25 @@ config SERIAL_AMBA_PL010
|
||||
help
|
||||
This selects the ARM(R) AMBA(R) PrimeCell PL010 UART. If you have
|
||||
an Integrator/AP or Integrator/PP2 platform, or if you have a
|
||||
- Cirrus Logic EP93xx CPU, say Y or M here.
|
||||
+ Cirrus Logic EP93xx CPU or an Infineon ADM5120 SOC, say Y or M here.
|
||||
|
||||
If unsure, say N.
|
||||
|
||||
+config SERIAL_AMBA_PL010_NUMPORTS
|
||||
+ int "Maximum number of AMBA PL010 serial ports"
|
||||
+ depends on SERIAL_AMBA_PL010
|
||||
+ default "8"
|
||||
+ ---help---
|
||||
+ Set this to the number of serial ports you want the AMBA PL010 driver
|
||||
+ to support.
|
||||
+
|
||||
+config SERIAL_AMBA_PL010_PORTNAME
|
||||
+ string "Name of the AMBA PL010 serial ports"
|
||||
+ depends on SERIAL_AMBA_PL010
|
||||
+ default "ttyAM"
|
||||
+ ---help---
|
||||
+ ::: To be written :::
|
||||
+
|
||||
config SERIAL_AMBA_PL010_CONSOLE
|
||||
bool "Support for console on AMBA serial port"
|
||||
depends on SERIAL_AMBA_PL010=y
|
||||
@@ -1,13 +0,0 @@
|
||||
--- a/drivers/amba/bus.c
|
||||
+++ b/drivers/amba/bus.c
|
||||
@@ -18,6 +18,10 @@
|
||||
#include <asm/irq.h>
|
||||
#include <asm/sizes.h>
|
||||
|
||||
+#ifndef NO_IRQ
|
||||
+#define NO_IRQ (-1)
|
||||
+#endif
|
||||
+
|
||||
#define to_amba_device(d) container_of(d, struct amba_device, dev)
|
||||
#define to_amba_driver(d) container_of(d, struct amba_driver, drv)
|
||||
|
||||
@@ -1,27 +0,0 @@
|
||||
--- a/drivers/leds/leds-gpio.c
|
||||
+++ b/drivers/leds/leds-gpio.c
|
||||
@@ -44,13 +44,17 @@ static void gpio_led_set(struct led_clas
|
||||
container_of(led_cdev, struct gpio_led_data, cdev);
|
||||
int level;
|
||||
|
||||
- if (value == LED_OFF)
|
||||
- level = 0;
|
||||
- else
|
||||
- level = 1;
|
||||
-
|
||||
- if (led_dat->active_low)
|
||||
- level = !level;
|
||||
+ switch (value) {
|
||||
+ case LED_OFF:
|
||||
+ level = led_dat->active_low ? 1 : 0;
|
||||
+ break;
|
||||
+ case LED_FULL:
|
||||
+ level = led_dat->active_low ? 0 : 1;
|
||||
+ break;
|
||||
+ default:
|
||||
+ level = value;
|
||||
+ break;
|
||||
+ }
|
||||
|
||||
/* Setting GPIOs with I2C/etc requires a task context, and we don't
|
||||
* seem to have a reliable way to know if we're already in one; so
|
||||
@@ -1,31 +0,0 @@
|
||||
--- a/drivers/watchdog/Kconfig
|
||||
+++ b/drivers/watchdog/Kconfig
|
||||
@@ -745,6 +745,18 @@ config RC32434_WDT
|
||||
To compile this driver as a module, choose M here: the
|
||||
module will be called rc32434_wdt.
|
||||
|
||||
+config ADM5120_WDT
|
||||
+ tristate "Infineon ADM5120 SoC hardware watchdog"
|
||||
+ depends on WATCHDOG && ADM5120
|
||||
+ help
|
||||
+ This is a driver for hardware watchdog integrated in Infineon
|
||||
+ ADM5120 SoC. This watchdog simply watches your kernel to make sure
|
||||
+ it doesn't freeze, and if it does, it reboots your computer after a
|
||||
+ certain amount of time.
|
||||
+
|
||||
+ To compile this driver as a module, choose M here: the module will be
|
||||
+ called adm5120_wdt.
|
||||
+
|
||||
config INDYDOG
|
||||
tristate "Indy/I2 Hardware Watchdog"
|
||||
depends on SGI_HAS_INDYDOG
|
||||
--- a/drivers/watchdog/Makefile
|
||||
+++ b/drivers/watchdog/Makefile
|
||||
@@ -110,6 +110,7 @@ obj-$(CONFIG_WDT_RM9K_GPI) += rm9k_wdt.o
|
||||
obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o
|
||||
obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
|
||||
obj-$(CONFIG_TXX9_WDT) += txx9wdt.o
|
||||
+obj-$(CONFIG_ADM5120_WDT) += adm5120_wdt.o
|
||||
|
||||
# PARISC Architecture
|
||||
|
||||
@@ -0,0 +1,11 @@
|
||||
--- a/drivers/usb/host/adm5120-dbg.c
|
||||
+++ b/drivers/usb/host/adm5120-dbg.c
|
||||
@@ -133,7 +133,7 @@ urb_print(struct admhcd *ahcd, struct ur
|
||||
|
||||
#define admhc_dbg_sw(ahcd, next, size, format, arg...) \
|
||||
do { \
|
||||
- if (next) { \
|
||||
+ if (next != NULL) { \
|
||||
unsigned s_len; \
|
||||
s_len = scnprintf(*next, *size, format, ## arg ); \
|
||||
*size -= s_len; *next += s_len; \
|
||||
+11
@@ -0,0 +1,11 @@
|
||||
--- a/drivers/usb/host/adm5120-dbg.c
|
||||
+++ b/drivers/usb/host/adm5120-dbg.c
|
||||
@@ -632,7 +632,7 @@ static ssize_t fill_registers_buffer(str
|
||||
hcd->product_desc,
|
||||
hcd_name);
|
||||
|
||||
- if (bus->controller->power.power_state.event) {
|
||||
+ if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
|
||||
size -= scnprintf(next, size,
|
||||
"SUSPENDED (no register access)\n");
|
||||
goto done;
|
||||
+116
@@ -0,0 +1,116 @@
|
||||
--- a/drivers/usb/host/adm5120-dbg.c
|
||||
+++ b/drivers/usb/host/adm5120-dbg.c
|
||||
@@ -419,7 +419,7 @@ static struct dentry *admhc_debug_root;
|
||||
|
||||
struct debug_buffer {
|
||||
ssize_t (*fill_func)(struct debug_buffer *); /* fill method */
|
||||
- struct device *dev;
|
||||
+ struct admhcd *ahcd;
|
||||
struct mutex mutex; /* protect filling of buffer */
|
||||
size_t count; /* number of characters filled into buffer */
|
||||
char *page;
|
||||
@@ -494,15 +494,11 @@ show_list(struct admhcd *ahcd, char *buf
|
||||
|
||||
static ssize_t fill_async_buffer(struct debug_buffer *buf)
|
||||
{
|
||||
- struct usb_bus *bus;
|
||||
- struct usb_hcd *hcd;
|
||||
struct admhcd *ahcd;
|
||||
size_t temp;
|
||||
unsigned long flags;
|
||||
|
||||
- bus = dev_get_drvdata(buf->dev);
|
||||
- hcd = bus_to_hcd(bus);
|
||||
- ahcd = hcd_to_admhcd(hcd);
|
||||
+ ahcd = buf->ahcd;
|
||||
|
||||
spin_lock_irqsave(&ahcd->lock, flags);
|
||||
temp = show_list(ahcd, buf->page, PAGE_SIZE, ahcd->ed_head);
|
||||
@@ -516,8 +512,6 @@ static ssize_t fill_async_buffer(struct
|
||||
|
||||
static ssize_t fill_periodic_buffer(struct debug_buffer *buf)
|
||||
{
|
||||
- struct usb_bus *bus;
|
||||
- struct usb_hcd *hcd;
|
||||
struct admhcd *ahcd;
|
||||
struct ed **seen, *ed;
|
||||
unsigned long flags;
|
||||
@@ -529,9 +523,7 @@ static ssize_t fill_periodic_buffer(stru
|
||||
return 0;
|
||||
seen_count = 0;
|
||||
|
||||
- bus = dev_get_drvdata(buf->dev);
|
||||
- hcd = bus_to_hcd(bus);
|
||||
- ahcd = hcd_to_admhcd(hcd);
|
||||
+ ahcd = buf->ahcd;
|
||||
next = buf->page;
|
||||
size = PAGE_SIZE;
|
||||
|
||||
@@ -613,7 +605,6 @@ static ssize_t fill_periodic_buffer(stru
|
||||
|
||||
static ssize_t fill_registers_buffer(struct debug_buffer *buf)
|
||||
{
|
||||
- struct usb_bus *bus;
|
||||
struct usb_hcd *hcd;
|
||||
struct admhcd *ahcd;
|
||||
struct admhcd_regs __iomem *regs;
|
||||
@@ -622,9 +613,8 @@ static ssize_t fill_registers_buffer(str
|
||||
char *next;
|
||||
u32 rdata;
|
||||
|
||||
- bus = dev_get_drvdata(buf->dev);
|
||||
- hcd = bus_to_hcd(bus);
|
||||
- ahcd = hcd_to_admhcd(hcd);
|
||||
+ ahcd = buf->ahcd;
|
||||
+ hcd = admhcd_to_hcd(ahcd);
|
||||
regs = ahcd->regs;
|
||||
next = buf->page;
|
||||
size = PAGE_SIZE;
|
||||
@@ -689,7 +679,7 @@ done:
|
||||
}
|
||||
|
||||
|
||||
-static struct debug_buffer *alloc_buffer(struct device *dev,
|
||||
+static struct debug_buffer *alloc_buffer(struct admhcd *ahcd,
|
||||
ssize_t (*fill_func)(struct debug_buffer *))
|
||||
{
|
||||
struct debug_buffer *buf;
|
||||
@@ -697,7 +687,7 @@ static struct debug_buffer *alloc_buffer
|
||||
buf = kzalloc(sizeof(struct debug_buffer), GFP_KERNEL);
|
||||
|
||||
if (buf) {
|
||||
- buf->dev = dev;
|
||||
+ buf->ahcd = ahcd;
|
||||
buf->fill_func = fill_func;
|
||||
mutex_init(&buf->mutex);
|
||||
}
|
||||
@@ -790,26 +780,25 @@ static int debug_registers_open(struct i
|
||||
static inline void create_debug_files(struct admhcd *ahcd)
|
||||
{
|
||||
struct usb_bus *bus = &admhcd_to_hcd(ahcd)->self;
|
||||
- struct device *dev = bus->dev;
|
||||
|
||||
ahcd->debug_dir = debugfs_create_dir(bus->bus_name, admhc_debug_root);
|
||||
if (!ahcd->debug_dir)
|
||||
goto dir_error;
|
||||
|
||||
ahcd->debug_async = debugfs_create_file("async", S_IRUGO,
|
||||
- ahcd->debug_dir, dev,
|
||||
+ ahcd->debug_dir, ahcd,
|
||||
&debug_async_fops);
|
||||
if (!ahcd->debug_async)
|
||||
goto async_error;
|
||||
|
||||
ahcd->debug_periodic = debugfs_create_file("periodic", S_IRUGO,
|
||||
- ahcd->debug_dir, dev,
|
||||
+ ahcd->debug_dir, ahcd,
|
||||
&debug_periodic_fops);
|
||||
if (!ahcd->debug_periodic)
|
||||
goto periodic_error;
|
||||
|
||||
ahcd->debug_registers = debugfs_create_file("registers", S_IRUGO,
|
||||
- ahcd->debug_dir, dev,
|
||||
+ ahcd->debug_dir, ahcd,
|
||||
&debug_registers_fops);
|
||||
if (!ahcd->debug_registers)
|
||||
goto registers_error;
|
||||
@@ -1,262 +0,0 @@
|
||||
CONFIG_32BIT=y
|
||||
# CONFIG_64BIT is not set
|
||||
CONFIG_ADM5120_ENET=y
|
||||
CONFIG_ADM5120_MACH_5GXI=y
|
||||
CONFIG_ADM5120_MACH_BR_6104KP=y
|
||||
CONFIG_ADM5120_MACH_BR_6104K=y
|
||||
CONFIG_ADM5120_MACH_BR_61X4WG=y
|
||||
CONFIG_ADM5120_MACH_CAS_771=y
|
||||
CONFIG_ADM5120_MACH_EASY5120P_ATA=y
|
||||
CONFIG_ADM5120_MACH_EASY5120_RT=y
|
||||
CONFIG_ADM5120_MACH_EASY5120_WVOIP=y
|
||||
CONFIG_ADM5120_MACH_EASY83000=y
|
||||
CONFIG_ADM5120_MACH_NFS_101=y
|
||||
CONFIG_ADM5120_MACH_NP27G=y
|
||||
CONFIG_ADM5120_MACH_NP28G=y
|
||||
CONFIG_ADM5120_MACH_PMUGW=y
|
||||
CONFIG_ADM5120_MACH_RB_11X=y
|
||||
CONFIG_ADM5120_MACH_RB_133C=y
|
||||
CONFIG_ADM5120_MACH_RB_133=y
|
||||
CONFIG_ADM5120_MACH_RB_150=y
|
||||
CONFIG_ADM5120_MACH_RB_153=y
|
||||
CONFIG_ADM5120_MACH_RB_192=y
|
||||
CONFIG_ADM5120_MACH_WP54=y
|
||||
CONFIG_ADM5120_OEM_CELLVISION=y
|
||||
CONFIG_ADM5120_OEM_COMPEX=y
|
||||
CONFIG_ADM5120_OEM_EDIMAX=y
|
||||
CONFIG_ADM5120_OEM_INFINEON=y
|
||||
CONFIG_ADM5120_OEM_MIKROTIK=y
|
||||
CONFIG_ADM5120_OEM_MOTOROLA=y
|
||||
CONFIG_ADM5120_OEM_OSBRIDGE=y
|
||||
# CONFIG_ADM5120_OEM_ZYXEL is not set
|
||||
CONFIG_ADM5120_SOC_BGA=y
|
||||
CONFIG_ADM5120_WDT=y
|
||||
CONFIG_ADM5120=y
|
||||
# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
|
||||
# CONFIG_AR7 is not set
|
||||
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
|
||||
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
|
||||
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
|
||||
CONFIG_ARCH_POPULATES_NODE_MAP=y
|
||||
CONFIG_ARCH_REQUIRE_GPIOLIB=y
|
||||
# CONFIG_ARCH_SUPPORTS_MSI is not set
|
||||
CONFIG_ARCH_SUPPORTS_OPROFILE=y
|
||||
CONFIG_ARCH_SUSPEND_POSSIBLE=y
|
||||
CONFIG_ARM_AMBA=y
|
||||
CONFIG_ATA=m
|
||||
# CONFIG_BCM47XX is not set
|
||||
CONFIG_BITREVERSE=y
|
||||
# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
|
||||
# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
CONFIG_CEVT_R4K_LIB=y
|
||||
CONFIG_CEVT_R4K=y
|
||||
CONFIG_CMDLINE="console=ttyS0,115200 rootfstype=squashfs,yaffs2,jffs2"
|
||||
# CONFIG_CPU_BIG_ENDIAN is not set
|
||||
# CONFIG_CPU_CAVIUM_OCTEON is not set
|
||||
CONFIG_CPU_HAS_LLSC=y
|
||||
CONFIG_CPU_HAS_PREFETCH=y
|
||||
CONFIG_CPU_HAS_SYNC=y
|
||||
CONFIG_CPU_LITTLE_ENDIAN=y
|
||||
# CONFIG_CPU_LOONGSON2 is not set
|
||||
CONFIG_CPU_MIPS32_R1=y
|
||||
# CONFIG_CPU_MIPS32_R2 is not set
|
||||
CONFIG_CPU_MIPS32=y
|
||||
# CONFIG_CPU_MIPS64_R1 is not set
|
||||
# CONFIG_CPU_MIPS64_R2 is not set
|
||||
CONFIG_CPU_MIPSR1=y
|
||||
# CONFIG_CPU_NEVADA is not set
|
||||
# CONFIG_CPU_R10000 is not set
|
||||
# CONFIG_CPU_R3000 is not set
|
||||
# CONFIG_CPU_R4300 is not set
|
||||
# CONFIG_CPU_R4X00 is not set
|
||||
# CONFIG_CPU_R5000 is not set
|
||||
# CONFIG_CPU_R5432 is not set
|
||||
# CONFIG_CPU_R5500 is not set
|
||||
# CONFIG_CPU_R6000 is not set
|
||||
# CONFIG_CPU_R8000 is not set
|
||||
# CONFIG_CPU_RM7000 is not set
|
||||
# CONFIG_CPU_RM9000 is not set
|
||||
# CONFIG_CPU_SB1 is not set
|
||||
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
|
||||
CONFIG_CPU_SUPPORTS_HIGHMEM=y
|
||||
# CONFIG_CPU_TX39XX is not set
|
||||
# CONFIG_CPU_TX49XX is not set
|
||||
# CONFIG_CPU_VR41XX is not set
|
||||
CONFIG_CRYPTO_AEAD2=y
|
||||
CONFIG_CRYPTO_AES=m
|
||||
CONFIG_CRYPTO_ARC4=m
|
||||
CONFIG_CRYPTO_BLKCIPHER2=y
|
||||
CONFIG_CRYPTO_BLKCIPHER=m
|
||||
CONFIG_CRYPTO_ECB=m
|
||||
CONFIG_CRYPTO_HASH2=y
|
||||
CONFIG_CRYPTO_HASH=m
|
||||
CONFIG_CRYPTO_MANAGER2=y
|
||||
CONFIG_CRYPTO_MANAGER=m
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_RNG2=y
|
||||
CONFIG_CRYPTO_WORKQUEUE=y
|
||||
CONFIG_CSRC_R4K_LIB=y
|
||||
CONFIG_CSRC_R4K=y
|
||||
CONFIG_DECOMPRESS_LZMA=y
|
||||
CONFIG_DEVPORT=y
|
||||
# CONFIG_DM9000 is not set
|
||||
CONFIG_DMA_NEED_PCI_MAP_STATE=y
|
||||
CONFIG_DMA_NONCOHERENT=y
|
||||
CONFIG_EARLY_PRINTK=y
|
||||
CONFIG_ELF_CORE=y
|
||||
CONFIG_FIRMWARE_IN_KERNEL=y
|
||||
CONFIG_FS_POSIX_ACL=y
|
||||
CONFIG_GENERIC_ACL=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_GENERIC_CMOS_UPDATE=y
|
||||
CONFIG_GENERIC_FIND_LAST_BIT=y
|
||||
CONFIG_GENERIC_FIND_NEXT_BIT=y
|
||||
CONFIG_GENERIC_GPIO=y
|
||||
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
|
||||
CONFIG_GPIOLIB=y
|
||||
# CONFIG_GPIO_PL061 is not set
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
# CONFIG_HAMRADIO is not set
|
||||
CONFIG_HARDWARE_WATCHPOINTS=y
|
||||
CONFIG_HAS_DMA=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT=y
|
||||
CONFIG_HAVE_ARCH_KGDB=y
|
||||
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
|
||||
CONFIG_HAVE_IDE=y
|
||||
CONFIG_HAVE_OPROFILE=y
|
||||
CONFIG_HID=m
|
||||
CONFIG_HID_SUPPORT=y
|
||||
# CONFIG_HOSTAP_FIRMWARE_NVRAM is not set
|
||||
CONFIG_HOSTAP_FIRMWARE=y
|
||||
CONFIG_HOSTAP=m
|
||||
CONFIG_HOSTAP_PCI=m
|
||||
CONFIG_HW_HAS_PCI=y
|
||||
CONFIG_HW_RANDOM=y
|
||||
# CONFIG_HZ_100 is not set
|
||||
CONFIG_HZ=250
|
||||
CONFIG_HZ_250=y
|
||||
CONFIG_IMAGE_CMDLINE_HACK=y
|
||||
CONFIG_INITRAMFS_SOURCE=""
|
||||
CONFIG_INOTIFY_USER=y
|
||||
CONFIG_INOTIFY=y
|
||||
# CONFIG_INPUT_GPIO_BUTTONS is not set
|
||||
CONFIG_INPUT=m
|
||||
# CONFIG_INPUT_YEALINK is not set
|
||||
CONFIG_IRQ_CPU=y
|
||||
CONFIG_KEXEC=y
|
||||
CONFIG_LEDS_GPIO=m
|
||||
CONFIG_LEDS_TRIGGER_ADM5120_SWITCH=m
|
||||
CONFIG_LEGACY_PTY_COUNT=256
|
||||
CONFIG_LEGACY_PTYS=y
|
||||
# CONFIG_LEMOTE_FULONG is not set
|
||||
CONFIG_LIB80211_CRYPT_CCMP=m
|
||||
CONFIG_LIB80211_CRYPT_TKIP=m
|
||||
CONFIG_LIB80211_CRYPT_WEP=m
|
||||
CONFIG_LIB80211=m
|
||||
CONFIG_MAC80211_DEFAULT_PS_VALUE=0
|
||||
# CONFIG_MACH_ALCHEMY is not set
|
||||
# CONFIG_MACH_DECSTATION is not set
|
||||
# CONFIG_MACH_JAZZ is not set
|
||||
# CONFIG_MACH_TX39XX is not set
|
||||
# CONFIG_MACH_TX49XX is not set
|
||||
# CONFIG_MACH_VR41XX is not set
|
||||
CONFIG_MII=m
|
||||
# CONFIG_MIKROTIK_RB532 is not set
|
||||
# CONFIG_MIPS_COBALT is not set
|
||||
# CONFIG_MIPS_FPU_EMU is not set
|
||||
CONFIG_MIPS_L1_CACHE_SHIFT=5
|
||||
CONFIG_MIPS_MACHINE=y
|
||||
# CONFIG_MIPS_MALTA is not set
|
||||
CONFIG_MIPS_MT_DISABLED=y
|
||||
# CONFIG_MIPS_MT_SMP is not set
|
||||
# CONFIG_MIPS_MT_SMTC is not set
|
||||
# CONFIG_MIPS_SIM is not set
|
||||
CONFIG_MIPS=y
|
||||
CONFIG_MODULE_FORCE_UNLOAD=y
|
||||
CONFIG_MTD_ADM5120=y
|
||||
CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC=y
|
||||
# CONFIG_MTD_CFI_INTELEXT is not set
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_JEDECPROBE=y
|
||||
CONFIG_MTD_MYLOADER_PARTS=y
|
||||
CONFIG_MTD_NAND_PLATFORM=y
|
||||
CONFIG_MTD_NAND=y
|
||||
CONFIG_MTD_TRXSPLIT=y
|
||||
CONFIG_NLS=m
|
||||
CONFIG_NO_HZ=y
|
||||
# CONFIG_NO_IOPORT is not set
|
||||
# CONFIG_NXP_STB220 is not set
|
||||
# CONFIG_NXP_STB225 is not set
|
||||
CONFIG_PAGEFLAGS_EXTENDED=y
|
||||
# CONFIG_PARTITION_ADVANCED is not set
|
||||
CONFIG_PATA_RB153_CF=m
|
||||
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
|
||||
CONFIG_PCI_DOMAINS=y
|
||||
# CONFIG_PMC_MSP is not set
|
||||
# CONFIG_PMC_YOSEMITE is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_PROBE_INITRD_HEADER is not set
|
||||
CONFIG_SCHED_OMIT_FRAME_POINTER=y
|
||||
CONFIG_SCSI=m
|
||||
# CONFIG_SERIAL_8250 is not set
|
||||
CONFIG_SERIAL_AMBA_PL010_CONSOLE=y
|
||||
CONFIG_SERIAL_AMBA_PL010_NUMPORTS=2
|
||||
CONFIG_SERIAL_AMBA_PL010_PORTNAME="ttyS"
|
||||
CONFIG_SERIAL_AMBA_PL010=y
|
||||
# CONFIG_SERIAL_AMBA_PL011 is not set
|
||||
# CONFIG_SERIO_AMBAKMI is not set
|
||||
# CONFIG_SERIO_I8042 is not set
|
||||
# CONFIG_SERIO_LIBPS2 is not set
|
||||
# CONFIG_SERIO_PCIPS2 is not set
|
||||
# CONFIG_SERIO_RAW is not set
|
||||
CONFIG_SERIO_SERPORT=y
|
||||
CONFIG_SERIO=y
|
||||
# CONFIG_SGI_IP22 is not set
|
||||
# CONFIG_SGI_IP27 is not set
|
||||
# CONFIG_SGI_IP28 is not set
|
||||
# CONFIG_SGI_IP32 is not set
|
||||
# CONFIG_SIBYTE_BIGSUR is not set
|
||||
# CONFIG_SIBYTE_CARMEL is not set
|
||||
# CONFIG_SIBYTE_CRHINE is not set
|
||||
# CONFIG_SIBYTE_CRHONE is not set
|
||||
# CONFIG_SIBYTE_LITTLESUR is not set
|
||||
# CONFIG_SIBYTE_RHONE is not set
|
||||
# CONFIG_SIBYTE_SENTOSA is not set
|
||||
# CONFIG_SIBYTE_SWARM is not set
|
||||
# CONFIG_SLAB is not set
|
||||
CONFIG_SLUB=y
|
||||
CONFIG_SOFT_WATCHDOG=m
|
||||
# CONFIG_SWAP is not set
|
||||
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
|
||||
CONFIG_SYS_HAS_EARLY_PRINTK=y
|
||||
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
|
||||
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
|
||||
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
|
||||
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
|
||||
# CONFIG_TC35815 is not set
|
||||
CONFIG_TMPFS_POSIX_ACL=y
|
||||
CONFIG_TRAD_SIGNALS=y
|
||||
CONFIG_USB_ADM5120_HCD=m
|
||||
CONFIG_USB_EHCI_HCD=m
|
||||
CONFIG_USB=m
|
||||
# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
|
||||
# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
|
||||
CONFIG_USB_OHCI_HCD=m
|
||||
CONFIG_USB_SUPPORT=y
|
||||
# CONFIG_USB_UHCI_HCD is not set
|
||||
CONFIG_VLAN_8021Q=m
|
||||
CONFIG_VM_EVENT_COUNTERS=y
|
||||
CONFIG_YAFFS_9BYTE_TAGS=y
|
||||
# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
|
||||
CONFIG_YAFFS_AUTO_YAFFS2=y
|
||||
# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
|
||||
# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
|
||||
CONFIG_YAFFS_FS=y
|
||||
CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
|
||||
CONFIG_YAFFS_YAFFS1=y
|
||||
CONFIG_YAFFS_YAFFS2=y
|
||||
CONFIG_ZONE_DMA_FLAG=0
|
||||
@@ -11,7 +11,7 @@ BOARD:=ar7
|
||||
BOARDNAME:=TI AR7
|
||||
FEATURES:=squashfs jffs2 atm
|
||||
|
||||
LINUX_VERSION:=2.6.30.10
|
||||
LINUX_VERSION:=2.6.32.9
|
||||
|
||||
include $(INCLUDE_DIR)/target.mk
|
||||
|
||||
|
||||
@@ -44,8 +44,10 @@
|
||||
#define UR8_REGS_WDT (AR7_REGS_BASE + 0x0b00)
|
||||
#define UR8_REGS_UART1 (AR7_REGS_BASE + 0x0f00)
|
||||
|
||||
#define TITAN_REGS_MAC0 (0x08640000)
|
||||
#define TITAN_REGS_MAC1 (TITAN_REGS_MAC0 + 0x0800)
|
||||
#define TITAN_REGS_ESWITCH_BASE (0x08640000)
|
||||
#define TITAN_REGS_MAC0 (TITAN_REGS_ESWITCH_BASE + 0)
|
||||
#define TITAN_REGS_MAC1 (TITAN_REGS_ESWITCH_BASE + 0x0800)
|
||||
#define TITAN_REGS_MDIO (TITAN_REGS_ESWITCH_BASE + 0x02000)
|
||||
#define TITAN_REGS_VLYNQ0 (AR7_REGS_BASE + 0x1c00)
|
||||
#define TITAN_REGS_VLYNQ1 (AR7_REGS_BASE + 0x1300)
|
||||
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
--- a/arch/mips/ar7/platform.c 2009-11-18 15:47:42.000000000 +0800
|
||||
+++ b/arch/mips/ar7/platform.c 2009-11-19 00:56:05.000000000 +0800
|
||||
--- a/arch/mips/ar7/platform.c 2010-01-25 16:11:24.000000000 +0800
|
||||
+++ b/arch/mips/ar7/platform.c 2010-01-13 14:46:16.000000000 +0800
|
||||
@@ -677,24 +677,32 @@
|
||||
}
|
||||
|
||||
@@ -41,26 +41,36 @@
|
||||
if (res)
|
||||
return res;
|
||||
|
||||
--- a/drivers/net/cpmac.c 2009-11-18 15:47:42.000000000 +0800
|
||||
+++ b/drivers/net/cpmac.c 2009-11-19 00:58:25.000000000 +0800
|
||||
@@ -1236,6 +1236,10 @@
|
||||
ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
|
||||
ar7_device_reset(AR7_RESET_BIT_EPHY);
|
||||
--- a/drivers/net/cpmac.c 2010-01-25 16:11:24.000000000 +0800
|
||||
+++ b/drivers/net/cpmac.c 2010-01-25 16:48:02.000000000 +0800
|
||||
@@ -1141,6 +1141,8 @@
|
||||
goto fail;
|
||||
}
|
||||
|
||||
+ ar7_device_reset(pdata->reset_bit);
|
||||
+
|
||||
dev->irq = platform_get_irq_byname(pdev, "irq");
|
||||
|
||||
dev->open = cpmac_open;
|
||||
@@ -1221,7 +1223,7 @@
|
||||
cpmac_mii->reset = cpmac_mdio_reset;
|
||||
cpmac_mii->irq = mii_irqs;
|
||||
|
||||
- cpmac_mii->priv = ioremap(AR7_REGS_MDIO, 256);
|
||||
+ cpmac_mii->priv = ioremap(ar7_is_titan()?TITAN_REGS_MDIO:AR7_REGS_MDIO, 256);
|
||||
|
||||
if (!cpmac_mii->priv) {
|
||||
printk(KERN_ERR "Can't ioremap mdio registers\n");
|
||||
@@ -1232,9 +1234,10 @@
|
||||
#warning FIXME: unhardcode gpio&reset bits
|
||||
ar7_gpio_disable(26);
|
||||
ar7_gpio_disable(27);
|
||||
- ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);
|
||||
- ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
|
||||
ar7_device_reset(AR7_RESET_BIT_EPHY);
|
||||
+ if (ar7_is_titan()) {
|
||||
+ ar7_device_reset(TITAN_RESET_BIT_EPHY1);
|
||||
+ }
|
||||
+
|
||||
|
||||
cpmac_mii->reset(cpmac_mii);
|
||||
|
||||
for (i = 0; i < 300; i++)
|
||||
@@ -1250,7 +1254,8 @@
|
||||
mask = 0;
|
||||
}
|
||||
|
||||
- cpmac_mii->phy_mask = ~(mask | 0x80000000);
|
||||
+ cpmac_mii->phy_mask = ar7_is_titan()? ~(mask | 0x80000000 | 0x40000000):
|
||||
+ ~(mask | 0x80000000);
|
||||
snprintf(cpmac_mii->id, MII_BUS_ID_SIZE, "1");
|
||||
|
||||
res = mdiobus_register(cpmac_mii);
|
||||
|
||||
@@ -0,0 +1,11 @@
|
||||
--- a/drivers/net/cpmac.c 2010-02-11 23:52:19.000000000 +0000
|
||||
+++ b/drivers/net/cpmac.c 2010-02-20 20:32:58.000000000 +0000
|
||||
@@ -57,7 +57,7 @@
|
||||
|
||||
#define CPMAC_VERSION "0.5.0"
|
||||
/* frame size + 802.1q tag */
|
||||
-#define CPMAC_SKB_SIZE (ETH_FRAME_LEN + 4)
|
||||
+#define CPMAC_SKB_SIZE (ETH_FRAME_LEN + ETH_FCS_LEN + 4)
|
||||
#define CPMAC_QUEUES 8
|
||||
|
||||
/* Ethernet registers */
|
||||
@@ -26,3 +26,18 @@
|
||||
}
|
||||
return (void *)old_handler;
|
||||
}
|
||||
--- a/arch/mips/include/asm/page.h
|
||||
+++ b/arch/mips/include/asm/page.h
|
||||
@@ -185,8 +185,10 @@ typedef struct { unsigned long pgprot; }
|
||||
#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
|
||||
VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
|
||||
|
||||
-#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE)
|
||||
-#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET)
|
||||
+#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE + \
|
||||
+ PHYS_OFFSET)
|
||||
+#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET - \
|
||||
+ PHYS_OFFSET)
|
||||
|
||||
#include <asm-generic/memory_model.h>
|
||||
#include <asm-generic/page.h>
|
||||
|
||||
@@ -1,6 +1,8 @@
|
||||
--- a/arch/mips/ar7/platform.c
|
||||
+++ b/arch/mips/ar7/platform.c
|
||||
@@ -716,23 +716,35 @@ static int __init ar7_register_devices(v
|
||||
Index: linux-2.6.32.9/arch/mips/ar7/platform.c
|
||||
===================================================================
|
||||
--- linux-2.6.32.9.orig/arch/mips/ar7/platform.c 2010-03-07 13:09:00.000000000 +0100
|
||||
+++ linux-2.6.32.9/arch/mips/ar7/platform.c 2010-03-07 13:09:00.000000000 +0100
|
||||
@@ -716,23 +716,35 @@
|
||||
}
|
||||
|
||||
if (ar7_has_high_cpmac()) {
|
||||
@@ -43,10 +45,39 @@
|
||||
if (res)
|
||||
return res;
|
||||
|
||||
--- a/drivers/net/cpmac.c
|
||||
+++ b/drivers/net/cpmac.c
|
||||
@@ -1243,6 +1243,10 @@ int __devinit cpmac_init(void)
|
||||
ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
|
||||
Index: linux-2.6.32.9/drivers/net/cpmac.c
|
||||
===================================================================
|
||||
--- linux-2.6.32.9.orig/drivers/net/cpmac.c 2010-02-23 16:38:51.000000000 +0100
|
||||
+++ linux-2.6.32.9/drivers/net/cpmac.c 2010-03-07 13:24:56.000000000 +0100
|
||||
@@ -1153,6 +1153,8 @@
|
||||
goto fail;
|
||||
}
|
||||
|
||||
+ ar7_device_reset(pdata->reset_bit);
|
||||
+
|
||||
dev->irq = platform_get_irq_byname(pdev, "irq");
|
||||
|
||||
dev->netdev_ops = &cpmac_netdev_ops;
|
||||
@@ -1228,7 +1230,7 @@
|
||||
cpmac_mii->reset = cpmac_mdio_reset;
|
||||
cpmac_mii->irq = mii_irqs;
|
||||
|
||||
- cpmac_mii->priv = ioremap(AR7_REGS_MDIO, 256);
|
||||
+ cpmac_mii->priv = ioremap(ar7_is_titan() ? TITAN_REGS_MDIO : AR7_REGS_MDIO, 256);
|
||||
|
||||
if (!cpmac_mii->priv) {
|
||||
printk(KERN_ERR "Can't ioremap mdio registers\n");
|
||||
@@ -1239,10 +1241,17 @@
|
||||
#warning FIXME: unhardcode gpio&reset bits
|
||||
ar7_gpio_disable(26);
|
||||
ar7_gpio_disable(27);
|
||||
- ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);
|
||||
- ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
|
||||
+
|
||||
+ if (!ar7_is_titan()) {
|
||||
+ ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);
|
||||
+ ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
|
||||
+ }
|
||||
ar7_device_reset(AR7_RESET_BIT_EPHY);
|
||||
|
||||
+ if (ar7_is_titan()) {
|
||||
@@ -56,7 +87,7 @@
|
||||
cpmac_mii->reset(cpmac_mii);
|
||||
|
||||
for (i = 0; i < 300; i++)
|
||||
@@ -1257,7 +1261,8 @@ int __devinit cpmac_init(void)
|
||||
@@ -1257,7 +1266,8 @@
|
||||
mask = 0;
|
||||
}
|
||||
|
||||
@@ -66,3 +97,20 @@
|
||||
snprintf(cpmac_mii->id, MII_BUS_ID_SIZE, "1");
|
||||
|
||||
res = mdiobus_register(cpmac_mii);
|
||||
Index: a/arch/mips/include/asm/mach-ar7/ar7.h
|
||||
===================================================================
|
||||
--- a/arch/mips/include/asm/mach-ar7/ar7.h (revision 19112)
|
||||
+++ b/arch/mips/include/asm/mach-ar7/ar7.h (working copy)
|
||||
@@ -44,8 +44,10 @@
|
||||
#define UR8_REGS_WDT (AR7_REGS_BASE + 0x0b00)
|
||||
#define UR8_REGS_UART1 (AR7_REGS_BASE + 0x0f00)
|
||||
|
||||
-#define TITAN_REGS_MAC0 (0x08640000)
|
||||
-#define TITAN_REGS_MAC1 (TITAN_REGS_MAC0 + 0x0800)
|
||||
+#define TITAN_REGS_ESWITCH_BASE (0x08640000)
|
||||
+#define TITAN_REGS_MAC0 (TITAN_REGS_ESWITCH_BASE + 0)
|
||||
+#define TITAN_REGS_MAC1 (TITAN_REGS_ESWITCH_BASE + 0x0800)
|
||||
+#define TITAN_REGS_MDIO (TITAN_REGS_ESWITCH_BASE + 0x02000)
|
||||
#define TITAN_REGS_VLYNQ0 (AR7_REGS_BASE + 0x1c00)
|
||||
#define TITAN_REGS_VLYNQ1 (AR7_REGS_BASE + 0x1300)
|
||||
|
||||
|
||||
@@ -0,0 +1,16 @@
|
||||
Index: linux-2.6.32.9/drivers/net/cpmac.c
|
||||
===================================================================
|
||||
--- linux-2.6.32.9.orig/drivers/net/cpmac.c 2010-03-06 23:12:46.000000000 +0100
|
||||
+++ linux-2.6.32.9/drivers/net/cpmac.c 2010-03-06 23:13:14.000000000 +0100
|
||||
@@ -1132,8 +1132,9 @@
|
||||
}
|
||||
|
||||
if (phy_id == PHY_MAX_ADDR) {
|
||||
- dev_err(&pdev->dev, "no PHY present\n");
|
||||
- return -ENODEV;
|
||||
+ dev_err(&pdev->dev, "no PHY present, falling back to switch mode\n");
|
||||
+ strncpy(mdio_bus_id, "0", MII_BUS_ID_SIZE); /* fixed phys bus */
|
||||
+ phy_id = pdev->id;
|
||||
}
|
||||
|
||||
dev = alloc_etherdev_mq(sizeof(*priv), CPMAC_QUEUES);
|
||||
@@ -0,0 +1,11 @@
|
||||
--- a/drivers/net/cpmac.c 2010-02-11 23:52:19.000000000 +0000
|
||||
+++ b/drivers/net/cpmac.c 2010-02-20 20:32:58.000000000 +0000
|
||||
@@ -57,7 +57,7 @@
|
||||
|
||||
#define CPMAC_VERSION "0.5.0"
|
||||
/* frame size + 802.1q tag */
|
||||
-#define CPMAC_SKB_SIZE (ETH_FRAME_LEN + 4)
|
||||
+#define CPMAC_SKB_SIZE (ETH_FRAME_LEN + ETH_FCS_LEN + 4)
|
||||
#define CPMAC_QUEUES 8
|
||||
|
||||
/* Ethernet registers */
|
||||
@@ -12,7 +12,7 @@ BOARDNAME:=Atheros AR71xx/AR7240/AR913x
|
||||
FEATURES:=squashfs jffs2 tgz
|
||||
CFLAGS:=-Os -pipe -mips32r2 -mtune=mips32r2 -funit-at-a-time
|
||||
|
||||
LINUX_VERSION:=2.6.32.8
|
||||
LINUX_VERSION:=2.6.32.9
|
||||
|
||||
include $(INCLUDE_DIR)/target.mk
|
||||
|
||||
|
||||
@@ -0,0 +1,20 @@
|
||||
config interface loopback
|
||||
option ifname lo
|
||||
option proto static
|
||||
option ipaddr 127.0.0.1
|
||||
option netmask 255.0.0.0
|
||||
|
||||
config interface eth
|
||||
option ifname eth0
|
||||
option proto none
|
||||
|
||||
config interface lan
|
||||
option ifname 'lan1 lan2 lan3 lan4'
|
||||
option type bridge
|
||||
option proto static
|
||||
option ipaddr 192.168.1.1
|
||||
option netmask 255.255.255.0
|
||||
|
||||
config interface wan
|
||||
option ifname eth1
|
||||
option proto dhcp
|
||||
@@ -0,0 +1,16 @@
|
||||
config interface loopback
|
||||
option ifname lo
|
||||
option proto static
|
||||
option ipaddr 127.0.0.1
|
||||
option netmask 255.0.0.0
|
||||
|
||||
config interface lan
|
||||
option ifname eth1
|
||||
option type bridge
|
||||
option proto static
|
||||
option ipaddr 192.168.1.1
|
||||
option netmask 255.255.255.0
|
||||
|
||||
config interface wan
|
||||
option ifname eth0
|
||||
option proto dhcp
|
||||
@@ -0,0 +1,20 @@
|
||||
config interface loopback
|
||||
option ifname lo
|
||||
option proto static
|
||||
option ipaddr 127.0.0.1
|
||||
option netmask 255.0.0.0
|
||||
|
||||
config interface eth
|
||||
option ifname eth0
|
||||
option proto none
|
||||
|
||||
config interface lan
|
||||
option ifname 'port2 port3 port4 port5'
|
||||
option type bridge
|
||||
option proto static
|
||||
option ipaddr 192.168.1.1
|
||||
option netmask 255.255.255.0
|
||||
|
||||
config interface wan
|
||||
option ifname eth1
|
||||
option proto dhcp
|
||||
@@ -0,0 +1,20 @@
|
||||
config interface loopback
|
||||
option ifname lo
|
||||
option proto static
|
||||
option ipaddr 127.0.0.1
|
||||
option netmask 255.0.0.0
|
||||
|
||||
config interface eth
|
||||
option ifname eth0
|
||||
option proto none
|
||||
|
||||
config interface lan
|
||||
option ifname 'lan1 lan2 lan3 lan4'
|
||||
option type bridge
|
||||
option proto static
|
||||
option ipaddr 192.168.1.1
|
||||
option netmask 255.255.255.0
|
||||
|
||||
config interface wan
|
||||
option ifname eth1
|
||||
option proto dhcp
|
||||
@@ -6,6 +6,7 @@ config interface loopback
|
||||
|
||||
config interface mac0
|
||||
option ifname eth0
|
||||
option proto none
|
||||
|
||||
config interface lan
|
||||
option ifname "lan1 lan2 lan3 lan4"
|
||||
|
||||
@@ -6,6 +6,7 @@ config interface loopback
|
||||
|
||||
config interface eth
|
||||
option ifname eth0
|
||||
option proto none
|
||||
|
||||
config interface lan
|
||||
option ifname "lan1 lan2 lan3 lan4"
|
||||
|
||||
@@ -63,6 +63,9 @@ get_status_led() {
|
||||
pb44)
|
||||
status_led="pb44:amber:jump1"
|
||||
;;
|
||||
rb-411 | rb-411u | rb-433 | rb-433u | rb-450 | rb-450g | rb-493)
|
||||
status_led="rb4xx:yellow:user"
|
||||
;;
|
||||
routerstation | routerstation-pro)
|
||||
status_led="ubnt:green:rf"
|
||||
;;
|
||||
|
||||
+52
@@ -0,0 +1,52 @@
|
||||
#!/bin/sh
|
||||
#
|
||||
# Copyright (C) 2010 OpenWrt.org
|
||||
#
|
||||
|
||||
. /lib/ar71xx.sh
|
||||
|
||||
board=$(ar71xx_board_name)
|
||||
|
||||
rb750_set_leds() {
|
||||
uci batch <<EOF
|
||||
set system.led_act='led'
|
||||
set system.led_act.name='act'
|
||||
set system.led_act.sysfs='rb750:green:act'
|
||||
set system.led_act.default='1'
|
||||
set system.led_port1='led'
|
||||
set system.led_port1.name='port1'
|
||||
set system.led_port1.sysfs='rb750:green:port1'
|
||||
set system.led_port1.trigger='netdev'
|
||||
set system.led_port1.dev=eth1
|
||||
set system.led_port1.mode='tx rx'
|
||||
set system.led_port2='led'
|
||||
set system.led_port2.name='port3'
|
||||
set system.led_port2.sysfs='rb750:green:port2'
|
||||
set system.led_port2.trigger='netdev'
|
||||
set system.led_port2.dev=port2
|
||||
set system.led_port2.mode='link tx rx'
|
||||
set system.led_port3='led'
|
||||
set system.led_port3.name='port3'
|
||||
set system.led_port3.sysfs='rb750:green:port3'
|
||||
set system.led_port3.trigger='netdev'
|
||||
set system.led_port3.dev=port3
|
||||
set system.led_port3.mode='link tx rx'
|
||||
set system.led_port4='led'
|
||||
set system.led_port4.name='port4'
|
||||
set system.led_port4.sysfs='rb750:green:port4'
|
||||
set system.led_port4.trigger='netdev'
|
||||
set system.led_port4.dev=port4
|
||||
set system.led_port4.mode='link tx rx'
|
||||
set system.led_port5='led'
|
||||
set system.led_port5.name='port5'
|
||||
set system.led_port5.sysfs='rb750:green:port5'
|
||||
set system.led_port5.trigger='netdev'
|
||||
set system.led_port5.dev=port5
|
||||
set system.led_port5.mode='link tx rx'
|
||||
commit system
|
||||
EOF
|
||||
}
|
||||
|
||||
if [ "${board}" == "rb-750" ]; then
|
||||
rb750_set_leds
|
||||
fi
|
||||
@@ -46,18 +46,30 @@ ar71xx_board_name() {
|
||||
*PB44)
|
||||
name="pb44"
|
||||
;;
|
||||
*RB-411)
|
||||
*"RouterBOARD 411/A/AH")
|
||||
name="rb-411"
|
||||
;;
|
||||
*RB-433)
|
||||
*"RouterBOARD 411U")
|
||||
name="rb-411u"
|
||||
;;
|
||||
*"RouterBOARD 433/AH")
|
||||
name="rb-433"
|
||||
;;
|
||||
*RB-450)
|
||||
*"RouterBOARD 433UAH")
|
||||
name="rb-433u"
|
||||
;;
|
||||
*"RouterBOARD 450")
|
||||
name="rb-450"
|
||||
;;
|
||||
*RB-493)
|
||||
*"RouterBOARD 450G")
|
||||
name="rb-450g"
|
||||
;;
|
||||
*"RouterBOARD 493/AH")
|
||||
name="rb-493"
|
||||
;;
|
||||
*"RouterBOARD 750")
|
||||
name="rb-750"
|
||||
;;
|
||||
*"Rocket M")
|
||||
name="rocket-m"
|
||||
;;
|
||||
|
||||
@@ -68,7 +68,7 @@ platform_check_image() {
|
||||
[ "$ARGC" -gt 1 ] && return 1
|
||||
|
||||
case "$board" in
|
||||
ap81 | ap83 | dir-600-a1 | dir-615-c1 | dir-825-b1 | mzk-w04nu | mzk-w300nh | tew-632brp | wrt-400n | bullet-m | nano-m | rocket-m | wzr-hp-g300nh)
|
||||
ap81 | ap83 | dir-600-a1 | dir-615-c1 | dir-825-b1 | mzk-w04nu | mzk-w300nh | tew-632brp | wrt400n | bullet-m | nano-m | rocket-m | wzr-hp-g300nh)
|
||||
[ "$magic" != "2705" ] && {
|
||||
echo "Invalid image type."
|
||||
return 1
|
||||
@@ -123,7 +123,7 @@ platform_do_upgrade() {
|
||||
local board=$(ar71xx_board_name)
|
||||
|
||||
case "$board" in
|
||||
routerstation | routerstation-pro)
|
||||
routerstation | routerstation-pro | ls-sr71)
|
||||
platform_do_upgrade_combined "$ARGV"
|
||||
;;
|
||||
*)
|
||||
|
||||
@@ -8,13 +8,14 @@
|
||||
# Based on cf2nand from RB532 support
|
||||
. /etc/functions.sh
|
||||
|
||||
[ -d /tmp/wget2nand-rootfs ] && {
|
||||
echo "/tmp/wget2nand-rootfs already exists"
|
||||
exit 1
|
||||
}
|
||||
wget2nand_dir=/tmp/wget2nand
|
||||
mnt_kernel=$wget2nand_dir/mnt_kernel
|
||||
mnt_rootfs=$wget2nand_dir/mnt_rootfs
|
||||
src_rootfs=$wget2nand_dir/rootfs.tgz
|
||||
src_kernel=$wget2nand_dir/kernel
|
||||
|
||||
[ -d /tmp/wget2nand-kernel ] && {
|
||||
echo "/tmp/wget2nand-kernel already exists"
|
||||
[ -d "$wget2nand_dir" ] && {
|
||||
echo "$wget2nand_dir already exists"
|
||||
exit 1
|
||||
}
|
||||
|
||||
@@ -26,9 +27,8 @@ url=$1
|
||||
exit 1
|
||||
}
|
||||
|
||||
# first get an address for br-lan using udhcpc
|
||||
killall udhcpc
|
||||
/sbin/udhcpc -i br-lan
|
||||
url_kernel=$url/openwrt-ar71xx-vmlinux.elf
|
||||
url_rootfs=$url/openwrt-ar71xx-rootfs.tgz
|
||||
|
||||
mtd_kernel="$(find_mtd_part 'kernel')"
|
||||
mtd_rootfs="$(find_mtd_part 'rootfs')"
|
||||
@@ -37,37 +37,50 @@ mtd_rootfs="$(find_mtd_part 'rootfs')"
|
||||
exit 1
|
||||
}
|
||||
|
||||
# first get an address for br-lan using udhcpc
|
||||
killall udhcpc
|
||||
/sbin/udhcpc -i br-lan
|
||||
|
||||
mkdir "$wget2nand_dir"
|
||||
wget $url_kernel -O "$src_kernel" || {
|
||||
echo "Unable to download $url_kernel"
|
||||
exit 1
|
||||
}
|
||||
|
||||
wget $url_rootfs -O "$src_rootfs" || {
|
||||
echo "Unable to download $url_rootfs"
|
||||
exit 1
|
||||
}
|
||||
|
||||
echo "Erasing filesystem..."
|
||||
mtd erase kernel 2>/dev/null >/dev/null
|
||||
mtd erase rootfs 2>/dev/null >/dev/null
|
||||
|
||||
echo "Mounting $mtd_rootfs as new root and $mtd_kernel as kernel partition"
|
||||
|
||||
mkdir /tmp/wget2nand-rootfs
|
||||
mkdir /tmp/wget2nand-kernel
|
||||
mount -t yaffs2 "$mtd_rootfs" /tmp/wget2nand-rootfs
|
||||
mount -t yaffs2 "$mtd_kernel" /tmp/wget2nand-kernel
|
||||
mkdir "$mnt_kernel"
|
||||
mkdir "$mnt_rootfs"
|
||||
mount -t yaffs2 "$mtd_kernel" "$mnt_kernel"
|
||||
mount -t yaffs2 "$mtd_rootfs" "$mnt_rootfs"
|
||||
|
||||
echo "Erasing existing files..."
|
||||
rm -rf /tmp/wget2nand-rootfs/*
|
||||
echo "Copying kernel..."
|
||||
cp $src_kernel $mnt_kernel/kernel
|
||||
chmod +x $mnt_kernel/kernel
|
||||
|
||||
echo "Copying filesystem..."
|
||||
( wget -O - $url/openwrt-ar71xx-rootfs.tgz) | ( cd /tmp/wget2nand-rootfs/; tar xvz )
|
||||
# RouterBOOT is looking for a kernel named "kernel"
|
||||
wget -O /tmp/wget2nand-kernel/kernel $url/openwrt-ar71xx-vmlinux.elf
|
||||
|
||||
chmod +x /tmp/wget2nand-kernel/kernel
|
||||
echo "Preparing filesystem..."
|
||||
( cd "$mnt_rootfs"; tar xvz -f "$src_rootfs" )
|
||||
|
||||
# make sure everything is written before we unmount the partitions
|
||||
echo "chmod ugo+x /" > /tmp/wget2nand-rootfs/etc/uci-defaults/set_root_permission
|
||||
echo "chmod ugo+x /" > $mnt_rootfs/etc/uci-defaults/set_root_permission
|
||||
sync
|
||||
ls /tmp/wget2nand-kernel/
|
||||
ls /tmp/wget2nand-rootfs/
|
||||
ls $mnt_kernel >/dev/null
|
||||
ls $mnt_rootfs >/dev/null
|
||||
|
||||
echo "Cleaning up..."
|
||||
# unmount the partitions and remove the directories into which they were mounted
|
||||
umount /tmp/wget2nand-kernel
|
||||
umount /tmp/wget2nand-rootfs
|
||||
rmdir /tmp/wget2nand-kernel
|
||||
rmdir /tmp/wget2nand-rootfs
|
||||
umount $mnt_kernel
|
||||
umount $mnt_rootfs
|
||||
rm -rf $wget2nand_dir
|
||||
|
||||
# all done
|
||||
echo "Image written, you can now reboot. Remember to change the boot source to Boot from Nand"
|
||||
|
||||
@@ -26,7 +26,8 @@ CONFIG_AR71XX_MACH_MZK_W04NU=y
|
||||
CONFIG_AR71XX_MACH_MZK_W300NH=y
|
||||
CONFIG_AR71XX_MACH_PB42=y
|
||||
CONFIG_AR71XX_MACH_PB44=y
|
||||
CONFIG_AR71XX_MACH_RB_4XX=y
|
||||
CONFIG_AR71XX_MACH_RB4XX=y
|
||||
CONFIG_AR71XX_MACH_RB750=y
|
||||
CONFIG_AR71XX_MACH_TEW_632BRP=y
|
||||
CONFIG_AR71XX_MACH_TL_WR1043ND=y
|
||||
CONFIG_AR71XX_MACH_TL_WR741ND=y
|
||||
@@ -132,6 +133,7 @@ CONFIG_INITRAMFS_ROOT_UID=0
|
||||
CONFIG_INITRAMFS_SOURCE="../../root"
|
||||
CONFIG_IRQ_CPU=y
|
||||
# CONFIG_LEDS_GPIO is not set
|
||||
# CONFIG_LEDS_RB750 is not set
|
||||
# CONFIG_LEDS_WNDR3700_USB is not set
|
||||
# CONFIG_M25PXX_USE_FAST_READ is not set
|
||||
# CONFIG_MACH_ALCHEMY is not set
|
||||
@@ -160,11 +162,13 @@ CONFIG_MTD_M25P80=y
|
||||
CONFIG_MTD_MYLOADER_PARTS=y
|
||||
CONFIG_MTD_NAND=y
|
||||
CONFIG_MTD_NAND_RB4XX=y
|
||||
CONFIG_MTD_NAND_RB750=y
|
||||
CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-2
|
||||
CONFIG_MTD_REDBOOT_PARTS=y
|
||||
CONFIG_MTD_WRT160NL_PARTS=y
|
||||
CONFIG_MYLOADER=y
|
||||
CONFIG_NET_DSA=y
|
||||
CONFIG_NET_DSA_AR7240=y
|
||||
CONFIG_NET_DSA_MV88E6060=y
|
||||
CONFIG_NET_DSA_MV88E6063=y
|
||||
# CONFIG_NET_DSA_MV88E6123_61_65 is not set
|
||||
@@ -173,6 +177,7 @@ CONFIG_NET_DSA_MV88E6063=y
|
||||
# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set
|
||||
# CONFIG_NET_DSA_TAG_DSA is not set
|
||||
# CONFIG_NET_DSA_TAG_EDSA is not set
|
||||
CONFIG_NET_DSA_TAG_QINQ=y
|
||||
CONFIG_NET_DSA_TAG_TRAILER=y
|
||||
# CONFIG_NO_IOPORT is not set
|
||||
# CONFIG_NXP_STB220 is not set
|
||||
|
||||
@@ -0,0 +1,288 @@
|
||||
CONFIG_32BIT=y
|
||||
# CONFIG_64BIT is not set
|
||||
CONFIG_AG71XX=y
|
||||
CONFIG_AG71XX_AR8216_SUPPORT=y
|
||||
# CONFIG_AG71XX_DEBUG is not set
|
||||
# CONFIG_AG71XX_DEBUG_FS is not set
|
||||
# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
|
||||
# CONFIG_AR7 is not set
|
||||
CONFIG_AR71XX_DEV_AP91_ETH=y
|
||||
CONFIG_AR71XX_DEV_AP91_PCI=y
|
||||
CONFIG_AR71XX_DEV_AP94_PCI=y
|
||||
CONFIG_AR71XX_DEV_AR913X_WMAC=y
|
||||
CONFIG_AR71XX_DEV_DSA=y
|
||||
CONFIG_AR71XX_DEV_GPIO_BUTTONS=y
|
||||
CONFIG_AR71XX_DEV_LEDS_GPIO=y
|
||||
CONFIG_AR71XX_DEV_M25P80=y
|
||||
CONFIG_AR71XX_DEV_PB42_PCI=y
|
||||
CONFIG_AR71XX_DEV_USB=y
|
||||
CONFIG_AR71XX_MACH_AP81=y
|
||||
CONFIG_AR71XX_MACH_AP83=y
|
||||
CONFIG_AR71XX_MACH_AW_NR580=y
|
||||
CONFIG_AR71XX_MACH_DIR_600_A1=y
|
||||
CONFIG_AR71XX_MACH_DIR_615_C1=y
|
||||
CONFIG_AR71XX_MACH_DIR_825_B1=y
|
||||
CONFIG_AR71XX_MACH_MZK_W04NU=y
|
||||
CONFIG_AR71XX_MACH_MZK_W300NH=y
|
||||
CONFIG_AR71XX_MACH_PB42=y
|
||||
CONFIG_AR71XX_MACH_PB44=y
|
||||
CONFIG_AR71XX_MACH_RB4XX=y
|
||||
CONFIG_AR71XX_MACH_RB750=y
|
||||
CONFIG_AR71XX_MACH_TEW_632BRP=y
|
||||
CONFIG_AR71XX_MACH_TL_WR1043ND=y
|
||||
CONFIG_AR71XX_MACH_TL_WR741ND=y
|
||||
CONFIG_AR71XX_MACH_TL_WR841N_V1=y
|
||||
CONFIG_AR71XX_MACH_TL_WR941ND=y
|
||||
CONFIG_AR71XX_MACH_UBNT=y
|
||||
CONFIG_AR71XX_MACH_WNDR3700=y
|
||||
CONFIG_AR71XX_MACH_WNR2000=y
|
||||
CONFIG_AR71XX_MACH_WP543=y
|
||||
CONFIG_AR71XX_MACH_WRT160NL=y
|
||||
CONFIG_AR71XX_MACH_WRT400N=y
|
||||
CONFIG_AR71XX_MACH_WZR_HP_G300NH=y
|
||||
CONFIG_AR71XX_NVRAM=y
|
||||
CONFIG_AR71XX_WDT=y
|
||||
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
|
||||
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
|
||||
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
|
||||
CONFIG_ARCH_POPULATES_NODE_MAP=y
|
||||
CONFIG_ARCH_REQUIRE_GPIOLIB=y
|
||||
# CONFIG_ARCH_SUPPORTS_MSI is not set
|
||||
CONFIG_ARCH_SUPPORTS_OPROFILE=y
|
||||
CONFIG_ARCH_SUSPEND_POSSIBLE=y
|
||||
CONFIG_ATHEROS_AR71XX=y
|
||||
# CONFIG_BCM47XX is not set
|
||||
# CONFIG_BCM63XX is not set
|
||||
CONFIG_BITREVERSE=y
|
||||
# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
|
||||
# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
CONFIG_CEVT_R4K=y
|
||||
CONFIG_CEVT_R4K_LIB=y
|
||||
CONFIG_CMDLINE="rootfstype=squashfs,yaffs,jffs2 noinitrd console=ttyS0,115200"
|
||||
CONFIG_CMDLINE_BOOL=y
|
||||
# CONFIG_CMDLINE_OVERRIDE is not set
|
||||
CONFIG_CPU_BIG_ENDIAN=y
|
||||
# CONFIG_CPU_CAVIUM_OCTEON is not set
|
||||
CONFIG_CPU_HAS_PREFETCH=y
|
||||
CONFIG_CPU_HAS_SYNC=y
|
||||
# CONFIG_CPU_LITTLE_ENDIAN is not set
|
||||
# CONFIG_CPU_LOONGSON2E is not set
|
||||
# CONFIG_CPU_LOONGSON2F is not set
|
||||
CONFIG_CPU_MIPS32=y
|
||||
# CONFIG_CPU_MIPS32_R1 is not set
|
||||
CONFIG_CPU_MIPS32_R2=y
|
||||
# CONFIG_CPU_MIPS64_R1 is not set
|
||||
# CONFIG_CPU_MIPS64_R2 is not set
|
||||
CONFIG_CPU_MIPSR2=y
|
||||
# CONFIG_CPU_NEVADA is not set
|
||||
# CONFIG_CPU_R10000 is not set
|
||||
# CONFIG_CPU_R3000 is not set
|
||||
# CONFIG_CPU_R4300 is not set
|
||||
# CONFIG_CPU_R4X00 is not set
|
||||
# CONFIG_CPU_R5000 is not set
|
||||
# CONFIG_CPU_R5432 is not set
|
||||
# CONFIG_CPU_R5500 is not set
|
||||
# CONFIG_CPU_R6000 is not set
|
||||
# CONFIG_CPU_R8000 is not set
|
||||
# CONFIG_CPU_RM7000 is not set
|
||||
# CONFIG_CPU_RM9000 is not set
|
||||
# CONFIG_CPU_SB1 is not set
|
||||
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
|
||||
CONFIG_CPU_SUPPORTS_HIGHMEM=y
|
||||
# CONFIG_CPU_TX39XX is not set
|
||||
# CONFIG_CPU_TX49XX is not set
|
||||
# CONFIG_CPU_VR41XX is not set
|
||||
CONFIG_CSRC_R4K=y
|
||||
CONFIG_CSRC_R4K_LIB=y
|
||||
CONFIG_DECOMPRESS_LZMA=y
|
||||
# CONFIG_DEFAULT_SECURITY_SELINUX is not set
|
||||
# CONFIG_DEFAULT_SECURITY_SMACK is not set
|
||||
# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
|
||||
CONFIG_DEVPORT=y
|
||||
# CONFIG_DM9000 is not set
|
||||
CONFIG_DMA_NEED_PCI_MAP_STATE=y
|
||||
CONFIG_DMA_NONCOHERENT=y
|
||||
CONFIG_EARLY_PRINTK=y
|
||||
# CONFIG_FSNOTIFY is not set
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
|
||||
CONFIG_GENERIC_CMOS_UPDATE=y
|
||||
CONFIG_GENERIC_FIND_LAST_BIT=y
|
||||
CONFIG_GENERIC_FIND_NEXT_BIT=y
|
||||
CONFIG_GENERIC_GPIO=y
|
||||
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
|
||||
CONFIG_GPIOLIB=y
|
||||
CONFIG_GPIO_NXP_74HC153=y
|
||||
CONFIG_GPIO_PCF857X=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_HARDWARE_WATCHPOINTS=y
|
||||
CONFIG_HAS_DMA=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT=y
|
||||
CONFIG_HAVE_ARCH_KGDB=y
|
||||
CONFIG_HAVE_DYNAMIC_FTRACE=y
|
||||
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
|
||||
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
|
||||
CONFIG_HAVE_FUNCTION_TRACER=y
|
||||
CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
|
||||
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
|
||||
CONFIG_HAVE_IDE=y
|
||||
CONFIG_HAVE_OPROFILE=y
|
||||
CONFIG_HW_HAS_PCI=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_ALGOBIT=y
|
||||
CONFIG_I2C_BOARDINFO=y
|
||||
CONFIG_I2C_GPIO=y
|
||||
CONFIG_ICPLUS_PHY=y
|
||||
CONFIG_IMAGE_CMDLINE_HACK=y
|
||||
# CONFIG_INITRAMFS_COMPRESSION_LZO is not set
|
||||
CONFIG_INITRAMFS_ROOT_GID=0
|
||||
CONFIG_INITRAMFS_ROOT_UID=0
|
||||
CONFIG_INITRAMFS_SOURCE="../../root"
|
||||
# CONFIG_INLINE_READ_LOCK is not set
|
||||
# CONFIG_INLINE_READ_LOCK_BH is not set
|
||||
# CONFIG_INLINE_READ_LOCK_IRQ is not set
|
||||
# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
|
||||
# CONFIG_INLINE_READ_TRYLOCK is not set
|
||||
CONFIG_INLINE_READ_UNLOCK=y
|
||||
# CONFIG_INLINE_READ_UNLOCK_BH is not set
|
||||
CONFIG_INLINE_READ_UNLOCK_IRQ=y
|
||||
# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
|
||||
# CONFIG_INLINE_SPIN_LOCK is not set
|
||||
# CONFIG_INLINE_SPIN_LOCK_BH is not set
|
||||
# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
|
||||
# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
|
||||
# CONFIG_INLINE_SPIN_TRYLOCK is not set
|
||||
# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
|
||||
CONFIG_INLINE_SPIN_UNLOCK=y
|
||||
# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
|
||||
CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
|
||||
# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
|
||||
# CONFIG_INLINE_WRITE_LOCK is not set
|
||||
# CONFIG_INLINE_WRITE_LOCK_BH is not set
|
||||
# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
|
||||
# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
|
||||
# CONFIG_INLINE_WRITE_TRYLOCK is not set
|
||||
CONFIG_INLINE_WRITE_UNLOCK=y
|
||||
# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
|
||||
CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
|
||||
# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
|
||||
CONFIG_IRQ_CPU=y
|
||||
# CONFIG_LEDS_GPIO is not set
|
||||
# CONFIG_LEDS_RB750 is not set
|
||||
# CONFIG_LEDS_WNDR3700_USB is not set
|
||||
CONFIG_LOONGSON_UART_BASE=y
|
||||
# CONFIG_M25PXX_USE_FAST_READ is not set
|
||||
# CONFIG_MACH_ALCHEMY is not set
|
||||
# CONFIG_MACH_DECSTATION is not set
|
||||
# CONFIG_MACH_JAZZ is not set
|
||||
# CONFIG_MACH_LOONGSON is not set
|
||||
# CONFIG_MACH_TX39XX is not set
|
||||
# CONFIG_MACH_TX49XX is not set
|
||||
# CONFIG_MACH_VR41XX is not set
|
||||
CONFIG_MICREL_PHY=y
|
||||
# CONFIG_MIKROTIK_RB532 is not set
|
||||
CONFIG_MIPS=y
|
||||
# CONFIG_MIPS_COBALT is not set
|
||||
CONFIG_MIPS_L1_CACHE_SHIFT=5
|
||||
CONFIG_MIPS_MACHINE=y
|
||||
# CONFIG_MIPS_MALTA is not set
|
||||
CONFIG_MIPS_MT_DISABLED=y
|
||||
# CONFIG_MIPS_MT_SMP is not set
|
||||
# CONFIG_MIPS_MT_SMTC is not set
|
||||
# CONFIG_MIPS_SIM is not set
|
||||
CONFIG_MTD_AR91XX_FLASH=y
|
||||
# CONFIG_MTD_CFI_INTELEXT is not set
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_JEDECPROBE=y
|
||||
CONFIG_MTD_M25P80=y
|
||||
CONFIG_MTD_MYLOADER_PARTS=y
|
||||
CONFIG_MTD_NAND=y
|
||||
CONFIG_MTD_NAND_RB4XX=y
|
||||
CONFIG_MTD_NAND_RB750=y
|
||||
CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-2
|
||||
CONFIG_MTD_REDBOOT_PARTS=y
|
||||
CONFIG_MTD_WRT160NL_PARTS=y
|
||||
# CONFIG_MUTEX_SPIN_ON_OWNER is not set
|
||||
CONFIG_MYLOADER=y
|
||||
CONFIG_NET_DSA=y
|
||||
CONFIG_NET_DSA_AR7240=y
|
||||
CONFIG_NET_DSA_MV88E6060=y
|
||||
CONFIG_NET_DSA_MV88E6063=y
|
||||
# CONFIG_NET_DSA_MV88E6123_61_65 is not set
|
||||
# CONFIG_NET_DSA_MV88E6131 is not set
|
||||
# CONFIG_NET_DSA_MV88E6XXX is not set
|
||||
# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set
|
||||
# CONFIG_NET_DSA_TAG_DSA is not set
|
||||
# CONFIG_NET_DSA_TAG_EDSA is not set
|
||||
CONFIG_NET_DSA_TAG_QINQ=y
|
||||
CONFIG_NET_DSA_TAG_TRAILER=y
|
||||
# CONFIG_NO_IOPORT is not set
|
||||
# CONFIG_NXP_STB220 is not set
|
||||
# CONFIG_NXP_STB225 is not set
|
||||
CONFIG_PAGEFLAGS_EXTENDED=y
|
||||
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
|
||||
CONFIG_PCI_DOMAINS=y
|
||||
CONFIG_PHYLIB=y
|
||||
# CONFIG_PMC_MSP is not set
|
||||
# CONFIG_PMC_YOSEMITE is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_POWERTV is not set
|
||||
CONFIG_RTL8306_PHY=y
|
||||
CONFIG_RTL8366RB_PHY=y
|
||||
CONFIG_RTL8366S_PHY=y
|
||||
CONFIG_RTL8366_SMI=y
|
||||
CONFIG_SCHED_OMIT_FRAME_POINTER=y
|
||||
# CONFIG_SCSI_DMA is not set
|
||||
# CONFIG_SERIAL_8250_EXTENDED is not set
|
||||
CONFIG_SERIAL_8250_NR_UARTS=1
|
||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=1
|
||||
# CONFIG_SGI_IP22 is not set
|
||||
# CONFIG_SGI_IP27 is not set
|
||||
# CONFIG_SGI_IP28 is not set
|
||||
# CONFIG_SGI_IP32 is not set
|
||||
# CONFIG_SIBYTE_BIGSUR is not set
|
||||
# CONFIG_SIBYTE_CARMEL is not set
|
||||
# CONFIG_SIBYTE_CRHINE is not set
|
||||
# CONFIG_SIBYTE_CRHONE is not set
|
||||
# CONFIG_SIBYTE_LITTLESUR is not set
|
||||
# CONFIG_SIBYTE_RHONE is not set
|
||||
# CONFIG_SIBYTE_SENTOSA is not set
|
||||
# CONFIG_SIBYTE_SWARM is not set
|
||||
# CONFIG_SLAB is not set
|
||||
CONFIG_SLUB=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_AP83=y
|
||||
CONFIG_SPI_AR71XX=y
|
||||
CONFIG_SPI_BITBANG=y
|
||||
CONFIG_SPI_GPIO=y
|
||||
CONFIG_SPI_MASTER=y
|
||||
CONFIG_SPI_PB44=y
|
||||
# CONFIG_SPI_SPIDEV is not set
|
||||
# CONFIG_SPI_VSC7385 is not set
|
||||
CONFIG_SWCONFIG=y
|
||||
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
|
||||
CONFIG_SYS_HAS_CPU_MIPS32_R2=y
|
||||
CONFIG_SYS_HAS_EARLY_PRINTK=y
|
||||
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
|
||||
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
|
||||
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
|
||||
# CONFIG_TC35815 is not set
|
||||
# CONFIG_TINY_RCU is not set
|
||||
CONFIG_TRAD_SIGNALS=y
|
||||
# CONFIG_TREE_PREEMPT_RCU is not set
|
||||
CONFIG_TREE_RCU=y
|
||||
CONFIG_USB_SUPPORT=y
|
||||
CONFIG_YAFFS_9BYTE_TAGS=y
|
||||
CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED=y
|
||||
CONFIG_YAFFS_AUTO_YAFFS2=y
|
||||
# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
|
||||
# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
|
||||
CONFIG_YAFFS_FS=y
|
||||
CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
|
||||
CONFIG_YAFFS_YAFFS1=y
|
||||
CONFIG_YAFFS_YAFFS2=y
|
||||
CONFIG_ZONE_DMA_FLAG=0
|
||||
@@ -106,13 +106,18 @@ config AR71XX_MACH_WRT400N
|
||||
select AR71XX_DEV_LEDS_GPIO
|
||||
default n
|
||||
|
||||
config AR71XX_MACH_RB_4XX
|
||||
config AR71XX_MACH_RB4XX
|
||||
bool "MikroTik RouterBOARD 4xx series support"
|
||||
select AR71XX_DEV_GPIO_BUTTONS
|
||||
select AR71XX_DEV_LEDS_GPIO
|
||||
select AR71XX_DEV_USB
|
||||
default n
|
||||
|
||||
config AR71XX_MACH_RB750
|
||||
bool "MikroTik RouterBOARD 750 support"
|
||||
select AR71XX_DEV_AP91_ETH
|
||||
default n
|
||||
|
||||
config AR71XX_MACH_WNDR3700
|
||||
bool "NETGEAR WNDR3700 board support"
|
||||
select AR71XX_DEV_M25P80
|
||||
|
||||
@@ -36,7 +36,8 @@ obj-$(CONFIG_AR71XX_MACH_MZK_W04NU) += mach-mzk-w04nu.o
|
||||
obj-$(CONFIG_AR71XX_MACH_MZK_W300NH) += mach-mzk-w300nh.o
|
||||
obj-$(CONFIG_AR71XX_MACH_PB42) += mach-pb42.o
|
||||
obj-$(CONFIG_AR71XX_MACH_PB44) += mach-pb44.o
|
||||
obj-$(CONFIG_AR71XX_MACH_RB_4XX) += mach-rb-4xx.o
|
||||
obj-$(CONFIG_AR71XX_MACH_RB4XX) += mach-rb4xx.o
|
||||
obj-$(CONFIG_AR71XX_MACH_RB750) += mach-rb750.o
|
||||
obj-$(CONFIG_AR71XX_MACH_TEW_632BRP) += mach-tew-632brp.o
|
||||
obj-$(CONFIG_AR71XX_MACH_TL_WR741ND) += mach-tl-wr741nd.o
|
||||
obj-$(CONFIG_AR71XX_MACH_TL_WR841N_V1) += mach-tl-wr841n.o
|
||||
|
||||
@@ -9,12 +9,43 @@
|
||||
*/
|
||||
|
||||
#include "devices.h"
|
||||
#include "dev-dsa.h"
|
||||
#include "dev-ap91-eth.h"
|
||||
|
||||
void __init ap91_eth_init(u8 *mac_addr)
|
||||
static struct dsa_chip_data ap91_dsa_chip = {
|
||||
.port_names[0] = "cpu",
|
||||
.port_names[1] = "lan1",
|
||||
.port_names[2] = "lan2",
|
||||
.port_names[3] = "lan3",
|
||||
.port_names[4] = "lan4",
|
||||
};
|
||||
|
||||
static struct dsa_platform_data ap91_dsa_data = {
|
||||
.nr_chips = 1,
|
||||
.chip = &ap91_dsa_chip,
|
||||
};
|
||||
|
||||
static void ap91_eth_set_port_name(unsigned port, const char *name)
|
||||
{
|
||||
if (port < 1 || port > 5)
|
||||
return;
|
||||
|
||||
if (name)
|
||||
ap91_dsa_chip.port_names[port] = (char *) name;
|
||||
}
|
||||
|
||||
void __init ap91_eth_init(u8 *mac_addr, const char *port_names[])
|
||||
{
|
||||
if (mac_addr)
|
||||
ar71xx_set_mac_base(mac_addr);
|
||||
|
||||
if (port_names) {
|
||||
int i;
|
||||
|
||||
for (i = 0; i < AP91_ETH_NUM_PORT_NAMES; i++)
|
||||
ap91_eth_set_port_name(i + 1, port_names[i]);
|
||||
}
|
||||
|
||||
/* WAN port */
|
||||
ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
|
||||
ar71xx_eth0_data.phy_mask = 0x0;
|
||||
@@ -36,4 +67,6 @@ void __init ap91_eth_init(u8 *mac_addr)
|
||||
ar71xx_add_device_mdio(0x0);
|
||||
ar71xx_add_device_eth(1);
|
||||
ar71xx_add_device_eth(0);
|
||||
|
||||
ar71xx_add_device_dsa(1, &ap91_dsa_data);
|
||||
}
|
||||
|
||||
@@ -11,8 +11,10 @@
|
||||
#ifndef _AR71XX_DEV_AP91_ETH_H
|
||||
#define _AR71XX_DEV_AP91_ETH_H
|
||||
|
||||
#define AP91_ETH_NUM_PORT_NAMES 4
|
||||
|
||||
#if defined(CONFIG_AR71XX_DEV_AP91_ETH)
|
||||
void ap91_eth_init(u8 *mac_addr) __init;
|
||||
void ap91_eth_init(u8 *mac_addr, const char *port_names[]) __init;
|
||||
#else
|
||||
static inline void ap91_eth_init(u8 *mac_addr) { }
|
||||
#endif
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
/*
|
||||
* Atheros AR71xx SoC GPIO API support
|
||||
*
|
||||
* Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
|
||||
* Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
|
||||
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
@@ -109,6 +109,8 @@ void ar71xx_gpio_function_enable(u32 mask)
|
||||
spin_lock_irqsave(&ar71xx_gpio_lock, flags);
|
||||
|
||||
ar71xx_gpio_wr(GPIO_REG_FUNC, ar71xx_gpio_rr(GPIO_REG_FUNC) | mask);
|
||||
/* flush write */
|
||||
(void) ar71xx_gpio_rr(GPIO_REG_FUNC);
|
||||
|
||||
spin_unlock_irqrestore(&ar71xx_gpio_lock, flags);
|
||||
}
|
||||
@@ -120,10 +122,27 @@ void ar71xx_gpio_function_disable(u32 mask)
|
||||
spin_lock_irqsave(&ar71xx_gpio_lock, flags);
|
||||
|
||||
ar71xx_gpio_wr(GPIO_REG_FUNC, ar71xx_gpio_rr(GPIO_REG_FUNC) & ~mask);
|
||||
/* flush write */
|
||||
(void) ar71xx_gpio_rr(GPIO_REG_FUNC);
|
||||
|
||||
spin_unlock_irqrestore(&ar71xx_gpio_lock, flags);
|
||||
}
|
||||
|
||||
void ar71xx_gpio_function_setup(u32 set, u32 clear)
|
||||
{
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&ar71xx_gpio_lock, flags);
|
||||
|
||||
ar71xx_gpio_wr(GPIO_REG_FUNC,
|
||||
(ar71xx_gpio_rr(GPIO_REG_FUNC) & ~clear) | set);
|
||||
/* flush write */
|
||||
(void) ar71xx_gpio_rr(GPIO_REG_FUNC);
|
||||
|
||||
spin_unlock_irqrestore(&ar71xx_gpio_lock, flags);
|
||||
}
|
||||
EXPORT_SYMBOL(ar71xx_gpio_function_setup);
|
||||
|
||||
void __init ar71xx_gpio_init(void)
|
||||
{
|
||||
int err;
|
||||
|
||||
@@ -158,8 +158,15 @@ static struct irqaction ar724x_pci_irqaction = {
|
||||
|
||||
static void __init ar724x_pci_irq_init(void)
|
||||
{
|
||||
u32 t;
|
||||
int i;
|
||||
|
||||
t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE);
|
||||
if (t & (AR724X_RESET_PCIE | AR724X_RESET_PCIE_PHY |
|
||||
AR724X_RESET_PCIE_PHY_SERIAL)) {
|
||||
return;
|
||||
}
|
||||
|
||||
ar71xx_ip2_irq_handler = ar724x_pci_irq_dispatch;
|
||||
|
||||
ar724x_pci_wr(AR724X_PCI_REG_INT_MASK, 0);
|
||||
|
||||
@@ -130,7 +130,7 @@ static void __init dir_600_a1_setup(void)
|
||||
ARRAY_SIZE(dir_600_a1_gpio_buttons),
|
||||
dir_600_a1_gpio_buttons);
|
||||
|
||||
ap91_eth_init(mac);
|
||||
ap91_eth_init(mac, NULL);
|
||||
ap91_pci_init(ee, mac);
|
||||
}
|
||||
|
||||
|
||||
@@ -0,0 +1,133 @@
|
||||
/*
|
||||
* MikroTik RouterBOARD 750 support
|
||||
*
|
||||
* Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License version 2 as published
|
||||
* by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/platform_device.h>
|
||||
#include <asm/mach-ar71xx/ar71xx.h>
|
||||
#include <asm/mach-ar71xx/mach-rb750.h>
|
||||
|
||||
#include "machtype.h"
|
||||
#include "dev-ap91-eth.h"
|
||||
|
||||
static struct rb750_led_data rb750_leds[] = {
|
||||
{
|
||||
.name = "rb750:green:act",
|
||||
.mask = RB750_LED_ACT,
|
||||
.active_low = 1,
|
||||
}, {
|
||||
.name = "rb750:green:port1",
|
||||
.mask = RB750_LED_PORT5,
|
||||
.active_low = 1,
|
||||
}, {
|
||||
.name = "rb750:green:port2",
|
||||
.mask = RB750_LED_PORT4,
|
||||
.active_low = 1,
|
||||
}, {
|
||||
.name = "rb750:green:port3",
|
||||
.mask = RB750_LED_PORT3,
|
||||
.active_low = 1,
|
||||
}, {
|
||||
.name = "rb750:green:port4",
|
||||
.mask = RB750_LED_PORT2,
|
||||
.active_low = 1,
|
||||
}, {
|
||||
.name = "rb750:green:port5",
|
||||
.mask = RB750_LED_PORT1,
|
||||
.active_low = 1,
|
||||
}
|
||||
};
|
||||
|
||||
static struct rb750_led_platform_data rb750_leds_data = {
|
||||
.num_leds = ARRAY_SIZE(rb750_leds),
|
||||
.leds = rb750_leds,
|
||||
};
|
||||
|
||||
static struct platform_device rb750_leds_device = {
|
||||
.name = "leds-rb750",
|
||||
.dev = {
|
||||
.platform_data = &rb750_leds_data,
|
||||
}
|
||||
};
|
||||
|
||||
static const char *rb750_port_names[AP91_ETH_NUM_PORT_NAMES] __initdata = {
|
||||
"port5",
|
||||
"port4",
|
||||
"port3",
|
||||
"port2",
|
||||
};
|
||||
|
||||
static struct platform_device rb750_nand_device = {
|
||||
.name = "rb750-nand",
|
||||
.id = -1,
|
||||
};
|
||||
|
||||
int rb750_latch_change(u32 mask_clr, u32 mask_set)
|
||||
{
|
||||
static DEFINE_SPINLOCK(lock);
|
||||
static u32 latch_set = RB750_LED_BITS | RB750_LVC573_LE;
|
||||
static u32 latch_oe;
|
||||
static u32 latch_clr;
|
||||
unsigned long flags;
|
||||
u32 t;
|
||||
int ret = 0;
|
||||
|
||||
spin_lock_irqsave(&lock, flags);
|
||||
|
||||
if ((mask_clr & BIT(31)) != 0 &&
|
||||
(latch_set & RB750_LVC573_LE) == 0) {
|
||||
goto unlock;
|
||||
}
|
||||
|
||||
latch_set = (latch_set | mask_set) & ~mask_clr;
|
||||
latch_clr = (latch_clr | mask_clr) & ~mask_set;
|
||||
|
||||
if (latch_oe == 0)
|
||||
latch_oe = __raw_readl(ar71xx_gpio_base + GPIO_REG_OE);
|
||||
|
||||
if (likely(latch_set & RB750_LVC573_LE)) {
|
||||
void __iomem *base = ar71xx_gpio_base;
|
||||
|
||||
t = __raw_readl(base + GPIO_REG_OE);
|
||||
t |= mask_clr | latch_oe | mask_set;
|
||||
|
||||
__raw_writel(t, base + GPIO_REG_OE);
|
||||
__raw_writel(latch_clr, base + GPIO_REG_CLEAR);
|
||||
__raw_writel(latch_set, base + GPIO_REG_SET);
|
||||
} else if (mask_clr & RB750_LVC573_LE) {
|
||||
void __iomem *base = ar71xx_gpio_base;
|
||||
|
||||
latch_oe = __raw_readl(base + GPIO_REG_OE);
|
||||
__raw_writel(RB750_LVC573_LE, base + GPIO_REG_CLEAR);
|
||||
/* flush write */
|
||||
__raw_readl(base + GPIO_REG_CLEAR);
|
||||
}
|
||||
|
||||
ret = 1;
|
||||
|
||||
unlock:
|
||||
spin_unlock_irqrestore(&lock, flags);
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(rb750_latch_change);
|
||||
|
||||
static void __init rb750_setup(void)
|
||||
{
|
||||
ar71xx_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
|
||||
AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
|
||||
AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
|
||||
AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
|
||||
AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN);
|
||||
|
||||
ap91_eth_init(NULL, rb750_port_names);
|
||||
platform_device_register(&rb750_leds_device);
|
||||
platform_device_register(&rb750_nand_device);
|
||||
}
|
||||
|
||||
MIPS_MACHINE(AR71XX_MACH_RB_750, "750i", "MikroTik RouterBOARD 750",
|
||||
rb750_setup);
|
||||
@@ -108,7 +108,7 @@ static void __init tl_wr741nd_setup(void)
|
||||
ARRAY_SIZE(tl_wr741nd_gpio_buttons),
|
||||
tl_wr741nd_gpio_buttons);
|
||||
|
||||
ap91_eth_init(mac);
|
||||
ap91_eth_init(mac, NULL);
|
||||
ap91_pci_init(ee, mac);
|
||||
}
|
||||
MIPS_MACHINE(AR71XX_MACH_TL_WR741ND, "TL-WR741ND", "TP-LINK TL-WR741ND",
|
||||
|
||||
@@ -29,6 +29,7 @@ enum ar71xx_mach_type {
|
||||
AR71XX_MACH_RB_450, /* MikroTik RouterBOARD 450 */
|
||||
AR71XX_MACH_RB_450G, /* MikroTik RouterBOARD 450G */
|
||||
AR71XX_MACH_RB_493, /* Mikrotik RouterBOARD 493/493AH */
|
||||
AR71XX_MACH_RB_750, /* MikroTik RouterBOARD 750 */
|
||||
AR71XX_MACH_PB42, /* Atheros PB42 */
|
||||
AR71XX_MACH_PB44, /* Atheros PB44 */
|
||||
AR71XX_MACH_MZK_W04NU, /* Planex MZK-W04NU */
|
||||
|
||||
@@ -36,7 +36,7 @@ static inline int is_valid_ram_addr(void *addr)
|
||||
static void __init ar71xx_prom_append_cmdline(const char *name,
|
||||
const char *value)
|
||||
{
|
||||
char buf[CL_SIZE];
|
||||
char buf[COMMAND_LINE_SIZE];
|
||||
|
||||
snprintf(buf, sizeof(buf), " %s=%s", name, value);
|
||||
strlcat(arcs_cmdline, buf, sizeof(arcs_cmdline));
|
||||
|
||||
@@ -269,6 +269,7 @@ static inline u32 ar71xx_gpio_rr(unsigned reg)
|
||||
void ar71xx_gpio_init(void) __init;
|
||||
void ar71xx_gpio_function_enable(u32 mask);
|
||||
void ar71xx_gpio_function_disable(u32 mask);
|
||||
void ar71xx_gpio_function_setup(u32 set, u32 clear);
|
||||
|
||||
/*
|
||||
* DDR_CTRL block
|
||||
|
||||
@@ -0,0 +1,66 @@
|
||||
/*
|
||||
* MikroTik RouterBOARD 750 definitions
|
||||
*
|
||||
* Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License version 2 as published
|
||||
* by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef _MACH_RB750_H
|
||||
#define _MACH_RB750_H
|
||||
|
||||
#include <linux/bitops.h>
|
||||
|
||||
#define RB750_GPIO_LVC573_LE 0 /* Latch enable on LVC573 */
|
||||
#define RB750_GPIO_NAND_IO0 1 /* NAND I/O 0 */
|
||||
#define RB750_GPIO_NAND_IO1 2 /* NAND I/O 1 */
|
||||
#define RB750_GPIO_NAND_IO2 3 /* NAND I/O 2 */
|
||||
#define RB750_GPIO_NAND_IO3 4 /* NAND I/O 3 */
|
||||
#define RB750_GPIO_NAND_IO4 5 /* NAND I/O 4 */
|
||||
#define RB750_GPIO_NAND_IO5 6 /* NAND I/O 5 */
|
||||
#define RB750_GPIO_NAND_IO6 7 /* NAND I/O 6 */
|
||||
#define RB750_GPIO_NAND_IO7 8 /* NAND I/O 7 */
|
||||
#define RB750_GPIO_NAND_NCE 11 /* NAND Chip Enable (active low) */
|
||||
#define RB750_GPIO_NAND_RDY 12 /* NAND Ready */
|
||||
#define RB750_GPIO_NAND_CLE 14 /* NAND Command Latch Enable */
|
||||
#define RB750_GPIO_NAND_ALE 15 /* NAND Address Latch Enable */
|
||||
#define RB750_GPIO_NAND_NRE 16 /* NAND Read Enable (active low) */
|
||||
#define RB750_GPIO_NAND_NWE 17 /* NAND Write Enable (active low) */
|
||||
|
||||
#define RB750_GPIO_BTN_RESET 1
|
||||
#define RB750_GPIO_SPI_CS0 2
|
||||
#define RB750_GPIO_LED_ACT 12
|
||||
#define RB750_GPIO_LED_PORT1 13
|
||||
#define RB750_GPIO_LED_PORT2 14
|
||||
#define RB750_GPIO_LED_PORT3 15
|
||||
#define RB750_GPIO_LED_PORT4 16
|
||||
#define RB750_GPIO_LED_PORT5 17
|
||||
|
||||
#define RB750_LED_ACT BIT(RB750_GPIO_LED_ACT)
|
||||
#define RB750_LED_PORT1 BIT(RB750_GPIO_LED_PORT1)
|
||||
#define RB750_LED_PORT2 BIT(RB750_GPIO_LED_PORT2)
|
||||
#define RB750_LED_PORT3 BIT(RB750_GPIO_LED_PORT3)
|
||||
#define RB750_LED_PORT4 BIT(RB750_GPIO_LED_PORT4)
|
||||
#define RB750_LED_PORT5 BIT(RB750_GPIO_LED_PORT5)
|
||||
|
||||
#define RB750_LVC573_LE BIT(RB750_GPIO_LVC573_LE)
|
||||
|
||||
#define RB750_LED_BITS (RB750_LED_PORT1 | RB750_LED_PORT2 | RB750_LED_PORT3 | \
|
||||
RB750_LED_PORT4 | RB750_LED_PORT5 | RB750_LED_ACT)
|
||||
|
||||
struct rb750_led_data {
|
||||
char *name;
|
||||
char *default_trigger;
|
||||
u32 mask;
|
||||
int active_low;
|
||||
};
|
||||
|
||||
struct rb750_led_platform_data {
|
||||
int num_leds;
|
||||
struct rb750_led_data *leds;
|
||||
};
|
||||
|
||||
int rb750_latch_change(u32 mask_clr, u32 mask_set);
|
||||
|
||||
#endif /* _MACH_RB750_H */
|
||||
@@ -0,0 +1,140 @@
|
||||
/*
|
||||
* LED driver for the RouterBOARD 750
|
||||
*
|
||||
* Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
*/
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/leds.h>
|
||||
|
||||
#include <asm/mach-ar71xx/mach-rb750.h>
|
||||
|
||||
#define DRV_NAME "leds-rb750"
|
||||
|
||||
struct rb750_led_dev {
|
||||
struct led_classdev cdev;
|
||||
u32 mask;
|
||||
int active_low;
|
||||
};
|
||||
|
||||
struct rb750_led_drvdata {
|
||||
struct rb750_led_dev *led_devs;
|
||||
int num_leds;
|
||||
};
|
||||
|
||||
static inline struct rb750_led_dev *to_rbled(struct led_classdev *led_cdev)
|
||||
{
|
||||
return (struct rb750_led_dev *)container_of(led_cdev,
|
||||
struct rb750_led_dev, cdev);
|
||||
}
|
||||
|
||||
static void rb750_led_brightness_set(struct led_classdev *led_cdev,
|
||||
enum led_brightness value)
|
||||
{
|
||||
struct rb750_led_dev *rbled = to_rbled(led_cdev);
|
||||
int level;
|
||||
|
||||
level = (value == LED_OFF) ? 0 : 1;
|
||||
level ^= rbled->active_low;
|
||||
|
||||
if (level)
|
||||
rb750_latch_change(0, rbled->mask);
|
||||
else
|
||||
rb750_latch_change(rbled->mask, 0);
|
||||
}
|
||||
|
||||
static int __devinit rb750_led_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct rb750_led_platform_data *pdata;
|
||||
struct rb750_led_drvdata *drvdata;
|
||||
int ret = 0;
|
||||
int i;
|
||||
|
||||
pdata = pdev->dev.platform_data;
|
||||
if (!pdata)
|
||||
return -EINVAL;
|
||||
|
||||
drvdata = kzalloc(sizeof(struct rb750_led_drvdata) +
|
||||
sizeof(struct rb750_led_dev) * pdata->num_leds,
|
||||
GFP_KERNEL);
|
||||
if (!drvdata)
|
||||
return -ENOMEM;
|
||||
|
||||
drvdata->num_leds = pdata->num_leds;
|
||||
drvdata->led_devs = (struct rb750_led_dev *) &drvdata[1];
|
||||
|
||||
for (i = 0; i < drvdata->num_leds; i++) {
|
||||
struct rb750_led_dev *rbled = &drvdata->led_devs[i];
|
||||
struct rb750_led_data *led_data = &pdata->leds[i];
|
||||
|
||||
rbled->cdev.name = led_data->name;
|
||||
rbled->cdev.default_trigger = led_data->default_trigger;
|
||||
rbled->cdev.brightness_set = rb750_led_brightness_set;
|
||||
rbled->cdev.brightness = LED_OFF;
|
||||
|
||||
rbled->mask = led_data->mask;
|
||||
rbled->active_low = !!led_data->active_low;
|
||||
|
||||
ret = led_classdev_register(&pdev->dev, &rbled->cdev);
|
||||
if (ret)
|
||||
goto err;
|
||||
}
|
||||
|
||||
platform_set_drvdata(pdev, drvdata);
|
||||
return 0;
|
||||
|
||||
err:
|
||||
for (i = i - 1; i >= 0; i--)
|
||||
led_classdev_unregister(&drvdata->led_devs[i].cdev);
|
||||
|
||||
kfree(drvdata);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int __devexit rb750_led_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct rb750_led_drvdata *drvdata;
|
||||
int i;
|
||||
|
||||
drvdata = platform_get_drvdata(pdev);
|
||||
for (i = 0; i < drvdata->num_leds; i++)
|
||||
led_classdev_unregister(&drvdata->led_devs[i].cdev);
|
||||
|
||||
kfree(drvdata);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver rb750_led_driver = {
|
||||
.probe = rb750_led_probe,
|
||||
.remove = __devexit_p(rb750_led_remove),
|
||||
.driver = {
|
||||
.name = DRV_NAME,
|
||||
.owner = THIS_MODULE,
|
||||
},
|
||||
};
|
||||
|
||||
MODULE_ALIAS("platform:leds-rb750");
|
||||
|
||||
static int __init rb750_led_init(void)
|
||||
{
|
||||
return platform_driver_register(&rb750_led_driver);
|
||||
}
|
||||
|
||||
static void __exit rb750_led_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&rb750_led_driver);
|
||||
}
|
||||
|
||||
module_init(rb750_led_init);
|
||||
module_exit(rb750_led_exit);
|
||||
|
||||
MODULE_DESCRIPTION(DRV_NAME);
|
||||
MODULE_DESCRIPTION("LED driver for the RouterBOARD 750");
|
||||
MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
@@ -0,0 +1,360 @@
|
||||
/*
|
||||
* NAND flash driver for the MikroTik RouterBOARD 750
|
||||
*
|
||||
* Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License version 2 as published
|
||||
* by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/mtd/nand.h>
|
||||
#include <linux/mtd/mtd.h>
|
||||
#include <linux/mtd/partitions.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
#include <asm/mach-ar71xx/ar71xx.h>
|
||||
#include <asm/mach-ar71xx/mach-rb750.h>
|
||||
|
||||
#define DRV_NAME "rb750-nand"
|
||||
#define DRV_VERSION "0.1.0"
|
||||
#define DRV_DESC "NAND flash driver for the RouterBOARD 750"
|
||||
|
||||
#define RB750_NAND_IO0 BIT(RB750_GPIO_NAND_IO0)
|
||||
#define RB750_NAND_ALE BIT(RB750_GPIO_NAND_ALE)
|
||||
#define RB750_NAND_CLE BIT(RB750_GPIO_NAND_CLE)
|
||||
#define RB750_NAND_NRE BIT(RB750_GPIO_NAND_NRE)
|
||||
#define RB750_NAND_NWE BIT(RB750_GPIO_NAND_NWE)
|
||||
#define RB750_NAND_RDY BIT(RB750_GPIO_NAND_RDY)
|
||||
#define RB750_NAND_NCE BIT(RB750_GPIO_NAND_NCE)
|
||||
|
||||
#define RB750_NAND_DATA_SHIFT 1
|
||||
#define RB750_NAND_DATA_BITS (0xff << RB750_NAND_DATA_SHIFT)
|
||||
#define RB750_NAND_INPUT_BITS (RB750_NAND_DATA_BITS | RB750_NAND_RDY)
|
||||
#define RB750_NAND_OUTPUT_BITS (RB750_NAND_ALE | RB750_NAND_CLE | \
|
||||
RB750_NAND_NRE | RB750_NAND_NWE | \
|
||||
RB750_NAND_NCE)
|
||||
|
||||
struct rb750_nand_info {
|
||||
struct nand_chip chip;
|
||||
struct mtd_info mtd;
|
||||
};
|
||||
|
||||
/*
|
||||
* We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader
|
||||
* will not be able to find the kernel that we load.
|
||||
*/
|
||||
static struct nand_ecclayout rb750_nand_ecclayout = {
|
||||
.eccbytes = 6,
|
||||
.eccpos = { 8, 9, 10, 13, 14, 15 },
|
||||
.oobavail = 9,
|
||||
.oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
|
||||
};
|
||||
|
||||
static struct mtd_partition rb750_nand_partitions[] = {
|
||||
{
|
||||
.name = "booter",
|
||||
.offset = 0,
|
||||
.size = (256 * 1024),
|
||||
.mask_flags = MTD_WRITEABLE,
|
||||
}, {
|
||||
.name = "kernel",
|
||||
.offset = (256 * 1024),
|
||||
.size = (4 * 1024 * 1024) - (256 * 1024),
|
||||
}, {
|
||||
.name = "rootfs",
|
||||
.offset = MTDPART_OFS_NXTBLK,
|
||||
.size = MTDPART_SIZ_FULL,
|
||||
},
|
||||
};
|
||||
|
||||
static void rb750_nand_write(const u8 *buf, unsigned len)
|
||||
{
|
||||
void __iomem *base = ar71xx_gpio_base;
|
||||
u32 out;
|
||||
unsigned i;
|
||||
|
||||
/* set data lines to output mode */
|
||||
__raw_writel(__raw_readl(base + GPIO_REG_OE) | RB750_NAND_DATA_BITS,
|
||||
base + GPIO_REG_OE);
|
||||
|
||||
out = __raw_readl(base + GPIO_REG_OUT);
|
||||
out &= ~(RB750_NAND_DATA_BITS | RB750_NAND_NWE);
|
||||
for (i = 0; i != len; i++) {
|
||||
u32 data;
|
||||
|
||||
data = buf[i];
|
||||
data <<= RB750_NAND_DATA_SHIFT;
|
||||
data |= out;
|
||||
__raw_writel(data, base + GPIO_REG_OUT);
|
||||
|
||||
__raw_writel(data | RB750_NAND_NWE, base + GPIO_REG_OUT);
|
||||
/* flush write */
|
||||
__raw_readl(base + GPIO_REG_OUT);
|
||||
}
|
||||
|
||||
/* set data lines to input mode */
|
||||
__raw_writel(__raw_readl(base + GPIO_REG_OE) & ~RB750_NAND_DATA_BITS,
|
||||
base + GPIO_REG_OE);
|
||||
/* flush write */
|
||||
__raw_readl(base + GPIO_REG_OE);
|
||||
}
|
||||
|
||||
static int rb750_nand_read_verify(u8 *read_buf, unsigned len,
|
||||
const u8 *verify_buf)
|
||||
{
|
||||
void __iomem *base = ar71xx_gpio_base;
|
||||
unsigned i;
|
||||
|
||||
for (i = 0; i < len; i++) {
|
||||
u8 data;
|
||||
|
||||
/* activate RE line */
|
||||
__raw_writel(RB750_NAND_NRE, base + GPIO_REG_CLEAR);
|
||||
/* flush write */
|
||||
__raw_readl(base + GPIO_REG_CLEAR);
|
||||
|
||||
/* read input lines */
|
||||
data = __raw_readl(base + GPIO_REG_IN) >> RB750_NAND_DATA_SHIFT;
|
||||
|
||||
/* deactivate RE line */
|
||||
__raw_writel(RB750_NAND_NRE, base + GPIO_REG_SET);
|
||||
|
||||
if (read_buf)
|
||||
read_buf[i] = data;
|
||||
else if (verify_buf && verify_buf[i] != data)
|
||||
return -EFAULT;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void rb750_nand_select_chip(struct mtd_info *mtd, int chip)
|
||||
{
|
||||
void __iomem *base = ar71xx_gpio_base;
|
||||
u32 func;
|
||||
|
||||
func = __raw_readl(base + GPIO_REG_FUNC);
|
||||
if (chip >= 0) {
|
||||
/* disable latch */
|
||||
rb750_latch_change(RB750_LVC573_LE, 0);
|
||||
|
||||
/* disable alternate functions */
|
||||
ar71xx_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE,
|
||||
AR724X_GPIO_FUNC_SPI_EN);
|
||||
|
||||
/* set input mode for data lines */
|
||||
__raw_writel(__raw_readl(base + GPIO_REG_OE) &
|
||||
~RB750_NAND_INPUT_BITS,
|
||||
base + GPIO_REG_OE);
|
||||
|
||||
/* deactivate RE and WE lines */
|
||||
__raw_writel(RB750_NAND_NRE | RB750_NAND_NWE,
|
||||
base + GPIO_REG_SET);
|
||||
/* flush write */
|
||||
(void) __raw_readl(base + GPIO_REG_SET);
|
||||
|
||||
/* activate CE line */
|
||||
__raw_writel(RB750_NAND_NCE, base + GPIO_REG_CLEAR);
|
||||
} else {
|
||||
/* deactivate CE line */
|
||||
__raw_writel(RB750_NAND_NCE, base + GPIO_REG_SET);
|
||||
/* flush write */
|
||||
(void) __raw_readl(base + GPIO_REG_SET);
|
||||
|
||||
__raw_writel(__raw_readl(base + GPIO_REG_OE) |
|
||||
RB750_NAND_IO0 | RB750_NAND_RDY,
|
||||
base + GPIO_REG_OE);
|
||||
|
||||
/* restore alternate functions */
|
||||
ar71xx_gpio_function_setup(AR724X_GPIO_FUNC_SPI_EN,
|
||||
AR724X_GPIO_FUNC_JTAG_DISABLE);
|
||||
|
||||
/* enable latch */
|
||||
rb750_latch_change(0, RB750_LVC573_LE);
|
||||
}
|
||||
}
|
||||
|
||||
static int rb750_nand_dev_ready(struct mtd_info *mtd)
|
||||
{
|
||||
void __iomem *base = ar71xx_gpio_base;
|
||||
|
||||
return !!(__raw_readl(base + GPIO_REG_IN) & RB750_NAND_RDY);
|
||||
}
|
||||
|
||||
static void rb750_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
|
||||
unsigned int ctrl)
|
||||
{
|
||||
if (ctrl & NAND_CTRL_CHANGE) {
|
||||
void __iomem *base = ar71xx_gpio_base;
|
||||
u32 t;
|
||||
|
||||
t = __raw_readl(base + GPIO_REG_OUT);
|
||||
|
||||
t &= ~(RB750_NAND_CLE | RB750_NAND_ALE);
|
||||
t |= (ctrl & NAND_CLE) ? RB750_NAND_CLE : 0;
|
||||
t |= (ctrl & NAND_ALE) ? RB750_NAND_ALE : 0;
|
||||
|
||||
__raw_writel(t, base + GPIO_REG_OUT);
|
||||
/* flush write */
|
||||
__raw_readl(base + GPIO_REG_OUT);
|
||||
}
|
||||
|
||||
if (cmd != NAND_CMD_NONE) {
|
||||
u8 t = cmd;
|
||||
rb750_nand_write(&t, 1);
|
||||
}
|
||||
}
|
||||
|
||||
static u8 rb750_nand_read_byte(struct mtd_info *mtd)
|
||||
{
|
||||
u8 data = 0;
|
||||
rb750_nand_read_verify(&data, 1, NULL);
|
||||
return data;
|
||||
}
|
||||
|
||||
static void rb750_nand_read_buf(struct mtd_info *mtd, u8 *buf, int len)
|
||||
{
|
||||
rb750_nand_read_verify(buf, len, NULL);
|
||||
}
|
||||
|
||||
static void rb750_nand_write_buf(struct mtd_info *mtd, const u8 *buf, int len)
|
||||
{
|
||||
rb750_nand_write(buf, len);
|
||||
}
|
||||
|
||||
static int rb750_nand_verify_buf(struct mtd_info *mtd, const u8 *buf, int len)
|
||||
{
|
||||
return rb750_nand_read_verify(NULL, len, buf);
|
||||
}
|
||||
|
||||
static void __init rb750_nand_gpio_init(void)
|
||||
{
|
||||
void __iomem *base = ar71xx_gpio_base;
|
||||
u32 out;
|
||||
|
||||
out = __raw_readl(base + GPIO_REG_OUT);
|
||||
|
||||
/* setup output levels */
|
||||
__raw_writel(RB750_NAND_NCE | RB750_NAND_NRE | RB750_NAND_NWE,
|
||||
base + GPIO_REG_SET);
|
||||
|
||||
__raw_writel(RB750_NAND_ALE | RB750_NAND_CLE,
|
||||
base + GPIO_REG_CLEAR);
|
||||
|
||||
/* setup input lines */
|
||||
__raw_writel(__raw_readl(base + GPIO_REG_OE) & ~(RB750_NAND_INPUT_BITS),
|
||||
base + GPIO_REG_OE);
|
||||
|
||||
/* setup output lines */
|
||||
__raw_writel(__raw_readl(base + GPIO_REG_OE) | RB750_NAND_OUTPUT_BITS,
|
||||
base + GPIO_REG_OE);
|
||||
|
||||
rb750_latch_change(~out & RB750_NAND_IO0, out & RB750_NAND_IO0);
|
||||
}
|
||||
|
||||
static int __init rb750_nand_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct rb750_nand_info *info;
|
||||
int ret;
|
||||
|
||||
printk(KERN_INFO DRV_DESC " version " DRV_VERSION "\n");
|
||||
|
||||
rb750_nand_gpio_init();
|
||||
|
||||
info = kzalloc(sizeof(*info), GFP_KERNEL);
|
||||
if (!info)
|
||||
return -ENOMEM;
|
||||
|
||||
info->chip.priv = &info;
|
||||
info->mtd.priv = &info->chip;
|
||||
info->mtd.owner = THIS_MODULE;
|
||||
|
||||
info->chip.select_chip = rb750_nand_select_chip;
|
||||
info->chip.cmd_ctrl = rb750_nand_cmd_ctrl;
|
||||
info->chip.dev_ready = rb750_nand_dev_ready;
|
||||
info->chip.read_byte = rb750_nand_read_byte;
|
||||
info->chip.write_buf = rb750_nand_write_buf;
|
||||
info->chip.read_buf = rb750_nand_read_buf;
|
||||
info->chip.verify_buf = rb750_nand_verify_buf;
|
||||
|
||||
info->chip.chip_delay = 25;
|
||||
info->chip.ecc.mode = NAND_ECC_SOFT;
|
||||
info->chip.options |= NAND_NO_AUTOINCR;
|
||||
|
||||
platform_set_drvdata(pdev, info);
|
||||
|
||||
ret = nand_scan_ident(&info->mtd, 1);
|
||||
if (ret) {
|
||||
ret = -ENXIO;
|
||||
goto err_free_info;
|
||||
}
|
||||
|
||||
if (info->mtd.writesize == 512)
|
||||
info->chip.ecc.layout = &rb750_nand_ecclayout;
|
||||
|
||||
ret = nand_scan_tail(&info->mtd);
|
||||
if (ret) {
|
||||
return -ENXIO;
|
||||
goto err_set_drvdata;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_MTD_PARTITIONS
|
||||
ret = add_mtd_partitions(&info->mtd, rb750_nand_partitions,
|
||||
ARRAY_SIZE(rb750_nand_partitions));
|
||||
#else
|
||||
ret = add_mtd_device(&info->mtd);
|
||||
#endif
|
||||
if (ret)
|
||||
goto err_release_nand;
|
||||
|
||||
return 0;
|
||||
|
||||
err_release_nand:
|
||||
nand_release(&info->mtd);
|
||||
err_set_drvdata:
|
||||
platform_set_drvdata(pdev, NULL);
|
||||
err_free_info:
|
||||
kfree(info);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int __devexit rb750_nand_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct rb750_nand_info *info = platform_get_drvdata(pdev);
|
||||
|
||||
nand_release(&info->mtd);
|
||||
platform_set_drvdata(pdev, NULL);
|
||||
kfree(info);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver rb750_nand_driver = {
|
||||
.probe = rb750_nand_probe,
|
||||
.remove = __devexit_p(rb750_nand_remove),
|
||||
.driver = {
|
||||
.name = DRV_NAME,
|
||||
.owner = THIS_MODULE,
|
||||
},
|
||||
};
|
||||
|
||||
static int __init rb750_nand_init(void)
|
||||
{
|
||||
return platform_driver_register(&rb750_nand_driver);
|
||||
}
|
||||
|
||||
static void __exit rb750_nand_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&rb750_nand_driver);
|
||||
}
|
||||
|
||||
module_init(rb750_nand_init);
|
||||
module_exit(rb750_nand_exit);
|
||||
|
||||
MODULE_DESCRIPTION(DRV_DESC);
|
||||
MODULE_VERSION(DRV_VERSION);
|
||||
MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
@@ -38,7 +38,7 @@
|
||||
#define ETH_FCS_LEN 4
|
||||
|
||||
#define AG71XX_DRV_NAME "ag71xx"
|
||||
#define AG71XX_DRV_VERSION "0.5.25"
|
||||
#define AG71XX_DRV_VERSION "0.5.32"
|
||||
|
||||
#define AG71XX_NAPI_WEIGHT 64
|
||||
#define AG71XX_OOM_REFILL (1 + HZ/10)
|
||||
@@ -88,8 +88,10 @@ struct ag71xx_desc {
|
||||
} __attribute__((aligned(4)));
|
||||
|
||||
struct ag71xx_buf {
|
||||
struct sk_buff *skb;
|
||||
struct ag71xx_desc *desc;
|
||||
struct sk_buff *skb;
|
||||
struct ag71xx_desc *desc;
|
||||
dma_addr_t dma_addr;
|
||||
u32 pad;
|
||||
};
|
||||
|
||||
struct ag71xx_ring {
|
||||
@@ -170,6 +172,7 @@ struct ag71xx {
|
||||
};
|
||||
|
||||
extern struct ethtool_ops ag71xx_ethtool_ops;
|
||||
void ag71xx_link_adjust(struct ag71xx *ag);
|
||||
|
||||
int ag71xx_mdio_driver_init(void) __init;
|
||||
void ag71xx_mdio_driver_exit(void);
|
||||
@@ -343,76 +346,56 @@ static inline int ag71xx_desc_pktlen(struct ag71xx_desc *desc)
|
||||
#define MII_CTRL_SPEED_100 1
|
||||
#define MII_CTRL_SPEED_1000 2
|
||||
|
||||
static inline void ag71xx_wr(struct ag71xx *ag, unsigned reg, u32 value)
|
||||
static inline void ag71xx_check_reg_offset(struct ag71xx *ag, unsigned reg)
|
||||
{
|
||||
void __iomem *r;
|
||||
|
||||
switch (reg) {
|
||||
case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL:
|
||||
case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS:
|
||||
r = ag->mac_base + reg;
|
||||
__raw_writel(value, r);
|
||||
|
||||
/* flush write */
|
||||
(void) __raw_readl(r);
|
||||
break;
|
||||
|
||||
default:
|
||||
BUG();
|
||||
}
|
||||
}
|
||||
|
||||
static inline void ag71xx_wr(struct ag71xx *ag, unsigned reg, u32 value)
|
||||
{
|
||||
ag71xx_check_reg_offset(ag, reg);
|
||||
|
||||
__raw_writel(value, ag->mac_base + reg);
|
||||
/* flush write */
|
||||
(void) __raw_readl(ag->mac_base + reg);
|
||||
}
|
||||
|
||||
static inline u32 ag71xx_rr(struct ag71xx *ag, unsigned reg)
|
||||
{
|
||||
void __iomem *r;
|
||||
u32 ret;
|
||||
ag71xx_check_reg_offset(ag, reg);
|
||||
|
||||
switch (reg) {
|
||||
case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL:
|
||||
case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS:
|
||||
r = ag->mac_base + reg;
|
||||
ret = __raw_readl(r);
|
||||
break;
|
||||
default:
|
||||
BUG();
|
||||
}
|
||||
|
||||
return ret;
|
||||
return __raw_readl(ag->mac_base + reg);
|
||||
}
|
||||
|
||||
static inline void ag71xx_sb(struct ag71xx *ag, unsigned reg, u32 mask)
|
||||
{
|
||||
void __iomem *r;
|
||||
|
||||
switch (reg) {
|
||||
case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL:
|
||||
case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS:
|
||||
r = ag->mac_base + reg;
|
||||
__raw_writel(__raw_readl(r) | mask, r);
|
||||
ag71xx_check_reg_offset(ag, reg);
|
||||
|
||||
/* flush write */
|
||||
(void)__raw_readl(r);
|
||||
break;
|
||||
default:
|
||||
BUG();
|
||||
}
|
||||
r = ag->mac_base + reg;
|
||||
__raw_writel(__raw_readl(r) | mask, r);
|
||||
/* flush write */
|
||||
(void)__raw_readl(r);
|
||||
}
|
||||
|
||||
static inline void ag71xx_cb(struct ag71xx *ag, unsigned reg, u32 mask)
|
||||
{
|
||||
void __iomem *r;
|
||||
|
||||
switch (reg) {
|
||||
case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL:
|
||||
case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS:
|
||||
r = ag->mac_base + reg;
|
||||
__raw_writel(__raw_readl(r) & ~mask, r);
|
||||
ag71xx_check_reg_offset(ag, reg);
|
||||
|
||||
/* flush write */
|
||||
(void) __raw_readl(r);
|
||||
break;
|
||||
default:
|
||||
BUG();
|
||||
}
|
||||
r = ag->mac_base + reg;
|
||||
__raw_writel(__raw_readl(r) & ~mask, r);
|
||||
/* flush write */
|
||||
(void) __raw_readl(r);
|
||||
}
|
||||
|
||||
static inline void ag71xx_int_enable(struct ag71xx *ag, u32 ints)
|
||||
|
||||
@@ -11,7 +11,6 @@
|
||||
* by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/cache.h>
|
||||
#include "ag71xx.h"
|
||||
|
||||
#define AG71XX_DEFAULT_MSG_ENABLE \
|
||||
@@ -186,9 +185,11 @@ static void ag71xx_ring_rx_clean(struct ag71xx *ag)
|
||||
return;
|
||||
|
||||
for (i = 0; i < AG71XX_RX_RING_SIZE; i++)
|
||||
if (ring->buf[i].skb)
|
||||
if (ring->buf[i].skb) {
|
||||
dma_unmap_single(&ag->dev->dev, ring->buf[i].dma_addr,
|
||||
AG71XX_RX_PKT_SIZE, DMA_FROM_DEVICE);
|
||||
kfree_skb(ring->buf[i].skb);
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
static int ag71xx_ring_rx_init(struct ag71xx *ag)
|
||||
@@ -209,21 +210,23 @@ static int ag71xx_ring_rx_init(struct ag71xx *ag)
|
||||
|
||||
for (i = 0; i < AG71XX_RX_RING_SIZE; i++) {
|
||||
struct sk_buff *skb;
|
||||
dma_addr_t dma_addr;
|
||||
|
||||
skb = dev_alloc_skb(AG71XX_RX_PKT_SIZE);
|
||||
skb = dev_alloc_skb(AG71XX_RX_PKT_SIZE + AG71XX_RX_PKT_RESERVE);
|
||||
if (!skb) {
|
||||
ret = -ENOMEM;
|
||||
break;
|
||||
}
|
||||
|
||||
dma_map_single(NULL, skb->data, AG71XX_RX_PKT_SIZE,
|
||||
DMA_FROM_DEVICE);
|
||||
|
||||
skb->dev = ag->dev;
|
||||
skb_reserve(skb, AG71XX_RX_PKT_RESERVE);
|
||||
|
||||
dma_addr = dma_map_single(&ag->dev->dev, skb->data,
|
||||
AG71XX_RX_PKT_SIZE,
|
||||
DMA_FROM_DEVICE);
|
||||
ring->buf[i].skb = skb;
|
||||
ring->buf[i].desc->data = virt_to_phys(skb->data);
|
||||
ring->buf[i].dma_addr = dma_addr;
|
||||
ring->buf[i].desc->data = (u32) dma_addr;
|
||||
ring->buf[i].desc->ctrl = DESC_EMPTY;
|
||||
}
|
||||
|
||||
@@ -248,20 +251,24 @@ static int ag71xx_ring_rx_refill(struct ag71xx *ag)
|
||||
i = ring->dirty % AG71XX_RX_RING_SIZE;
|
||||
|
||||
if (ring->buf[i].skb == NULL) {
|
||||
dma_addr_t dma_addr;
|
||||
struct sk_buff *skb;
|
||||
|
||||
skb = dev_alloc_skb(AG71XX_RX_PKT_SIZE);
|
||||
skb = dev_alloc_skb(AG71XX_RX_PKT_SIZE +
|
||||
AG71XX_RX_PKT_RESERVE);
|
||||
if (skb == NULL)
|
||||
break;
|
||||
|
||||
dma_map_single(NULL, skb->data, AG71XX_RX_PKT_SIZE,
|
||||
DMA_FROM_DEVICE);
|
||||
|
||||
skb_reserve(skb, AG71XX_RX_PKT_RESERVE);
|
||||
skb->dev = ag->dev;
|
||||
|
||||
dma_addr = dma_map_single(&ag->dev->dev, skb->data,
|
||||
AG71XX_RX_PKT_SIZE,
|
||||
DMA_FROM_DEVICE);
|
||||
|
||||
ring->buf[i].skb = skb;
|
||||
ring->buf[i].desc->data = virt_to_phys(skb->data);
|
||||
ring->buf[i].dma_addr = dma_addr;
|
||||
ring->buf[i].desc->data = (u32) dma_addr;
|
||||
}
|
||||
|
||||
ring->buf[i].desc->ctrl = DESC_EMPTY;
|
||||
@@ -303,16 +310,117 @@ static void ag71xx_rings_cleanup(struct ag71xx *ag)
|
||||
ag71xx_ring_free(&ag->tx_ring);
|
||||
}
|
||||
|
||||
static unsigned char *ag71xx_speed_str(struct ag71xx *ag)
|
||||
{
|
||||
switch (ag->speed) {
|
||||
case SPEED_1000:
|
||||
return "1000";
|
||||
case SPEED_100:
|
||||
return "100";
|
||||
case SPEED_10:
|
||||
return "10";
|
||||
}
|
||||
|
||||
return "?";
|
||||
}
|
||||
|
||||
void ag71xx_link_adjust(struct ag71xx *ag)
|
||||
{
|
||||
struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
|
||||
u32 cfg2;
|
||||
u32 ifctl;
|
||||
u32 fifo5;
|
||||
u32 mii_speed;
|
||||
|
||||
if (!ag->link) {
|
||||
netif_carrier_off(ag->dev);
|
||||
if (netif_msg_link(ag))
|
||||
printk(KERN_INFO "%s: link down\n", ag->dev->name);
|
||||
return;
|
||||
}
|
||||
|
||||
cfg2 = ag71xx_rr(ag, AG71XX_REG_MAC_CFG2);
|
||||
cfg2 &= ~(MAC_CFG2_IF_1000 | MAC_CFG2_IF_10_100 | MAC_CFG2_FDX);
|
||||
cfg2 |= (ag->duplex) ? MAC_CFG2_FDX : 0;
|
||||
|
||||
ifctl = ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL);
|
||||
ifctl &= ~(MAC_IFCTL_SPEED);
|
||||
|
||||
fifo5 = ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5);
|
||||
fifo5 &= ~FIFO_CFG5_BM;
|
||||
|
||||
switch (ag->speed) {
|
||||
case SPEED_1000:
|
||||
mii_speed = MII_CTRL_SPEED_1000;
|
||||
cfg2 |= MAC_CFG2_IF_1000;
|
||||
fifo5 |= FIFO_CFG5_BM;
|
||||
break;
|
||||
case SPEED_100:
|
||||
mii_speed = MII_CTRL_SPEED_100;
|
||||
cfg2 |= MAC_CFG2_IF_10_100;
|
||||
ifctl |= MAC_IFCTL_SPEED;
|
||||
break;
|
||||
case SPEED_10:
|
||||
mii_speed = MII_CTRL_SPEED_10;
|
||||
cfg2 |= MAC_CFG2_IF_10_100;
|
||||
break;
|
||||
default:
|
||||
BUG();
|
||||
return;
|
||||
}
|
||||
|
||||
if (pdata->is_ar91xx)
|
||||
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, 0x00780fff);
|
||||
else if (pdata->is_ar724x)
|
||||
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, pdata->fifo_cfg3);
|
||||
else
|
||||
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, 0x008001ff);
|
||||
|
||||
if (pdata->set_pll)
|
||||
pdata->set_pll(ag->speed);
|
||||
|
||||
ag71xx_mii_ctrl_set_speed(ag, mii_speed);
|
||||
|
||||
ag71xx_wr(ag, AG71XX_REG_MAC_CFG2, cfg2);
|
||||
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, fifo5);
|
||||
ag71xx_wr(ag, AG71XX_REG_MAC_IFCTL, ifctl);
|
||||
|
||||
netif_carrier_on(ag->dev);
|
||||
if (netif_msg_link(ag))
|
||||
printk(KERN_INFO "%s: link up (%sMbps/%s duplex)\n",
|
||||
ag->dev->name,
|
||||
ag71xx_speed_str(ag),
|
||||
(DUPLEX_FULL == ag->duplex) ? "Full" : "Half");
|
||||
|
||||
DBG("%s: fifo_cfg0=%#x, fifo_cfg1=%#x, fifo_cfg2=%#x\n",
|
||||
ag->dev->name,
|
||||
ag71xx_rr(ag, AG71XX_REG_FIFO_CFG0),
|
||||
ag71xx_rr(ag, AG71XX_REG_FIFO_CFG1),
|
||||
ag71xx_rr(ag, AG71XX_REG_FIFO_CFG2));
|
||||
|
||||
DBG("%s: fifo_cfg3=%#x, fifo_cfg4=%#x, fifo_cfg5=%#x\n",
|
||||
ag->dev->name,
|
||||
ag71xx_rr(ag, AG71XX_REG_FIFO_CFG3),
|
||||
ag71xx_rr(ag, AG71XX_REG_FIFO_CFG4),
|
||||
ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5));
|
||||
|
||||
DBG("%s: mac_cfg2=%#x, mac_ifctl=%#x, mii_ctrl=%#x\n",
|
||||
ag->dev->name,
|
||||
ag71xx_rr(ag, AG71XX_REG_MAC_CFG2),
|
||||
ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL),
|
||||
ag71xx_mii_ctrl_rr(ag));
|
||||
}
|
||||
|
||||
static void ag71xx_hw_set_macaddr(struct ag71xx *ag, unsigned char *mac)
|
||||
{
|
||||
u32 t;
|
||||
|
||||
t = (((u32) mac[0]) << 24) | (((u32) mac[1]) << 16)
|
||||
| (((u32) mac[2]) << 8) | ((u32) mac[3]);
|
||||
t = (((u32) mac[5]) << 24) | (((u32) mac[4]) << 16)
|
||||
| (((u32) mac[3]) << 8) | ((u32) mac[2]);
|
||||
|
||||
ag71xx_wr(ag, AG71XX_REG_MAC_ADDR1, t);
|
||||
|
||||
t = (((u32) mac[4]) << 24) | (((u32) mac[5]) << 16);
|
||||
t = (((u32) mac[1]) << 24) | (((u32) mac[0]) << 16);
|
||||
ag71xx_wr(ag, AG71XX_REG_MAC_ADDR2, t);
|
||||
}
|
||||
|
||||
@@ -472,15 +580,15 @@ static int ag71xx_stop(struct net_device *dev)
|
||||
struct ag71xx *ag = netdev_priv(dev);
|
||||
unsigned long flags;
|
||||
|
||||
netif_carrier_off(dev);
|
||||
ag71xx_phy_stop(ag);
|
||||
|
||||
spin_lock_irqsave(&ag->lock, flags);
|
||||
|
||||
netif_stop_queue(dev);
|
||||
|
||||
ag71xx_hw_stop(ag);
|
||||
|
||||
netif_carrier_off(dev);
|
||||
ag71xx_phy_stop(ag);
|
||||
|
||||
napi_disable(&ag->napi);
|
||||
del_timer_sync(&ag->oom_timer);
|
||||
|
||||
@@ -491,11 +599,13 @@ static int ag71xx_stop(struct net_device *dev)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ag71xx_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
|
||||
static netdev_tx_t ag71xx_hard_start_xmit(struct sk_buff *skb,
|
||||
struct net_device *dev)
|
||||
{
|
||||
struct ag71xx *ag = netdev_priv(dev);
|
||||
struct ag71xx_ring *ring = &ag->tx_ring;
|
||||
struct ag71xx_desc *desc;
|
||||
dma_addr_t dma_addr;
|
||||
int i;
|
||||
|
||||
i = ring->curr % AG71XX_TX_RING_SIZE;
|
||||
@@ -511,12 +621,13 @@ static int ag71xx_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
|
||||
goto err_drop;
|
||||
}
|
||||
|
||||
dma_map_single(NULL, skb->data, skb->len, DMA_TO_DEVICE);
|
||||
dma_addr = dma_map_single(&dev->dev, skb->data, skb->len,
|
||||
DMA_TO_DEVICE);
|
||||
|
||||
ring->buf[i].skb = skb;
|
||||
|
||||
/* setup descriptor fields */
|
||||
desc->data = virt_to_phys(skb->data);
|
||||
desc->data = (u32) dma_addr;
|
||||
desc->ctrl = (skb->len & DESC_PKTLEN_M);
|
||||
|
||||
/* flush descriptor */
|
||||
@@ -533,15 +644,13 @@ static int ag71xx_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
|
||||
/* enable TX engine */
|
||||
ag71xx_wr(ag, AG71XX_REG_TX_CTRL, TX_CTRL_TXE);
|
||||
|
||||
dev->trans_start = jiffies;
|
||||
|
||||
return 0;
|
||||
return NETDEV_TX_OK;
|
||||
|
||||
err_drop:
|
||||
dev->stats.tx_dropped++;
|
||||
|
||||
dev_kfree_skb(skb);
|
||||
return 0;
|
||||
return NETDEV_TX_OK;
|
||||
}
|
||||
|
||||
static int ag71xx_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
|
||||
@@ -678,6 +787,9 @@ static int ag71xx_rx_packets(struct ag71xx *ag, int limit)
|
||||
pktlen = ag71xx_desc_pktlen(desc);
|
||||
pktlen -= ETH_FCS_LEN;
|
||||
|
||||
dma_unmap_single(&dev->dev, ring->buf[i].dma_addr,
|
||||
AG71XX_RX_PKT_SIZE, DMA_FROM_DEVICE);
|
||||
|
||||
skb_put(skb, pktlen);
|
||||
|
||||
skb->dev = dev;
|
||||
|
||||
@@ -13,107 +13,6 @@
|
||||
|
||||
#include "ag71xx.h"
|
||||
|
||||
static unsigned char *ag71xx_speed_str(struct ag71xx *ag)
|
||||
{
|
||||
switch (ag->speed) {
|
||||
case SPEED_1000:
|
||||
return "1000";
|
||||
case SPEED_100:
|
||||
return "100";
|
||||
case SPEED_10:
|
||||
return "10";
|
||||
}
|
||||
|
||||
return "?";
|
||||
}
|
||||
|
||||
static void ag71xx_phy_link_update(struct ag71xx *ag)
|
||||
{
|
||||
struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
|
||||
u32 cfg2;
|
||||
u32 ifctl;
|
||||
u32 fifo5;
|
||||
u32 mii_speed;
|
||||
|
||||
if (!ag->link) {
|
||||
netif_carrier_off(ag->dev);
|
||||
if (netif_msg_link(ag))
|
||||
printk(KERN_INFO "%s: link down\n", ag->dev->name);
|
||||
return;
|
||||
}
|
||||
|
||||
cfg2 = ag71xx_rr(ag, AG71XX_REG_MAC_CFG2);
|
||||
cfg2 &= ~(MAC_CFG2_IF_1000 | MAC_CFG2_IF_10_100 | MAC_CFG2_FDX);
|
||||
cfg2 |= (ag->duplex) ? MAC_CFG2_FDX : 0;
|
||||
|
||||
ifctl = ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL);
|
||||
ifctl &= ~(MAC_IFCTL_SPEED);
|
||||
|
||||
fifo5 = ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5);
|
||||
fifo5 &= ~FIFO_CFG5_BM;
|
||||
|
||||
switch (ag->speed) {
|
||||
case SPEED_1000:
|
||||
mii_speed = MII_CTRL_SPEED_1000;
|
||||
cfg2 |= MAC_CFG2_IF_1000;
|
||||
fifo5 |= FIFO_CFG5_BM;
|
||||
break;
|
||||
case SPEED_100:
|
||||
mii_speed = MII_CTRL_SPEED_100;
|
||||
cfg2 |= MAC_CFG2_IF_10_100;
|
||||
ifctl |= MAC_IFCTL_SPEED;
|
||||
break;
|
||||
case SPEED_10:
|
||||
mii_speed = MII_CTRL_SPEED_10;
|
||||
cfg2 |= MAC_CFG2_IF_10_100;
|
||||
break;
|
||||
default:
|
||||
BUG();
|
||||
return;
|
||||
}
|
||||
|
||||
if (pdata->is_ar91xx)
|
||||
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, 0x00780fff);
|
||||
else if (pdata->is_ar724x)
|
||||
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, pdata->fifo_cfg3);
|
||||
else
|
||||
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, 0x008001ff);
|
||||
|
||||
if (pdata->set_pll)
|
||||
pdata->set_pll(ag->speed);
|
||||
|
||||
ag71xx_mii_ctrl_set_speed(ag, mii_speed);
|
||||
|
||||
ag71xx_wr(ag, AG71XX_REG_MAC_CFG2, cfg2);
|
||||
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, fifo5);
|
||||
ag71xx_wr(ag, AG71XX_REG_MAC_IFCTL, ifctl);
|
||||
|
||||
netif_carrier_on(ag->dev);
|
||||
if (netif_msg_link(ag))
|
||||
printk(KERN_INFO "%s: link up (%sMbps/%s duplex)\n",
|
||||
ag->dev->name,
|
||||
ag71xx_speed_str(ag),
|
||||
(DUPLEX_FULL == ag->duplex) ? "Full" : "Half");
|
||||
|
||||
DBG("%s: fifo_cfg0=%#x, fifo_cfg1=%#x, fifo_cfg2=%#x\n",
|
||||
ag->dev->name,
|
||||
ag71xx_rr(ag, AG71XX_REG_FIFO_CFG0),
|
||||
ag71xx_rr(ag, AG71XX_REG_FIFO_CFG1),
|
||||
ag71xx_rr(ag, AG71XX_REG_FIFO_CFG2));
|
||||
|
||||
DBG("%s: fifo_cfg3=%#x, fifo_cfg4=%#x, fifo_cfg5=%#x\n",
|
||||
ag->dev->name,
|
||||
ag71xx_rr(ag, AG71XX_REG_FIFO_CFG3),
|
||||
ag71xx_rr(ag, AG71XX_REG_FIFO_CFG4),
|
||||
ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5));
|
||||
|
||||
DBG("%s: mac_cfg2=%#x, mac_ifctl=%#x, mii_ctrl=%#x\n",
|
||||
ag->dev->name,
|
||||
ag71xx_rr(ag, AG71XX_REG_MAC_CFG2),
|
||||
ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL),
|
||||
ag71xx_mii_ctrl_rr(ag));
|
||||
}
|
||||
|
||||
static void ag71xx_phy_link_adjust(struct net_device *dev)
|
||||
{
|
||||
struct ag71xx *ag = netdev_priv(dev);
|
||||
@@ -138,7 +37,7 @@ static void ag71xx_phy_link_adjust(struct net_device *dev)
|
||||
ag->speed = phydev->speed;
|
||||
|
||||
if (status_change)
|
||||
ag71xx_phy_link_update(ag);
|
||||
ag71xx_link_adjust(ag);
|
||||
|
||||
spin_unlock_irqrestore(&ag->lock, flags);
|
||||
}
|
||||
@@ -153,7 +52,7 @@ void ag71xx_phy_start(struct ag71xx *ag)
|
||||
ag->duplex = pdata->duplex;
|
||||
ag->speed = pdata->speed;
|
||||
ag->link = 1;
|
||||
ag71xx_phy_link_update(ag);
|
||||
ag71xx_link_adjust(ag);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -165,7 +64,7 @@ void ag71xx_phy_stop(struct ag71xx *ag)
|
||||
ag->duplex = -1;
|
||||
ag->link = 0;
|
||||
ag->speed = 0;
|
||||
ag71xx_phy_link_update(ag);
|
||||
ag71xx_link_adjust(ag);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -0,0 +1,736 @@
|
||||
/*
|
||||
* DSA driver for the built-in ethernet switch of the Atheros AR7240 SoC
|
||||
* Copyright (c) 2010 Gabor Juhos <juhosg@openwrt.org>
|
||||
*
|
||||
* This file was based on:
|
||||
* net/dsa/mv88e6060.c - Driver for Marvell 88e6060 switch chips
|
||||
* Copyright (c) 2008 Marvell Semiconductor
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License version 2 as published
|
||||
* by the Free Software Foundation.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/etherdevice.h>
|
||||
#include <linux/list.h>
|
||||
#include <linux/netdevice.h>
|
||||
#include <linux/phy.h>
|
||||
#include <linux/mii.h>
|
||||
#include <linux/bitops.h>
|
||||
|
||||
#include "dsa_priv.h"
|
||||
|
||||
#define BITM(_count) (BIT(_count) - 1)
|
||||
|
||||
#define AR7240_REG_MASK_CTRL 0x00
|
||||
#define AR7240_MASK_CTRL_REVISION_M BITM(8)
|
||||
#define AR7240_MASK_CTRL_VERSION_M BITM(8)
|
||||
#define AR7240_MASK_CTRL_VERSION_S 8
|
||||
#define AR7240_MASK_CTRL_SOFT_RESET BIT(31)
|
||||
|
||||
#define AR7240_REG_MAC_ADDR0 0x20
|
||||
#define AR7240_REG_MAC_ADDR1 0x24
|
||||
|
||||
#define AR7240_REG_FLOOD_MASK 0x2c
|
||||
#define AR7240_FLOOD_MASK_BROAD_TO_CPU BIT(26)
|
||||
|
||||
#define AR7240_REG_GLOBAL_CTRL 0x30
|
||||
#define AR7240_GLOBAL_CTRL_MTU_M BITM(12)
|
||||
|
||||
#define AR7240_REG_AT_CTRL 0x5c
|
||||
#define AR7240_AT_CTRL_ARP_EN BIT(20)
|
||||
|
||||
#define AR7240_REG_TAG_PRIORITY 0x70
|
||||
|
||||
#define AR7240_REG_SERVICE_TAG 0x74
|
||||
#define AR7240_SERVICE_TAG_M BITM(16)
|
||||
|
||||
#define AR7240_REG_CPU_PORT 0x78
|
||||
#define AR7240_MIRROR_PORT_S 4
|
||||
#define AR7240_CPU_PORT_EN BIT(8)
|
||||
|
||||
#define AR7240_REG_MIB_FUNCTION0 0x80
|
||||
#define AR7240_MIB_TIMER_M BITM(16)
|
||||
#define AR7240_MIB_AT_HALF_EN BIT(16)
|
||||
#define AR7240_MIB_BUSY BIT(17)
|
||||
#define AR7240_MIB_FUNC_S 24
|
||||
#define AR7240_MIB_FUNC_NO_OP 0x0
|
||||
#define AR7240_MIB_FUNC_FLUSH 0x1
|
||||
#define AR7240_MIB_FUNC_CAPTURE 0x3
|
||||
|
||||
#define AR7240_REG_MDIO_CTRL 0x98
|
||||
#define AR7240_MDIO_CTRL_DATA_M BITM(16)
|
||||
#define AR7240_MDIO_CTRL_REG_ADDR_S 16
|
||||
#define AR7240_MDIO_CTRL_PHY_ADDR_S 21
|
||||
#define AR7240_MDIO_CTRL_CMD_WRITE 0
|
||||
#define AR7240_MDIO_CTRL_CMD_READ BIT(27)
|
||||
#define AR7240_MDIO_CTRL_MASTER_EN BIT(30)
|
||||
#define AR7240_MDIO_CTRL_BUSY BIT(31)
|
||||
|
||||
#define AR7240_REG_PORT_BASE(_port) (0x100 + (_port) * 0x100)
|
||||
|
||||
#define AR7240_REG_PORT_STATUS(_port) (AR7240_REG_PORT_BASE((_port)) + 0x00)
|
||||
#define AR7240_PORT_STATUS_SPEED_M BITM(2)
|
||||
#define AR7240_PORT_STATUS_SPEED_10 0
|
||||
#define AR7240_PORT_STATUS_SPEED_100 1
|
||||
#define AR7240_PORT_STATUS_SPEED_1000 2
|
||||
#define AR7240_PORT_STATUS_TXMAC BIT(2)
|
||||
#define AR7240_PORT_STATUS_RXMAC BIT(3)
|
||||
#define AR7240_PORT_STATUS_TXFLOW BIT(4)
|
||||
#define AR7240_PORT_STATUS_RXFLOW BIT(5)
|
||||
#define AR7240_PORT_STATUS_DUPLEX BIT(6)
|
||||
#define AR7240_PORT_STATUS_LINK_UP BIT(8)
|
||||
#define AR7240_PORT_STATUS_LINK_AUTO BIT(9)
|
||||
#define AR7240_PORT_STATUS_LINK_PAUSE BIT(10)
|
||||
|
||||
#define AR7240_REG_PORT_CTRL(_port) (AR7240_REG_PORT_BASE((_port)) + 0x04)
|
||||
#define AR7240_PORT_CTRL_STATE_M BITM(3)
|
||||
#define AR7240_PORT_CTRL_STATE_DISABLED 0
|
||||
#define AR7240_PORT_CTRL_STATE_BLOCK 1
|
||||
#define AR7240_PORT_CTRL_STATE_LISTEN 2
|
||||
#define AR7240_PORT_CTRL_STATE_LEARN 3
|
||||
#define AR7240_PORT_CTRL_STATE_FORWARD 4
|
||||
#define AR7240_PORT_CTRL_LEARN_LOCK BIT(7)
|
||||
#define AR7240_PORT_CTRL_VLAN_MODE_S 8
|
||||
#define AR7240_PORT_CTRL_VLAN_MODE_KEEP 0
|
||||
#define AR7240_PORT_CTRL_VLAN_MODE_STRIP 1
|
||||
#define AR7240_PORT_CTRL_VLAN_MODE_ADD 2
|
||||
#define AR7240_PORT_CTRL_VLAN_MODE_DOUBLE_TAG 3
|
||||
#define AR7240_PORT_CTRL_IGMP_SNOOP BIT(10)
|
||||
#define AR7240_PORT_CTRL_HEADER BIT(11)
|
||||
#define AR7240_PORT_CTRL_MAC_LOOP BIT(12)
|
||||
#define AR7240_PORT_CTRL_SINGLE_VLAN BIT(13)
|
||||
#define AR7240_PORT_CTRL_LEARN BIT(14)
|
||||
#define AR7240_PORT_CTRL_DOUBLE_TAG BIT(15)
|
||||
#define AR7240_PORT_CTRL_MIRROR_TX BIT(16)
|
||||
#define AR7240_PORT_CTRL_MIRROR_RX BIT(17)
|
||||
|
||||
#define AR7240_REG_PORT_VLAN(_port) (AR7240_REG_PORT_BASE((_port)) + 0x08)
|
||||
|
||||
#define AR7240_PORT_VLAN_DEFAULT_ID_S 0
|
||||
#define AR7240_PORT_VLAN_DEST_PORTS_S 16
|
||||
|
||||
#define AR7240_REG_STATS_BASE(_port) (0x20000 + (_port) * 0x100)
|
||||
|
||||
#define AR7240_STATS_RXBROAD 0x00
|
||||
#define AR7240_STATS_RXPAUSE 0x04
|
||||
#define AR7240_STATS_RXMULTI 0x08
|
||||
#define AR7240_STATS_RXFCSERR 0x0c
|
||||
#define AR7240_STATS_RXALIGNERR 0x10
|
||||
#define AR7240_STATS_RXRUNT 0x14
|
||||
#define AR7240_STATS_RXFRAGMENT 0x18
|
||||
#define AR7240_STATS_RX64BYTE 0x1c
|
||||
#define AR7240_STATS_RX128BYTE 0x20
|
||||
#define AR7240_STATS_RX256BYTE 0x24
|
||||
#define AR7240_STATS_RX512BYTE 0x28
|
||||
#define AR7240_STATS_RX1024BYTE 0x2c
|
||||
#define AR7240_STATS_RX1518BYTE 0x30
|
||||
#define AR7240_STATS_RXMAXBYTE 0x34
|
||||
#define AR7240_STATS_RXTOOLONG 0x38
|
||||
#define AR7240_STATS_RXGOODBYTE 0x3c
|
||||
#define AR7240_STATS_RXBADBYTE 0x44
|
||||
#define AR7240_STATS_RXOVERFLOW 0x4c
|
||||
#define AR7240_STATS_FILTERED 0x50
|
||||
#define AR7240_STATS_TXBROAD 0x54
|
||||
#define AR7240_STATS_TXPAUSE 0x58
|
||||
#define AR7240_STATS_TXMULTI 0x5c
|
||||
#define AR7240_STATS_TXUNDERRUN 0x60
|
||||
#define AR7240_STATS_TX64BYTE 0x64
|
||||
#define AR7240_STATS_TX128BYTE 0x68
|
||||
#define AR7240_STATS_TX256BYTE 0x6c
|
||||
#define AR7240_STATS_TX512BYTE 0x70
|
||||
#define AR7240_STATS_TX1024BYTE 0x74
|
||||
#define AR7240_STATS_TX1518BYTE 0x78
|
||||
#define AR7240_STATS_TXMAXBYTE 0x7c
|
||||
#define AR7240_STATS_TXOVERSIZE 0x80
|
||||
#define AR7240_STATS_TXBYTE 0x84
|
||||
#define AR7240_STATS_TXCOLLISION 0x8c
|
||||
#define AR7240_STATS_TXABORTCOL 0x90
|
||||
#define AR7240_STATS_TXMULTICOL 0x94
|
||||
#define AR7240_STATS_TXSINGLECOL 0x98
|
||||
#define AR7240_STATS_TXEXCDEFER 0x9c
|
||||
#define AR7240_STATS_TXDEFER 0xa0
|
||||
#define AR7240_STATS_TXLATECOL 0xa4
|
||||
|
||||
#define AR7240_PORT_CPU 0
|
||||
#define AR7240_NUM_PORTS 6
|
||||
#define AR7240_NUM_PHYS 5
|
||||
|
||||
#define AR7240_PHY_ID1 0x004d
|
||||
#define AR7240_PHY_ID2 0xd041
|
||||
|
||||
#define AR7240_PORT_MASK(_port) BIT((_port))
|
||||
#define AR7240_PORT_MASK_ALL BITM(AR7240_NUM_PORTS)
|
||||
#define AR7240_PORT_MASK_BUT(_port) (AR7240_PORT_MASK_ALL & ~BIT((_port)))
|
||||
|
||||
struct ar7240sw {
|
||||
struct mii_bus *mii_bus;
|
||||
struct mutex reg_mutex;
|
||||
struct mutex stats_mutex;
|
||||
};
|
||||
|
||||
struct ar7240sw_hw_stat {
|
||||
char string[ETH_GSTRING_LEN];
|
||||
int sizeof_stat;
|
||||
int reg;
|
||||
};
|
||||
|
||||
static inline struct ar7240sw *dsa_to_ar7240sw(struct dsa_switch *ds)
|
||||
{
|
||||
return (struct ar7240sw *)(ds + 1);
|
||||
}
|
||||
|
||||
static inline void ar7240sw_init(struct ar7240sw *as, struct mii_bus *mii)
|
||||
{
|
||||
as->mii_bus = mii;
|
||||
mutex_init(&as->reg_mutex);
|
||||
mutex_init(&as->stats_mutex);
|
||||
}
|
||||
|
||||
static inline u16 mk_phy_addr(u32 reg)
|
||||
{
|
||||
return (0x17 & ((reg >> 4) | 0x10));
|
||||
}
|
||||
|
||||
static inline u16 mk_phy_reg(u32 reg)
|
||||
{
|
||||
return ((reg << 1) & 0x1e);
|
||||
}
|
||||
|
||||
static inline u16 mk_high_addr(u32 reg)
|
||||
{
|
||||
return ((reg >> 7) & 0x1ff);
|
||||
}
|
||||
|
||||
static u32 __ar7240sw_reg_read(struct ar7240sw *as, u32 reg)
|
||||
{
|
||||
struct mii_bus *mii = as->mii_bus;
|
||||
u16 phy_addr;
|
||||
u16 phy_reg;
|
||||
u32 hi, lo;
|
||||
|
||||
reg = (reg & 0xfffffffc) >> 2;
|
||||
|
||||
mdiobus_write(mii, 0x1f, 0x10, mk_high_addr(reg));
|
||||
|
||||
phy_addr = mk_phy_addr(reg);
|
||||
phy_reg = mk_phy_reg(reg);
|
||||
|
||||
lo = (u32) mdiobus_read(mii, phy_addr, phy_reg);
|
||||
hi = (u32) mdiobus_read(mii, phy_addr, phy_reg + 1);
|
||||
|
||||
return ((hi << 16) | lo);
|
||||
}
|
||||
|
||||
static void __ar7240sw_reg_write(struct ar7240sw *as, u32 reg, u32 val)
|
||||
{
|
||||
struct mii_bus *mii = as->mii_bus;
|
||||
u16 phy_addr;
|
||||
u16 phy_reg;
|
||||
|
||||
reg = (reg & 0xfffffffc) >> 2;
|
||||
|
||||
mdiobus_write(mii, 0x1f, 0x10, mk_high_addr(reg));
|
||||
|
||||
phy_addr = mk_phy_addr(reg);
|
||||
phy_reg = mk_phy_reg(reg);
|
||||
|
||||
mdiobus_write(mii, phy_addr, phy_reg + 1, (val >> 16));
|
||||
mdiobus_write(mii, phy_addr, phy_reg, (val & 0xffff));
|
||||
}
|
||||
|
||||
static u32 ar7240sw_reg_read(struct ar7240sw *as, u32 reg_addr)
|
||||
{
|
||||
u32 ret;
|
||||
|
||||
mutex_lock(&as->reg_mutex);
|
||||
ret = __ar7240sw_reg_read(as, reg_addr);
|
||||
mutex_unlock(&as->reg_mutex);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void ar7240sw_reg_write(struct ar7240sw *as, u32 reg_addr, u32 reg_val)
|
||||
{
|
||||
mutex_lock(&as->reg_mutex);
|
||||
__ar7240sw_reg_write(as, reg_addr, reg_val);
|
||||
mutex_unlock(&as->reg_mutex);
|
||||
}
|
||||
|
||||
static u32 ar7240sw_reg_rmw(struct ar7240sw *as, u32 reg, u32 mask, u32 val)
|
||||
{
|
||||
u32 t;
|
||||
|
||||
mutex_lock(&as->reg_mutex);
|
||||
t = __ar7240sw_reg_read(as, reg);
|
||||
t &= ~mask;
|
||||
t |= val;
|
||||
__ar7240sw_reg_write(as, reg, t);
|
||||
mutex_unlock(&as->reg_mutex);
|
||||
|
||||
return t;
|
||||
}
|
||||
|
||||
static void ar7240sw_reg_set(struct ar7240sw *as, u32 reg, u32 val)
|
||||
{
|
||||
u32 t;
|
||||
|
||||
mutex_lock(&as->reg_mutex);
|
||||
t = __ar7240sw_reg_read(as, reg);
|
||||
t |= val;
|
||||
__ar7240sw_reg_write(as, reg, t);
|
||||
mutex_unlock(&as->reg_mutex);
|
||||
}
|
||||
|
||||
static int ar7240sw_reg_wait(struct ar7240sw *as, u32 reg, u32 mask, u32 val,
|
||||
unsigned timeout)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < timeout; i++) {
|
||||
u32 t;
|
||||
|
||||
t = ar7240sw_reg_read(as, reg);
|
||||
if ((t & mask) == val)
|
||||
return 0;
|
||||
|
||||
msleep(1);
|
||||
}
|
||||
|
||||
return -ETIMEDOUT;
|
||||
}
|
||||
|
||||
static u16 ar7240sw_phy_read(struct ar7240sw *as, unsigned phy_addr,
|
||||
unsigned reg_addr)
|
||||
{
|
||||
u32 t;
|
||||
int err;
|
||||
|
||||
if (phy_addr >= AR7240_NUM_PHYS)
|
||||
return 0xffff;
|
||||
|
||||
t = (reg_addr << AR7240_MDIO_CTRL_REG_ADDR_S) |
|
||||
(phy_addr << AR7240_MDIO_CTRL_PHY_ADDR_S) |
|
||||
AR7240_MDIO_CTRL_MASTER_EN |
|
||||
AR7240_MDIO_CTRL_BUSY |
|
||||
AR7240_MDIO_CTRL_CMD_READ;
|
||||
|
||||
ar7240sw_reg_write(as, AR7240_REG_MDIO_CTRL, t);
|
||||
err = ar7240sw_reg_wait(as, AR7240_REG_MDIO_CTRL,
|
||||
AR7240_MDIO_CTRL_BUSY, 0, 5);
|
||||
if (err)
|
||||
return 0xffff;
|
||||
|
||||
t = ar7240sw_reg_read(as, AR7240_REG_MDIO_CTRL);
|
||||
return (t & AR7240_MDIO_CTRL_DATA_M);
|
||||
}
|
||||
|
||||
static int ar7240sw_phy_write(struct ar7240sw *as, unsigned phy_addr,
|
||||
unsigned reg_addr, u16 reg_val)
|
||||
{
|
||||
u32 t;
|
||||
int ret;
|
||||
|
||||
if (phy_addr >= AR7240_NUM_PHYS)
|
||||
return -EINVAL;
|
||||
|
||||
t = (phy_addr << AR7240_MDIO_CTRL_PHY_ADDR_S) |
|
||||
(reg_addr << AR7240_MDIO_CTRL_REG_ADDR_S) |
|
||||
AR7240_MDIO_CTRL_MASTER_EN |
|
||||
AR7240_MDIO_CTRL_BUSY |
|
||||
AR7240_MDIO_CTRL_CMD_WRITE |
|
||||
reg_val;
|
||||
|
||||
ar7240sw_reg_write(as, AR7240_REG_MDIO_CTRL, t);
|
||||
ret = ar7240sw_reg_wait(as, AR7240_REG_MDIO_CTRL,
|
||||
AR7240_MDIO_CTRL_BUSY, 0, 5);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int ar7240sw_capture_stats(struct ar7240sw *as)
|
||||
{
|
||||
int ret;
|
||||
|
||||
/* Capture the hardware statistics for all ports */
|
||||
ar7240sw_reg_write(as, AR7240_REG_MIB_FUNCTION0,
|
||||
(AR7240_MIB_FUNC_CAPTURE << AR7240_MIB_FUNC_S));
|
||||
|
||||
/* Wait for the capturing to complete. */
|
||||
ret = ar7240sw_reg_wait(as, AR7240_REG_MIB_FUNCTION0,
|
||||
AR7240_MIB_BUSY, 0, 10);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void ar7240sw_disable_port(struct ar7240sw *as, unsigned port)
|
||||
{
|
||||
ar7240sw_reg_write(as, AR7240_REG_PORT_CTRL(port),
|
||||
AR7240_PORT_CTRL_STATE_DISABLED);
|
||||
}
|
||||
|
||||
static int ar7240sw_reset(struct ar7240sw *as)
|
||||
{
|
||||
int ret;
|
||||
int i;
|
||||
|
||||
/* Set all ports to disabled state. */
|
||||
for (i = 0; i < AR7240_NUM_PORTS; i++)
|
||||
ar7240sw_disable_port(as, i);
|
||||
|
||||
/* Wait for transmit queues to drain. */
|
||||
msleep(2);
|
||||
|
||||
/* Reset the switch. */
|
||||
ar7240sw_reg_write(as, AR7240_REG_MASK_CTRL,
|
||||
AR7240_MASK_CTRL_SOFT_RESET);
|
||||
|
||||
ret = ar7240sw_reg_wait(as, AR7240_REG_MASK_CTRL,
|
||||
AR7240_MASK_CTRL_SOFT_RESET, 0, 1000);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void ar7240sw_setup(struct ar7240sw *as)
|
||||
{
|
||||
/* Enable CPU port, and disable mirror port */
|
||||
ar7240sw_reg_write(as, AR7240_REG_CPU_PORT,
|
||||
AR7240_CPU_PORT_EN |
|
||||
(15 << AR7240_MIRROR_PORT_S));
|
||||
|
||||
/* Setup TAG priority mapping */
|
||||
ar7240sw_reg_write(as, AR7240_REG_TAG_PRIORITY, 0xfa50);
|
||||
|
||||
/* Enable ARP frame acknowledge */
|
||||
ar7240sw_reg_set(as, AR7240_REG_AT_CTRL, AR7240_AT_CTRL_ARP_EN);
|
||||
|
||||
/* Enable Broadcast frames transmitted to the CPU */
|
||||
ar7240sw_reg_set(as, AR7240_REG_FLOOD_MASK,
|
||||
AR7240_FLOOD_MASK_BROAD_TO_CPU);
|
||||
|
||||
/* setup MTU */
|
||||
ar7240sw_reg_rmw(as, AR7240_REG_GLOBAL_CTRL, AR7240_GLOBAL_CTRL_MTU_M,
|
||||
1536);
|
||||
|
||||
/* setup Service TAG */
|
||||
ar7240sw_reg_rmw(as, AR7240_REG_SERVICE_TAG, AR7240_SERVICE_TAG_M,
|
||||
ETH_P_QINQ);
|
||||
}
|
||||
|
||||
static void ar7240sw_setup_port(struct ar7240sw *as, unsigned port)
|
||||
{
|
||||
u32 ctrl;
|
||||
u32 dest_ports;
|
||||
u32 vlan;
|
||||
|
||||
ctrl = AR7240_PORT_CTRL_STATE_FORWARD;
|
||||
|
||||
if (port == AR7240_PORT_CPU) {
|
||||
ar7240sw_reg_write(as, AR7240_REG_PORT_STATUS(port),
|
||||
AR7240_PORT_STATUS_SPEED_1000 |
|
||||
AR7240_PORT_STATUS_TXFLOW |
|
||||
AR7240_PORT_STATUS_RXFLOW |
|
||||
AR7240_PORT_STATUS_TXMAC |
|
||||
AR7240_PORT_STATUS_RXMAC |
|
||||
AR7240_PORT_STATUS_DUPLEX);
|
||||
|
||||
/* allow the CPU port to talk to each of the 'real' ports */
|
||||
dest_ports = AR7240_PORT_MASK_BUT(port);
|
||||
|
||||
/* remove service tag from ingress frames */
|
||||
ctrl |= AR7240_PORT_CTRL_DOUBLE_TAG;
|
||||
} else {
|
||||
ar7240sw_reg_write(as, AR7240_REG_PORT_STATUS(port),
|
||||
AR7240_PORT_STATUS_LINK_AUTO);
|
||||
|
||||
/*
|
||||
* allow each of the 'real' ports to only talk to the CPU
|
||||
* port.
|
||||
*/
|
||||
dest_ports = AR7240_PORT_MASK(port) |
|
||||
AR7240_PORT_MASK(AR7240_PORT_CPU);
|
||||
|
||||
/* add service tag to egress frames */
|
||||
ctrl |= (AR7240_PORT_CTRL_VLAN_MODE_DOUBLE_TAG <<
|
||||
AR7240_PORT_CTRL_VLAN_MODE_S);
|
||||
}
|
||||
|
||||
/* set default VID and and destination ports for this VLAN */
|
||||
vlan = port;
|
||||
vlan |= (dest_ports << AR7240_PORT_VLAN_DEST_PORTS_S);
|
||||
|
||||
ar7240sw_reg_write(as, AR7240_REG_PORT_CTRL(port), ctrl);
|
||||
ar7240sw_reg_write(as, AR7240_REG_PORT_VLAN(port), vlan);
|
||||
}
|
||||
|
||||
static char *ar7240_dsa_probe(struct mii_bus *mii, int sw_addr)
|
||||
{
|
||||
struct ar7240sw as;
|
||||
u32 ctrl;
|
||||
u16 phy_id1;
|
||||
u16 phy_id2;
|
||||
u8 ver;
|
||||
|
||||
ar7240sw_init(&as, mii);
|
||||
|
||||
ctrl = ar7240sw_reg_read(&as, AR7240_REG_MASK_CTRL);
|
||||
|
||||
ver = (ctrl >> AR7240_MASK_CTRL_VERSION_S) & AR7240_MASK_CTRL_VERSION_M;
|
||||
if (ver != 1) {
|
||||
pr_err("ar7240_dsa: unsupported chip, ctrl=%08x\n", ctrl);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
phy_id1 = ar7240sw_phy_read(&as, 0, MII_PHYSID1);
|
||||
phy_id2 = ar7240sw_phy_read(&as, 0, MII_PHYSID2);
|
||||
if (phy_id1 != AR7240_PHY_ID1 || phy_id2 != AR7240_PHY_ID2) {
|
||||
pr_err("ar7240_dsa: unknown phy id '%04x:%04x'\n",
|
||||
phy_id1, phy_id2);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
return "Atheros AR7240 built-in";
|
||||
}
|
||||
|
||||
static int ar7240_dsa_setup(struct dsa_switch *ds)
|
||||
{
|
||||
struct ar7240sw *as = dsa_to_ar7240sw(ds);
|
||||
int i;
|
||||
int ret;
|
||||
|
||||
ar7240sw_init(as, ds->master_mii_bus);
|
||||
|
||||
ret = ar7240sw_reset(as);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ar7240sw_setup(as);
|
||||
|
||||
for (i = 0; i < AR7240_NUM_PORTS; i++) {
|
||||
if (dsa_is_cpu_port(ds, i) || (ds->phys_port_mask & (1 << i)))
|
||||
ar7240sw_setup_port(as, i);
|
||||
else
|
||||
ar7240sw_disable_port(as, i);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ar7240_dsa_set_addr(struct dsa_switch *ds, u8 *addr)
|
||||
{
|
||||
struct ar7240sw *as = dsa_to_ar7240sw(ds);
|
||||
u32 t;
|
||||
|
||||
t = (addr[4] << 8) | addr[5];
|
||||
ar7240sw_reg_write(as, AR7240_REG_MAC_ADDR0, t);
|
||||
|
||||
t = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | addr[3];
|
||||
ar7240sw_reg_write(as, AR7240_REG_MAC_ADDR1, t);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ar7240_iort_to_phy_addr(int port)
|
||||
{
|
||||
if (port > 0 && port < AR7240_NUM_PORTS)
|
||||
return port - 1;
|
||||
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
static int ar7240_dsa_phy_read(struct dsa_switch *ds, int port, int regnum)
|
||||
{
|
||||
struct ar7240sw *as = dsa_to_ar7240sw(ds);
|
||||
int phy_addr;
|
||||
|
||||
phy_addr = ar7240_iort_to_phy_addr(port);
|
||||
if (phy_addr < 0)
|
||||
return 0xffff;
|
||||
|
||||
return ar7240sw_phy_read(as, phy_addr, regnum);
|
||||
}
|
||||
|
||||
static int ar7240_dsa_phy_write(struct dsa_switch *ds, int port, int regnum,
|
||||
u16 val)
|
||||
{
|
||||
struct ar7240sw *as = dsa_to_ar7240sw(ds);
|
||||
int phy_addr;
|
||||
|
||||
phy_addr = ar7240_iort_to_phy_addr(port);
|
||||
if (phy_addr < 0)
|
||||
return 0xffff;
|
||||
|
||||
return ar7240sw_phy_write(as, phy_addr, regnum, val);
|
||||
}
|
||||
|
||||
static const char *ar7240sw_speed_str(unsigned speed)
|
||||
{
|
||||
switch (speed) {
|
||||
case AR7240_PORT_STATUS_SPEED_10:
|
||||
return "10";
|
||||
case AR7240_PORT_STATUS_SPEED_100:
|
||||
return "100";
|
||||
case AR7240_PORT_STATUS_SPEED_1000:
|
||||
return "1000";
|
||||
}
|
||||
|
||||
return "????";
|
||||
}
|
||||
|
||||
static void ar7240_dsa_poll_link(struct dsa_switch *ds)
|
||||
{
|
||||
struct ar7240sw *as = dsa_to_ar7240sw(ds);
|
||||
int i;
|
||||
|
||||
for (i = 0; i < DSA_MAX_PORTS; i++) {
|
||||
struct net_device *dev;
|
||||
u32 status;
|
||||
int link;
|
||||
unsigned speed;
|
||||
int duplex;
|
||||
|
||||
dev = ds->ports[i];
|
||||
if (dev == NULL)
|
||||
continue;
|
||||
|
||||
link = 0;
|
||||
if (dev->flags & IFF_UP) {
|
||||
status = ar7240sw_reg_read(as,
|
||||
AR7240_REG_PORT_STATUS(i));
|
||||
link = !!(status & AR7240_PORT_STATUS_LINK_UP);
|
||||
}
|
||||
|
||||
if (!link) {
|
||||
if (netif_carrier_ok(dev)) {
|
||||
pr_info("%s: link down\n", dev->name);
|
||||
netif_carrier_off(dev);
|
||||
}
|
||||
continue;
|
||||
}
|
||||
|
||||
speed = (status & AR7240_PORT_STATUS_SPEED_M);
|
||||
duplex = (status & AR7240_PORT_STATUS_DUPLEX) ? 1 : 0;
|
||||
if (!netif_carrier_ok(dev)) {
|
||||
pr_info("%s: link up, %sMb/s, %s duplex",
|
||||
dev->name,
|
||||
ar7240sw_speed_str(speed),
|
||||
duplex ? "full" : "half");
|
||||
netif_carrier_on(dev);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static const struct ar7240sw_hw_stat ar7240_hw_stats[] = {
|
||||
{ "rx_broadcast" , 4, AR7240_STATS_RXBROAD, },
|
||||
{ "rx_pause" , 4, AR7240_STATS_RXPAUSE, },
|
||||
{ "rx_multicast" , 4, AR7240_STATS_RXMULTI, },
|
||||
{ "rx_fcs_error" , 4, AR7240_STATS_RXFCSERR, },
|
||||
{ "rx_align_error" , 4, AR7240_STATS_RXALIGNERR, },
|
||||
{ "rx_undersize" , 4, AR7240_STATS_RXRUNT, },
|
||||
{ "rx_fragments" , 4, AR7240_STATS_RXFRAGMENT, },
|
||||
{ "rx_64bytes" , 4, AR7240_STATS_RX64BYTE, },
|
||||
{ "rx_65_127bytes" , 4, AR7240_STATS_RX128BYTE, },
|
||||
{ "rx_128_255bytes" , 4, AR7240_STATS_RX256BYTE, },
|
||||
{ "rx_256_511bytes" , 4, AR7240_STATS_RX512BYTE, },
|
||||
{ "rx_512_1023bytes" , 4, AR7240_STATS_RX1024BYTE, },
|
||||
{ "rx_1024_1518bytes" , 4, AR7240_STATS_RX1518BYTE, },
|
||||
{ "rx_1519_max_bytes" , 4, AR7240_STATS_RXMAXBYTE, },
|
||||
{ "rx_oversize" , 4, AR7240_STATS_RXTOOLONG, },
|
||||
{ "rx_good_bytes" , 8, AR7240_STATS_RXGOODBYTE, },
|
||||
{ "rx_bad_bytes" , 8, AR7240_STATS_RXBADBYTE, },
|
||||
{ "rx_overflow" , 4, AR7240_STATS_RXOVERFLOW, },
|
||||
{ "filtered" , 4, AR7240_STATS_FILTERED, },
|
||||
{ "tx_broadcast" , 4, AR7240_STATS_TXBROAD, },
|
||||
{ "tx_pause" , 4, AR7240_STATS_TXPAUSE, },
|
||||
{ "tx_multicast" , 4, AR7240_STATS_TXMULTI, },
|
||||
{ "tx_underrun" , 4, AR7240_STATS_TXUNDERRUN, },
|
||||
{ "tx_64bytes" , 4, AR7240_STATS_TX64BYTE, },
|
||||
{ "tx_65_127bytes" , 4, AR7240_STATS_TX128BYTE, },
|
||||
{ "tx_128_255bytes" , 4, AR7240_STATS_TX256BYTE, },
|
||||
{ "tx_256_511bytes" , 4, AR7240_STATS_TX512BYTE, },
|
||||
{ "tx_512_1023bytes" , 4, AR7240_STATS_TX1024BYTE, },
|
||||
{ "tx_1024_1518bytes" , 4, AR7240_STATS_TX1518BYTE, },
|
||||
{ "tx_1519_max_bytes" , 4, AR7240_STATS_TXMAXBYTE, },
|
||||
{ "tx_oversize" , 4, AR7240_STATS_TXOVERSIZE, },
|
||||
{ "tx_bytes" , 8, AR7240_STATS_TXBYTE, },
|
||||
{ "tx_collisions" , 4, AR7240_STATS_TXCOLLISION, },
|
||||
{ "tx_abort_collisions" , 4, AR7240_STATS_TXABORTCOL, },
|
||||
{ "tx_multi_collisions" , 4, AR7240_STATS_TXMULTICOL, },
|
||||
{ "tx_single_collisions", 4, AR7240_STATS_TXSINGLECOL, },
|
||||
{ "tx_excessive_deferred", 4, AR7240_STATS_TXEXCDEFER, },
|
||||
{ "tx_deferred" , 4, AR7240_STATS_TXDEFER, },
|
||||
{ "tx_late_collisions" , 4, AR7240_STATS_TXLATECOL, },
|
||||
};
|
||||
|
||||
static void ar7240_dsa_get_strings(struct dsa_switch *ds, int port,
|
||||
uint8_t *data)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(ar7240_hw_stats); i++) {
|
||||
memcpy(data + i * ETH_GSTRING_LEN,
|
||||
ar7240_hw_stats[i].string, ETH_GSTRING_LEN);
|
||||
}
|
||||
}
|
||||
|
||||
static void ar7240_dsa_get_ethtool_stats(struct dsa_switch *ds, int port,
|
||||
uint64_t *data)
|
||||
{
|
||||
struct ar7240sw *as = dsa_to_ar7240sw(ds);
|
||||
int err;
|
||||
int i;
|
||||
|
||||
mutex_lock(&as->stats_mutex);
|
||||
|
||||
err = ar7240sw_capture_stats(as);
|
||||
if (err)
|
||||
goto unlock;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(ar7240_hw_stats); i++) {
|
||||
const struct ar7240sw_hw_stat *s = &ar7240_hw_stats[i];
|
||||
u32 reg = AR7240_REG_STATS_BASE(port);
|
||||
u32 low;
|
||||
u32 high;
|
||||
|
||||
low = ar7240sw_reg_read(as, reg + s->reg);
|
||||
if (s->sizeof_stat == 8)
|
||||
high = ar7240sw_reg_read(as, reg + s->reg);
|
||||
else
|
||||
high = 0;
|
||||
|
||||
data[i] = (((u64) high) << 32) | low;
|
||||
}
|
||||
|
||||
unlock:
|
||||
mutex_unlock(&as->stats_mutex);
|
||||
}
|
||||
|
||||
static int ar7240_dsa_get_sset_count(struct dsa_switch *ds)
|
||||
{
|
||||
return ARRAY_SIZE(ar7240_hw_stats);
|
||||
}
|
||||
|
||||
static struct dsa_switch_driver ar7240_dsa_driver = {
|
||||
.tag_protocol = htons(ETH_P_QINQ),
|
||||
.priv_size = sizeof(struct ar7240sw),
|
||||
.probe = ar7240_dsa_probe,
|
||||
.setup = ar7240_dsa_setup,
|
||||
.set_addr = ar7240_dsa_set_addr,
|
||||
.phy_read = ar7240_dsa_phy_read,
|
||||
.phy_write = ar7240_dsa_phy_write,
|
||||
.poll_link = ar7240_dsa_poll_link,
|
||||
.get_strings = ar7240_dsa_get_strings,
|
||||
.get_ethtool_stats = ar7240_dsa_get_ethtool_stats,
|
||||
.get_sset_count = ar7240_dsa_get_sset_count,
|
||||
};
|
||||
|
||||
int __init dsa_ar7240_init(void)
|
||||
{
|
||||
register_switch_driver(&ar7240_dsa_driver);
|
||||
return 0;
|
||||
}
|
||||
module_init(dsa_ar7240_init);
|
||||
|
||||
void __exit dsa_ar7240_cleanup(void)
|
||||
{
|
||||
unregister_switch_driver(&ar7240_dsa_driver);
|
||||
}
|
||||
module_exit(dsa_ar7240_cleanup);
|
||||
@@ -0,0 +1,127 @@
|
||||
/*
|
||||
* net/dsa/tag_qinq.c - QinQ tag format handling
|
||||
* Copyright (c) 2010 Gabor Juhos <juhosg@openwrt.org>
|
||||
*
|
||||
* This file was based on:
|
||||
* net/dsa/tag_edsa.c - Ethertype DSA tagging
|
||||
* Copyright (c) 2008-2009 Marvell Semiconductor
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*/
|
||||
|
||||
#include <linux/etherdevice.h>
|
||||
#include <linux/list.h>
|
||||
#include <linux/netdevice.h>
|
||||
#include <linux/if_vlan.h>
|
||||
|
||||
#include "dsa_priv.h"
|
||||
|
||||
netdev_tx_t qinq_xmit(struct sk_buff *skb, struct net_device *dev)
|
||||
{
|
||||
struct dsa_slave_priv *p = netdev_priv(dev);
|
||||
struct vlan_ethhdr *veth;
|
||||
unsigned int len;
|
||||
int ret;
|
||||
|
||||
if (skb_cow_head(skb, VLAN_HLEN) < 0)
|
||||
goto out_free_skb;
|
||||
|
||||
veth = (struct vlan_ethhdr *)skb_push(skb, VLAN_HLEN);
|
||||
|
||||
/* Move the mac addresses to the beginning of the new header. */
|
||||
memmove(skb->data, skb->data + VLAN_HLEN, 2 * VLAN_ETH_ALEN);
|
||||
skb->mac_header -= VLAN_HLEN;
|
||||
|
||||
/* setup VLAN header fields */
|
||||
veth->h_vlan_proto = htons(ETH_P_QINQ);
|
||||
veth->h_vlan_TCI = htons(p->port);
|
||||
|
||||
len = skb->len;
|
||||
skb->protocol = htons(ETH_P_QINQ);
|
||||
skb->dev = p->parent->dst->master_netdev;
|
||||
|
||||
ret = dev_queue_xmit(skb);
|
||||
if (unlikely(ret != NET_XMIT_SUCCESS))
|
||||
goto out_dropped;
|
||||
|
||||
dev->stats.tx_packets++;
|
||||
dev->stats.tx_bytes += len;
|
||||
|
||||
return NETDEV_TX_OK;
|
||||
|
||||
out_free_skb:
|
||||
kfree_skb(skb);
|
||||
out_dropped:
|
||||
dev->stats.tx_dropped++;
|
||||
return NETDEV_TX_OK;
|
||||
}
|
||||
|
||||
static int qinq_rcv(struct sk_buff *skb, struct net_device *dev,
|
||||
struct packet_type *pt, struct net_device *orig_dev)
|
||||
{
|
||||
struct dsa_switch_tree *dst;
|
||||
struct dsa_switch *ds;
|
||||
struct vlan_hdr *vhdr;
|
||||
int source_port;
|
||||
|
||||
dst = dev->dsa_ptr;
|
||||
if (unlikely(dst == NULL))
|
||||
goto out_drop;
|
||||
ds = dst->ds[0];
|
||||
|
||||
skb = skb_unshare(skb, GFP_ATOMIC);
|
||||
if (skb == NULL)
|
||||
goto out;
|
||||
|
||||
if (unlikely(!pskb_may_pull(skb, VLAN_HLEN)))
|
||||
goto out_drop;
|
||||
|
||||
vhdr = (struct vlan_hdr *)skb->data;
|
||||
source_port = ntohs(vhdr->h_vlan_TCI) & VLAN_VID_MASK;
|
||||
if (source_port >= DSA_MAX_PORTS || ds->ports[source_port] == NULL)
|
||||
goto out_drop;
|
||||
|
||||
/* Remove the outermost VLAN tag and update checksum. */
|
||||
skb_pull_rcsum(skb, VLAN_HLEN);
|
||||
memmove(skb->data - ETH_HLEN,
|
||||
skb->data - ETH_HLEN - VLAN_HLEN,
|
||||
2 * ETH_ALEN);
|
||||
|
||||
skb->dev = ds->ports[source_port];
|
||||
skb_push(skb, ETH_HLEN);
|
||||
skb->pkt_type = PACKET_HOST;
|
||||
skb->protocol = eth_type_trans(skb, skb->dev);
|
||||
|
||||
skb->dev->stats.rx_packets++;
|
||||
skb->dev->stats.rx_bytes += skb->len;
|
||||
|
||||
netif_receive_skb(skb);
|
||||
|
||||
return 0;
|
||||
|
||||
out_drop:
|
||||
kfree_skb(skb);
|
||||
out:
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct packet_type qinq_packet_type __read_mostly = {
|
||||
.type = cpu_to_be16(ETH_P_QINQ),
|
||||
.func = qinq_rcv,
|
||||
};
|
||||
|
||||
static int __init qinq_init_module(void)
|
||||
{
|
||||
dev_add_pack(&qinq_packet_type);
|
||||
return 0;
|
||||
}
|
||||
module_init(qinq_init_module);
|
||||
|
||||
static void __exit qinq_cleanup_module(void)
|
||||
{
|
||||
dev_remove_pack(&qinq_packet_type);
|
||||
}
|
||||
module_exit(qinq_cleanup_module);
|
||||
@@ -205,22 +205,10 @@ define Image/Build/PB4X
|
||||
endef
|
||||
|
||||
define Image/Build/MyLoader
|
||||
-$(STAGING_DIR_HOST)/bin/mkmylofw -B $(2) \
|
||||
-p0x030000:0xd0000:al:0x80060000:kernel:$(KDIR)/vmlinux.bin.lzma \
|
||||
-p0x100000:0:::rootfs:$(KDIR)/root.$(1) \
|
||||
$(call imgname,$(1),$(2))-2M.img
|
||||
-$(STAGING_DIR_HOST)/bin/mkmylofw -B $(2) -s 0x400000 \
|
||||
-p0x030000:0xd0000:al:0x80060000:kernel:$(KDIR)/vmlinux.bin.lzma \
|
||||
-p0x100000:0:::rootfs:$(KDIR)/root.$(1) \
|
||||
$(call imgname,$(1),$(2))-4M.img
|
||||
-$(STAGING_DIR_HOST)/bin/mkmylofw -B $(2) -s 0x800000 \
|
||||
-p0x030000:0xd0000:al:0x80060000:kernel:$(KDIR)/vmlinux.bin.lzma \
|
||||
-p0x100000:0:::rootfs:$(KDIR)/root.$(1) \
|
||||
$(call imgname,$(1),$(2))-8M.img
|
||||
-$(STAGING_DIR_HOST)/bin/mkmylofw -B $(2) -s 0x1000000 \
|
||||
-p0x030000:0xd0000:al:0x80060000:kernel:$(KDIR)/vmlinux.bin.lzma \
|
||||
-p0x100000:0:::rootfs:$(KDIR)/root.$(1) \
|
||||
$(call imgname,$(1),$(2))-16M.img
|
||||
-$(STAGING_DIR_HOST)/bin/mkmylofw -B $(2) -s $(3) \
|
||||
-p0x030000:0xe0000:al:0x80060000:kernel:$(KDIR)/vmlinux.bin.lzma \
|
||||
-p0x110000:0:::rootfs:$(KDIR)/root.$(1) \
|
||||
$(call imgname,$(1),$(2))-$(4)-factory.img
|
||||
endef
|
||||
|
||||
ubntxm_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,1024k(kernel),6528k(rootfs),256k(cfg)ro,64k(EEPROM)ro,7552k@0x50000(firmware)
|
||||
@@ -282,7 +270,12 @@ define Image/Build/TPLINK
|
||||
-B $(4) -N OpenWrt -V $(REVISION)\
|
||||
-k $(KDIR)/vmlinux-$(2).bin.gz \
|
||||
-r $(BIN_DIR)/openwrt-$(BOARD)-root.$(1) \
|
||||
-o $(call imgname,$(1),$(2))-universal.bin
|
||||
-o $(call imgname,$(1),$(2))-factory.bin
|
||||
-$(STAGING_DIR_HOST)/bin/mktplinkfw \
|
||||
-B $(4) -N OpenWrt -V $(REVISION) -s \
|
||||
-k $(KDIR)/vmlinux-$(2).bin.gz \
|
||||
-r $(BIN_DIR)/openwrt-$(BOARD)-root.$(1) \
|
||||
-o $(call imgname,$(1),$(2))-sysupgrade.bin
|
||||
endef
|
||||
|
||||
define Image/Build/TPLINK/initramfs
|
||||
@@ -404,7 +397,10 @@ define Image/Build/Profile/PB44
|
||||
endef
|
||||
|
||||
define Image/Build/Profile/WP543
|
||||
$(call Image/Build/Template/$(fs_64k)/$(1),MyLoader,wp543)
|
||||
$(call Image/Build/Template/$(fs_64k)/$(1),MyLoader,wp543,0x200000,2M)
|
||||
$(call Image/Build/Template/$(fs_64k)/$(1),MyLoader,wp543,0x400000,4M)
|
||||
$(call Image/Build/Template/$(fs_64k)/$(1),MyLoader,wp543,0x800000,8M)
|
||||
$(call Image/Build/Template/$(fs_64k)/$(1),MyLoader,wp543,0x1000000,16M)
|
||||
endef
|
||||
|
||||
define Image/Build/Profile/DIR600A1
|
||||
|
||||
@@ -0,0 +1,79 @@
|
||||
--- a/include/linux/if_ether.h
|
||||
+++ b/include/linux/if_ether.h
|
||||
@@ -81,6 +81,7 @@
|
||||
#define ETH_P_1588 0x88F7 /* IEEE 1588 Timesync */
|
||||
#define ETH_P_FCOE 0x8906 /* Fibre Channel over Ethernet */
|
||||
#define ETH_P_FIP 0x8914 /* FCoE Initialization Protocol */
|
||||
+#define ETH_P_QINQ 0x9100 /* QinQ VLAN Stacking Protocol */
|
||||
#define ETH_P_EDSA 0xDADA /* Ethertype DSA [ NOT AN OFFICIALLY REGISTERED ID ] */
|
||||
|
||||
/*
|
||||
--- a/net/dsa/dsa_priv.h
|
||||
+++ b/net/dsa/dsa_priv.h
|
||||
@@ -174,6 +174,9 @@ netdev_tx_t dsa_xmit(struct sk_buff *skb
|
||||
/* tag_edsa.c */
|
||||
netdev_tx_t edsa_xmit(struct sk_buff *skb, struct net_device *dev);
|
||||
|
||||
+/* tag_qinq.c */
|
||||
+netdev_tx_t qinq_xmit(struct sk_buff *skb, struct net_device *dev);
|
||||
+
|
||||
/* tag_trailer.c */
|
||||
netdev_tx_t trailer_xmit(struct sk_buff *skb, struct net_device *dev);
|
||||
|
||||
--- a/net/dsa/Kconfig
|
||||
+++ b/net/dsa/Kconfig
|
||||
@@ -23,6 +23,10 @@ config NET_DSA_TAG_TRAILER
|
||||
bool
|
||||
default n
|
||||
|
||||
+config NET_DSA_TAG_QINQ
|
||||
+ bool
|
||||
+ default y
|
||||
+
|
||||
|
||||
# switch drivers
|
||||
config NET_DSA_MV88E6XXX
|
||||
--- a/net/dsa/Makefile
|
||||
+++ b/net/dsa/Makefile
|
||||
@@ -1,6 +1,7 @@
|
||||
# tagging formats
|
||||
obj-$(CONFIG_NET_DSA_TAG_DSA) += tag_dsa.o
|
||||
obj-$(CONFIG_NET_DSA_TAG_EDSA) += tag_edsa.o
|
||||
+obj-$(CONFIG_NET_DSA_TAG_QINQ) += tag_qinq.o
|
||||
obj-$(CONFIG_NET_DSA_TAG_TRAILER) += tag_trailer.o
|
||||
|
||||
# switch drivers
|
||||
--- a/net/dsa/slave.c
|
||||
+++ b/net/dsa/slave.c
|
||||
@@ -321,6 +321,19 @@ static const struct net_device_ops edsa_
|
||||
.ndo_do_ioctl = dsa_slave_ioctl,
|
||||
};
|
||||
#endif
|
||||
+#ifdef CONFIG_NET_DSA_TAG_QINQ
|
||||
+static const struct net_device_ops qinq_netdev_ops = {
|
||||
+ .ndo_init = dsa_slave_init,
|
||||
+ .ndo_open = dsa_slave_open,
|
||||
+ .ndo_stop = dsa_slave_close,
|
||||
+ .ndo_start_xmit = qinq_xmit,
|
||||
+ .ndo_change_rx_flags = dsa_slave_change_rx_flags,
|
||||
+ .ndo_set_rx_mode = dsa_slave_set_rx_mode,
|
||||
+ .ndo_set_multicast_list = dsa_slave_set_rx_mode,
|
||||
+ .ndo_set_mac_address = dsa_slave_set_mac_address,
|
||||
+ .ndo_do_ioctl = dsa_slave_ioctl,
|
||||
+};
|
||||
+#endif
|
||||
#ifdef CONFIG_NET_DSA_TAG_TRAILER
|
||||
static const struct net_device_ops trailer_netdev_ops = {
|
||||
.ndo_init = dsa_slave_init,
|
||||
@@ -366,6 +379,11 @@ dsa_slave_create(struct dsa_switch *ds,
|
||||
slave_dev->netdev_ops = &edsa_netdev_ops;
|
||||
break;
|
||||
#endif
|
||||
+#ifdef CONFIG_NET_DSA_TAG_QINQ
|
||||
+ case htons(ETH_P_QINQ):
|
||||
+ slave_dev->netdev_ops = &qinq_netdev_ops;
|
||||
+ break;
|
||||
+#endif
|
||||
#ifdef CONFIG_NET_DSA_TAG_TRAILER
|
||||
case htons(ETH_P_TRAILER):
|
||||
slave_dev->netdev_ops = &trailer_netdev_ops;
|
||||
@@ -0,0 +1,28 @@
|
||||
--- a/net/dsa/Kconfig
|
||||
+++ b/net/dsa/Kconfig
|
||||
@@ -29,6 +29,15 @@ config NET_DSA_TAG_QINQ
|
||||
|
||||
|
||||
# switch drivers
|
||||
+config NET_DSA_AR7240
|
||||
+ bool "Atheros AR7240 built-in ethernet switch support"
|
||||
+ depends on ATHEROS_AR71XX
|
||||
+ default n
|
||||
+ select NET_DSA_TAG_QINQ
|
||||
+ ---help---
|
||||
+ This enables support for the built-in ethernet switch of the
|
||||
+ Atheros AR7240 SoC.
|
||||
+
|
||||
config NET_DSA_MV88E6XXX
|
||||
bool
|
||||
default n
|
||||
--- a/net/dsa/Makefile
|
||||
+++ b/net/dsa/Makefile
|
||||
@@ -5,6 +5,7 @@ obj-$(CONFIG_NET_DSA_TAG_QINQ) += tag_qi
|
||||
obj-$(CONFIG_NET_DSA_TAG_TRAILER) += tag_trailer.o
|
||||
|
||||
# switch drivers
|
||||
+obj-$(CONFIG_NET_DSA_AR7240) += ar7240.o
|
||||
obj-$(CONFIG_NET_DSA_MV88E6XXX) += mv88e6xxx.o
|
||||
obj-$(CONFIG_NET_DSA_MV88E6060) += mv88e6060.o
|
||||
obj-$(CONFIG_NET_DSA_MV88E6063) += mv88e6063.o
|
||||
@@ -6,7 +6,7 @@
|
||||
|
||||
+config MTD_NAND_RB4XX
|
||||
+ tristate "NAND flash driver for RouterBoard 4xx series"
|
||||
+ depends on MTD_NAND && ATHEROS_AR71XX
|
||||
+ depends on MTD_NAND && AR71XX_MACH_RB4XX
|
||||
+
|
||||
endif # MTD_NAND
|
||||
--- a/drivers/mtd/nand/Makefile
|
||||
|
||||
@@ -0,0 +1,23 @@
|
||||
--- a/drivers/leds/Kconfig
|
||||
+++ b/drivers/leds/Kconfig
|
||||
@@ -243,6 +243,10 @@ config LEDS_WNDR3700_USB
|
||||
This option enables support for the USB LED found on the
|
||||
NETGEAR WNDR3700 board.
|
||||
|
||||
+config LEDS_RB750
|
||||
+ tristate "LED driver for the Mikrotik RouterBOARD 750"
|
||||
+ depends on LEDS_CLASS && AR71XX_MACH_RB750
|
||||
+
|
||||
comment "LED Triggers"
|
||||
|
||||
config LEDS_TRIGGERS
|
||||
--- a/drivers/leds/Makefile
|
||||
+++ b/drivers/leds/Makefile
|
||||
@@ -30,6 +30,7 @@ obj-$(CONFIG_LEDS_WM831X_STATUS) += leds
|
||||
obj-$(CONFIG_LEDS_WM8350) += leds-wm8350.o
|
||||
obj-$(CONFIG_LEDS_PWM) += leds-pwm.o
|
||||
obj-${CONFIG_LEDS_WNDR3700_USB} += leds-wndr3700-usb.o
|
||||
+obj-${CONFIG_LEDS_RB750} += leds-rb750.o
|
||||
|
||||
# LED SPI Drivers
|
||||
obj-$(CONFIG_LEDS_DAC124S085) += leds-dac124s085.o
|
||||
@@ -0,0 +1,21 @@
|
||||
--- a/drivers/mtd/nand/Kconfig
|
||||
+++ b/drivers/mtd/nand/Kconfig
|
||||
@@ -486,4 +486,8 @@ config MTD_NAND_RB4XX
|
||||
tristate "NAND flash driver for RouterBoard 4xx series"
|
||||
depends on MTD_NAND && AR71XX_MACH_RB4XX
|
||||
|
||||
+config MTD_NAND_RB750
|
||||
+ tristate "NAND flash driver for the RouterBoard 750"
|
||||
+ depends on MTD_NAND && AR71XX_MACH_RB750
|
||||
+
|
||||
endif # MTD_NAND
|
||||
--- a/drivers/mtd/nand/Makefile
|
||||
+++ b/drivers/mtd/nand/Makefile
|
||||
@@ -32,6 +32,7 @@ obj-$(CONFIG_MTD_NAND_PXA3xx) += pxa3xx
|
||||
obj-$(CONFIG_MTD_NAND_TMIO) += tmio_nand.o
|
||||
obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o
|
||||
obj-$(CONFIG_MTD_NAND_RB4XX) += rb4xx_nand.o
|
||||
+obj-$(CONFIG_MTD_NAND_RB750) += rb750_nand.o
|
||||
obj-$(CONFIG_MTD_ALAUDA) += alauda.o
|
||||
obj-$(CONFIG_MTD_NAND_PASEMI) += pasemi_nand.o
|
||||
obj-$(CONFIG_MTD_NAND_ORION) += orion_nand.o
|
||||
@@ -0,0 +1,50 @@
|
||||
--- a/arch/mips/Makefile
|
||||
+++ b/arch/mips/Makefile
|
||||
@@ -637,6 +637,13 @@ else
|
||||
load-$(CONFIG_CPU_CAVIUM_OCTEON) += 0xffffffff81100000
|
||||
endif
|
||||
|
||||
+#
|
||||
+# Atheros AR71xx
|
||||
+#
|
||||
+core-$(CONFIG_ATHEROS_AR71XX) += arch/mips/ar71xx/
|
||||
+cflags-$(CONFIG_ATHEROS_AR71XX) += -I$(srctree)/arch/mips/include/asm/mach-ar71xx
|
||||
+load-$(CONFIG_ATHEROS_AR71XX) += 0xffffffff80060000
|
||||
+
|
||||
# temporary until string.h is fixed
|
||||
cflags-y += -ffreestanding
|
||||
|
||||
--- a/arch/mips/Kconfig
|
||||
+++ b/arch/mips/Kconfig
|
||||
@@ -48,6 +48,23 @@ config AR7
|
||||
Support for the Texas Instruments AR7 System-on-a-Chip
|
||||
family: TNETD7100, 7200 and 7300.
|
||||
|
||||
+config ATHEROS_AR71XX
|
||||
+ bool "Atheros AR71xx based boards"
|
||||
+ select CEVT_R4K
|
||||
+ select CSRC_R4K
|
||||
+ select DMA_NONCOHERENT
|
||||
+ select HW_HAS_PCI
|
||||
+ select IRQ_CPU
|
||||
+ select ARCH_REQUIRE_GPIOLIB
|
||||
+ select SYS_HAS_CPU_MIPS32_R1
|
||||
+ select SYS_HAS_CPU_MIPS32_R2
|
||||
+ select SYS_SUPPORTS_32BIT_KERNEL
|
||||
+ select SYS_SUPPORTS_BIG_ENDIAN
|
||||
+ select SYS_HAS_EARLY_PRINTK
|
||||
+ select MIPS_MACHINE
|
||||
+ help
|
||||
+ Support for Atheros AR71xx based boards.
|
||||
+
|
||||
config BCM47XX
|
||||
bool "BCM47XX based boards"
|
||||
select CEVT_R4K
|
||||
@@ -682,6 +699,7 @@ config CAVIUM_OCTEON_REFERENCE_BOARD
|
||||
endchoice
|
||||
|
||||
source "arch/mips/alchemy/Kconfig"
|
||||
+source "arch/mips/ar71xx/Kconfig"
|
||||
source "arch/mips/bcm63xx/Kconfig"
|
||||
source "arch/mips/jazz/Kconfig"
|
||||
source "arch/mips/lasat/Kconfig"
|
||||
@@ -0,0 +1,10 @@
|
||||
--- a/arch/mips/pci/Makefile
|
||||
+++ b/arch/mips/pci/Makefile
|
||||
@@ -18,6 +18,7 @@ obj-$(CONFIG_PCI_TX4927) += ops-tx4927.o
|
||||
obj-$(CONFIG_BCM47XX) += pci-bcm47xx.o
|
||||
obj-$(CONFIG_BCM63XX) += pci-bcm63xx.o fixup-bcm63xx.o \
|
||||
ops-bcm63xx.o
|
||||
+obj-$(CONFIG_ATHEROS_AR71XX) += pci-ar71xx.o pci-ar724x.o
|
||||
|
||||
#
|
||||
# These are still pretty much in the old state, watch, go blind.
|
||||
@@ -0,0 +1,58 @@
|
||||
--- a/drivers/usb/host/Kconfig
|
||||
+++ b/drivers/usb/host/Kconfig
|
||||
@@ -109,6 +109,13 @@ config XPS_USB_HCD_XILINX
|
||||
support both high speed and full speed devices, or high speed
|
||||
devices only.
|
||||
|
||||
+config USB_EHCI_AR71XX
|
||||
+ bool "USB EHCI support for AR71xx"
|
||||
+ depends on USB_EHCI_HCD && ATHEROS_AR71XX
|
||||
+ default y
|
||||
+ help
|
||||
+ Support for Atheros AR71xx built-in EHCI controller
|
||||
+
|
||||
config USB_EHCI_FSL
|
||||
bool "Support for Freescale on-chip EHCI USB controller"
|
||||
depends on USB_EHCI_HCD && FSL_SOC
|
||||
@@ -207,6 +214,13 @@ config USB_OHCI_HCD
|
||||
To compile this driver as a module, choose M here: the
|
||||
module will be called ohci-hcd.
|
||||
|
||||
+config USB_OHCI_AR71XX
|
||||
+ bool "USB OHCI support for Atheros AR71xx"
|
||||
+ depends on USB_OHCI_HCD && ATHEROS_AR71XX
|
||||
+ default y
|
||||
+ help
|
||||
+ Support for Atheros AR71xx built-in OHCI controller
|
||||
+
|
||||
config USB_OHCI_HCD_PPC_SOC
|
||||
bool "OHCI support for on-chip PPC USB controller"
|
||||
depends on USB_OHCI_HCD && (STB03xxx || PPC_MPC52xx)
|
||||
--- a/drivers/usb/host/ehci-hcd.c
|
||||
+++ b/drivers/usb/host/ehci-hcd.c
|
||||
@@ -1158,6 +1158,11 @@ MODULE_LICENSE ("GPL");
|
||||
#define PLATFORM_DRIVER ehci_atmel_driver
|
||||
#endif
|
||||
|
||||
+#ifdef CONFIG_USB_EHCI_AR71XX
|
||||
+#include "ehci-ar71xx.c"
|
||||
+#define PLATFORM_DRIVER ehci_ar71xx_driver
|
||||
+#endif
|
||||
+
|
||||
#if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
|
||||
!defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER)
|
||||
#error "missing bus glue for ehci-hcd"
|
||||
--- a/drivers/usb/host/ohci-hcd.c
|
||||
+++ b/drivers/usb/host/ohci-hcd.c
|
||||
@@ -1085,6 +1085,11 @@ MODULE_LICENSE ("GPL");
|
||||
#define TMIO_OHCI_DRIVER ohci_hcd_tmio_driver
|
||||
#endif
|
||||
|
||||
+#ifdef CONFIG_USB_OHCI_AR71XX
|
||||
+#include "ohci-ar71xx.c"
|
||||
+#define PLATFORM_DRIVER ohci_hcd_ar71xx_driver
|
||||
+#endif
|
||||
+
|
||||
#if !defined(PCI_DRIVER) && \
|
||||
!defined(PLATFORM_DRIVER) && \
|
||||
!defined(OF_PLATFORM_DRIVER) && \
|
||||
@@ -0,0 +1,26 @@
|
||||
--- a/drivers/spi/Kconfig
|
||||
+++ b/drivers/spi/Kconfig
|
||||
@@ -53,6 +53,13 @@ if SPI_MASTER
|
||||
|
||||
comment "SPI Master Controller Drivers"
|
||||
|
||||
+config SPI_AR71XX
|
||||
+ tristate "Atheros AR71xx SPI Controller"
|
||||
+ depends on SPI_MASTER && ATHEROS_AR71XX
|
||||
+ select SPI_BITBANG
|
||||
+ help
|
||||
+ This is the SPI contoller driver for Atheros AR71xx.
|
||||
+
|
||||
config SPI_ATMEL
|
||||
tristate "Atmel SPI Controller"
|
||||
depends on (ARCH_AT91 || AVR32)
|
||||
--- a/drivers/spi/Makefile
|
||||
+++ b/drivers/spi/Makefile
|
||||
@@ -11,6 +11,7 @@ endif
|
||||
obj-$(CONFIG_SPI_MASTER) += spi.o
|
||||
|
||||
# SPI master controller drivers (bus)
|
||||
+obj-$(CONFIG_SPI_AR71XX) += ar71xx_spi.o
|
||||
obj-$(CONFIG_SPI_ATMEL) += atmel_spi.o
|
||||
obj-$(CONFIG_SPI_BFIN) += spi_bfin5xx.o
|
||||
obj-$(CONFIG_SPI_BITBANG) += spi_bitbang.o
|
||||
@@ -0,0 +1,21 @@
|
||||
--- a/drivers/net/Kconfig
|
||||
+++ b/drivers/net/Kconfig
|
||||
@@ -2128,6 +2128,8 @@ config ACENIC_OMIT_TIGON_I
|
||||
|
||||
The safe and default value for this is N.
|
||||
|
||||
+source drivers/net/ag71xx/Kconfig
|
||||
+
|
||||
config DL2K
|
||||
tristate "DL2000/TC902x-based Gigabit Ethernet support"
|
||||
depends on PCI
|
||||
--- a/drivers/net/Makefile
|
||||
+++ b/drivers/net/Makefile
|
||||
@@ -106,6 +106,7 @@ obj-$(CONFIG_STMMAC_ETH) += stmmac/
|
||||
# end link order section
|
||||
#
|
||||
|
||||
+obj-$(CONFIG_AG71XX) += ag71xx/
|
||||
obj-$(CONFIG_SUNDANCE) += sundance.o
|
||||
obj-$(CONFIG_HAMACHI) += hamachi.o
|
||||
obj-$(CONFIG_NET) += Space.o loopback.o
|
||||
@@ -0,0 +1,26 @@
|
||||
--- a/drivers/watchdog/Kconfig
|
||||
+++ b/drivers/watchdog/Kconfig
|
||||
@@ -840,6 +840,13 @@ config TXX9_WDT
|
||||
help
|
||||
Hardware driver for the built-in watchdog timer on TXx9 MIPS SoCs.
|
||||
|
||||
+config AR71XX_WDT
|
||||
+ tristate "Atheros AR71xx Watchdog Timer"
|
||||
+ depends on ATHEROS_AR71XX
|
||||
+ help
|
||||
+ Hardware driver for the built-in watchdog timer on the Atheros
|
||||
+ AR71xx SoCs.
|
||||
+
|
||||
# PARISC Architecture
|
||||
|
||||
# POWERPC Architecture
|
||||
--- a/drivers/watchdog/Makefile
|
||||
+++ b/drivers/watchdog/Makefile
|
||||
@@ -112,6 +112,7 @@ obj-$(CONFIG_PNX833X_WDT) += pnx833x_wdt
|
||||
obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o
|
||||
obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
|
||||
obj-$(CONFIG_TXX9_WDT) += txx9wdt.o
|
||||
+obj-$(CONFIG_AR71XX_WDT) += ar71xx_wdt.o
|
||||
|
||||
# PARISC Architecture
|
||||
|
||||
@@ -0,0 +1,26 @@
|
||||
--- a/drivers/mtd/maps/Kconfig
|
||||
+++ b/drivers/mtd/maps/Kconfig
|
||||
@@ -257,6 +257,13 @@ config MTD_ALCHEMY
|
||||
help
|
||||
Flash memory access on AMD Alchemy Pb/Db/RDK Reference Boards
|
||||
|
||||
+config MTD_AR91XX_FLASH
|
||||
+ tristate "Atheros AR91xx parallel flash support"
|
||||
+ depends on ATHEROS_AR71XX
|
||||
+ select MTD_COMPLEX_MAPPINGS
|
||||
+ help
|
||||
+ Parallel flash driver for the Atheros AR91xx based boards.
|
||||
+
|
||||
config MTD_DILNETPC
|
||||
tristate "CFI Flash device mapped on DIL/Net PC"
|
||||
depends on X86 && MTD_CONCAT && MTD_PARTITIONS && MTD_CFI_INTELEXT && BROKEN
|
||||
--- a/drivers/mtd/maps/Makefile
|
||||
+++ b/drivers/mtd/maps/Makefile
|
||||
@@ -41,6 +41,7 @@ obj-$(CONFIG_MTD_DBOX2) += dbox2-flash.
|
||||
obj-$(CONFIG_MTD_SOLUTIONENGINE)+= solutionengine.o
|
||||
obj-$(CONFIG_MTD_PCI) += pci.o
|
||||
obj-$(CONFIG_MTD_ALCHEMY) += alchemy-flash.o
|
||||
+obj-$(CONFIG_MTD_AR91XX_FLASH) += ar91xx_flash.o
|
||||
obj-$(CONFIG_MTD_AUTCPU12) += autcpu12-nvram.o
|
||||
obj-$(CONFIG_MTD_EDB7312) += edb7312.o
|
||||
obj-$(CONFIG_MTD_IMPA7) += impa7.o
|
||||
@@ -0,0 +1,24 @@
|
||||
--- a/drivers/net/phy/Kconfig
|
||||
+++ b/drivers/net/phy/Kconfig
|
||||
@@ -114,6 +114,11 @@ config RTL8306_PHY
|
||||
tristate "Driver for Realtek RTL8306S switches"
|
||||
select SWCONFIG
|
||||
|
||||
+config MICREL_PHY
|
||||
+ tristate "Drivers for Micrel/Kendin PHYs"
|
||||
+ ---help---
|
||||
+ Currently has a driver for the KSZ8041
|
||||
+
|
||||
config FIXED_PHY
|
||||
bool "Driver for MDIO Bus/PHY emulation with fixed speed/link PHYs"
|
||||
depends on PHYLIB=y
|
||||
--- a/drivers/net/phy/Makefile
|
||||
+++ b/drivers/net/phy/Makefile
|
||||
@@ -24,6 +24,7 @@ obj-$(CONFIG_RTL8366_SMI) += rtl8366_smi
|
||||
obj-$(CONFIG_RTL8366S_PHY) += rtl8366s.o
|
||||
obj-$(CONFIG_RTL8366RB_PHY) += rtl8366rb.o
|
||||
obj-$(CONFIG_LSI_ET1011C_PHY) += et1011c.o
|
||||
+obj-$(CONFIG_MICREL) += micrel.o
|
||||
obj-$(CONFIG_FIXED_PHY) += fixed.o
|
||||
obj-$(CONFIG_MDIO_BITBANG) += mdio-bitbang.o
|
||||
obj-$(CONFIG_MDIO_GPIO) += mdio-gpio.o
|
||||
@@ -0,0 +1,19 @@
|
||||
--- a/drivers/mtd/devices/m25p80.c
|
||||
+++ b/drivers/mtd/devices/m25p80.c
|
||||
@@ -922,6 +922,16 @@ static int __devinit m25p_probe(struct s
|
||||
part_probes, &parts, 0);
|
||||
}
|
||||
|
||||
+#ifdef CONFIG_MTD_MYLOADER_PARTS
|
||||
+ if (nr_parts <= 0) {
|
||||
+ static const char *part_probes[]
|
||||
+ = { "MyLoader", NULL, };
|
||||
+
|
||||
+ nr_parts = parse_mtd_partitions(&flash->mtd,
|
||||
+ part_probes, &parts, 0);
|
||||
+ }
|
||||
+#endif
|
||||
+
|
||||
if (nr_parts <= 0 && data && data->parts) {
|
||||
parts = data->parts;
|
||||
nr_parts = data->nr_parts;
|
||||
@@ -0,0 +1,18 @@
|
||||
--- a/drivers/mtd/devices/m25p80.c
|
||||
+++ b/drivers/mtd/devices/m25p80.c
|
||||
@@ -932,6 +932,15 @@ static int __devinit m25p_probe(struct s
|
||||
}
|
||||
#endif
|
||||
|
||||
+#ifdef CONFIG_MTD_REDBOOT_PARTS
|
||||
+ if (nr_parts <= 0) {
|
||||
+ static const char *part_probes[]
|
||||
+ = { "RedBoot", NULL, };
|
||||
+
|
||||
+ nr_parts = parse_mtd_partitions(&flash->mtd,
|
||||
+ part_probes, &parts, 0);
|
||||
+ }
|
||||
+#endif
|
||||
if (nr_parts <= 0 && data && data->parts) {
|
||||
parts = data->parts;
|
||||
nr_parts = data->nr_parts;
|
||||
@@ -0,0 +1,29 @@
|
||||
--- a/drivers/mtd/chips/jedec_probe.c
|
||||
+++ b/drivers/mtd/chips/jedec_probe.c
|
||||
@@ -166,6 +166,7 @@
|
||||
#define SST39LF160 0x2782
|
||||
#define SST39VF1601 0x234b
|
||||
#define SST39VF3201 0x235b
|
||||
+#define SST39VF6401B 0x236d
|
||||
#define SST39LF512 0x00D4
|
||||
#define SST39LF010 0x00D5
|
||||
#define SST39LF020 0x00D6
|
||||
@@ -1556,6 +1557,18 @@ static const struct amd_flash_info jedec
|
||||
ERASEINFO(0x10000,64),
|
||||
}
|
||||
}, {
|
||||
+ .mfr_id = MANUFACTURER_SST,
|
||||
+ .dev_id = SST39VF6401B,
|
||||
+ .name = "SST 39VF6401B",
|
||||
+ .devtypes = CFI_DEVICETYPE_X16,
|
||||
+ .uaddr = MTD_UADDR_0xAAAA_0x5555,
|
||||
+ .dev_size = SIZE_8MiB,
|
||||
+ .cmd_set = P_ID_AMD_STD,
|
||||
+ .nr_regions = 1,
|
||||
+ .regions = {
|
||||
+ ERASEINFO(0x10000,128)
|
||||
+ }
|
||||
+ }, {
|
||||
.mfr_id = MANUFACTURER_ST,
|
||||
.dev_id = M29F800AB,
|
||||
.name = "ST M29F800AB",
|
||||
@@ -0,0 +1,69 @@
|
||||
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
|
||||
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
|
||||
@@ -1130,8 +1130,8 @@ static int __xipram do_write_oneword(str
|
||||
break;
|
||||
}
|
||||
|
||||
- if (chip_ready(map, adr))
|
||||
- break;
|
||||
+ if (chip_good(map, adr, datum))
|
||||
+ goto enable_xip;
|
||||
|
||||
/* Latency issues. Drop the lock, wait a while and retry */
|
||||
UDELAY(map, chip, adr, 1);
|
||||
@@ -1147,6 +1147,8 @@ static int __xipram do_write_oneword(str
|
||||
|
||||
ret = -EIO;
|
||||
}
|
||||
+
|
||||
+ enable_xip:
|
||||
xip_enable(map, chip, adr);
|
||||
op_done:
|
||||
chip->state = FL_READY;
|
||||
@@ -1493,7 +1495,6 @@ static int cfi_amdstd_write_buffers(stru
|
||||
return 0;
|
||||
}
|
||||
|
||||
-
|
||||
/*
|
||||
* Handle devices with one erase region, that only implement
|
||||
* the chip erase command.
|
||||
@@ -1557,8 +1558,8 @@ static int __xipram do_erase_chip(struct
|
||||
chip->erase_suspended = 0;
|
||||
}
|
||||
|
||||
- if (chip_ready(map, adr))
|
||||
- break;
|
||||
+ if (chip_good(map, adr, map_word_ff(map)))
|
||||
+ goto op_done;
|
||||
|
||||
if (time_after(jiffies, timeo)) {
|
||||
printk(KERN_WARNING "MTD %s(): software timeout\n",
|
||||
@@ -1578,6 +1579,7 @@ static int __xipram do_erase_chip(struct
|
||||
ret = -EIO;
|
||||
}
|
||||
|
||||
+ op_done:
|
||||
chip->state = FL_READY;
|
||||
xip_enable(map, chip, adr);
|
||||
put_chip(map, chip, adr);
|
||||
@@ -1645,9 +1647,9 @@ static int __xipram do_erase_oneblock(st
|
||||
chip->erase_suspended = 0;
|
||||
}
|
||||
|
||||
- if (chip_ready(map, adr)) {
|
||||
+ if (chip_good(map, adr, map_word_ff(map))) {
|
||||
xip_enable(map, chip, adr);
|
||||
- break;
|
||||
+ goto op_done;
|
||||
}
|
||||
|
||||
if (time_after(jiffies, timeo)) {
|
||||
@@ -1669,6 +1671,7 @@ static int __xipram do_erase_oneblock(st
|
||||
ret = -EIO;
|
||||
}
|
||||
|
||||
+ op_done:
|
||||
chip->state = FL_READY;
|
||||
put_chip(map, chip, adr);
|
||||
spin_unlock(chip->mutex);
|
||||
@@ -0,0 +1,44 @@
|
||||
--- a/drivers/mtd/devices/m25p80.c
|
||||
+++ b/drivers/mtd/devices/m25p80.c
|
||||
@@ -941,6 +941,16 @@ static int __devinit m25p_probe(struct s
|
||||
part_probes, &parts, 0);
|
||||
}
|
||||
#endif
|
||||
+
|
||||
+#ifdef CONFIG_MTD_WRT160NL_PARTS
|
||||
+ if (nr_parts <= 0) {
|
||||
+ static const char *part_probes[]
|
||||
+ = { "wrt160nl", NULL, };
|
||||
+
|
||||
+ nr_parts = parse_mtd_partitions(&flash->mtd,
|
||||
+ part_probes, &parts, 0);
|
||||
+ }
|
||||
+#endif
|
||||
if (nr_parts <= 0 && data && data->parts) {
|
||||
parts = data->parts;
|
||||
nr_parts = data->nr_parts;
|
||||
--- a/drivers/mtd/Kconfig
|
||||
+++ b/drivers/mtd/Kconfig
|
||||
@@ -181,6 +181,12 @@ config MTD_AR7_PARTS
|
||||
---help---
|
||||
TI AR7 partitioning support
|
||||
|
||||
+config MTD_WRT160NL_PARTS
|
||||
+ tristate "Linksys WRT160NL partitioning support"
|
||||
+ depends on MTD_PARTITIONS && AR71XX_MACH_WRT160NL
|
||||
+ ---help---
|
||||
+ Linksys WRT160NL partitioning support
|
||||
+
|
||||
config MTD_MYLOADER_PARTS
|
||||
tristate "MyLoader partition parsing"
|
||||
depends on MTD_PARTITIONS && (ADM5120 || ATHEROS_AR231X || ATHEROS_AR71XX)
|
||||
--- a/drivers/mtd/Makefile
|
||||
+++ b/drivers/mtd/Makefile
|
||||
@@ -12,6 +12,7 @@ obj-$(CONFIG_MTD_REDBOOT_PARTS) += redbo
|
||||
obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o
|
||||
obj-$(CONFIG_MTD_AFS_PARTS) += afs.o
|
||||
obj-$(CONFIG_MTD_AR7_PARTS) += ar7part.o
|
||||
+obj-$(CONFIG_MTD_WRT160NL_PARTS) += wrt160nl_part.o
|
||||
obj-$(CONFIG_MTD_OF_PARTS) += ofpart.o
|
||||
obj-$(CONFIG_MTD_MYLOADER_PARTS) += myloader.o
|
||||
|
||||
@@ -0,0 +1,22 @@
|
||||
--- a/drivers/usb/host/ehci-q.c
|
||||
+++ b/drivers/usb/host/ehci-q.c
|
||||
@@ -1194,6 +1194,9 @@ static void end_unlink_async (struct ehc
|
||||
ehci->reclaim = NULL;
|
||||
start_unlink_async (ehci, next);
|
||||
}
|
||||
+
|
||||
+ if (ehci->has_synopsys_hc_bug)
|
||||
+ writel((u32)ehci->async->qh_dma, &ehci->regs->async_next);
|
||||
}
|
||||
|
||||
/* makes sure the async qh will become idle */
|
||||
--- a/drivers/usb/host/ehci.h
|
||||
+++ b/drivers/usb/host/ehci.h
|
||||
@@ -129,6 +129,7 @@ struct ehci_hcd { /* one per controlle
|
||||
unsigned has_amcc_usb23:1;
|
||||
unsigned need_io_watchdog:1;
|
||||
unsigned broken_periodic:1;
|
||||
+ unsigned has_synopsys_hc_bug:1; /* Synopsys HC */
|
||||
|
||||
/* required for usb32 quirk */
|
||||
#define OHCI_CTRL_HCFS (3 << 6)
|
||||
@@ -0,0 +1,61 @@
|
||||
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
|
||||
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
|
||||
@@ -39,7 +39,7 @@
|
||||
#include <linux/mtd/xip.h>
|
||||
|
||||
#define AMD_BOOTLOC_BUG
|
||||
-#define FORCE_WORD_WRITE 0
|
||||
+#define FORCE_WORD_WRITE 1
|
||||
|
||||
#define MAX_WORD_RETRIES 3
|
||||
|
||||
@@ -55,7 +55,9 @@
|
||||
|
||||
static int cfi_amdstd_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
|
||||
static int cfi_amdstd_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
|
||||
+#if !FORCE_WORD_WRITE
|
||||
static int cfi_amdstd_write_buffers(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
|
||||
+#endif
|
||||
static int cfi_amdstd_erase_chip(struct mtd_info *, struct erase_info *);
|
||||
static int cfi_amdstd_erase_varsize(struct mtd_info *, struct erase_info *);
|
||||
static void cfi_amdstd_sync (struct mtd_info *);
|
||||
@@ -190,6 +192,7 @@ static void fixup_amd_bootblock(struct m
|
||||
}
|
||||
#endif
|
||||
|
||||
+#if !FORCE_WORD_WRITE
|
||||
static void fixup_use_write_buffers(struct mtd_info *mtd, void *param)
|
||||
{
|
||||
struct map_info *map = mtd->priv;
|
||||
@@ -199,6 +202,7 @@ static void fixup_use_write_buffers(stru
|
||||
mtd->write = cfi_amdstd_write_buffers;
|
||||
}
|
||||
}
|
||||
+#endif /* !FORCE_WORD_WRITE */
|
||||
|
||||
/* Atmel chips don't use the same PRI format as AMD chips */
|
||||
static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
|
||||
@@ -1304,6 +1308,7 @@ static int cfi_amdstd_write_words(struct
|
||||
/*
|
||||
* FIXME: interleaved mode not tested, and probably not supported!
|
||||
*/
|
||||
+#if !FORCE_WORD_WRITE
|
||||
static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip,
|
||||
unsigned long adr, const u_char *buf,
|
||||
int len)
|
||||
@@ -1415,7 +1420,6 @@ static int __xipram do_write_buffer(stru
|
||||
return ret;
|
||||
}
|
||||
|
||||
-
|
||||
static int cfi_amdstd_write_buffers(struct mtd_info *mtd, loff_t to, size_t len,
|
||||
size_t *retlen, const u_char *buf)
|
||||
{
|
||||
@@ -1494,6 +1498,7 @@ static int cfi_amdstd_write_buffers(stru
|
||||
|
||||
return 0;
|
||||
}
|
||||
+#endif /* !FORCE_WORD_WRITE */
|
||||
|
||||
/*
|
||||
* Handle devices with one erase region, that only implement
|
||||
@@ -0,0 +1,11 @@
|
||||
--- a/net/dsa/tag_trailer.c
|
||||
+++ b/net/dsa/tag_trailer.c
|
||||
@@ -86,7 +86,7 @@ static int trailer_rcv(struct sk_buff *s
|
||||
|
||||
trailer = skb_tail_pointer(skb) - 4;
|
||||
if (trailer[0] != 0x80 || (trailer[1] & 0xf8) != 0x00 ||
|
||||
- (trailer[3] & 0xef) != 0x00 || trailer[3] != 0x00)
|
||||
+ (trailer[2] & 0xef) != 0x00 || (trailer[3] & 0xfe) != 0x00)
|
||||
goto out_drop;
|
||||
|
||||
source_port = trailer[1] & 7;
|
||||
@@ -0,0 +1,26 @@
|
||||
--- a/net/dsa/Kconfig
|
||||
+++ b/net/dsa/Kconfig
|
||||
@@ -36,6 +36,13 @@ config NET_DSA_MV88E6060
|
||||
This enables support for the Marvell 88E6060 ethernet switch
|
||||
chip.
|
||||
|
||||
+config NET_DSA_MV88E6063
|
||||
+ bool "Marvell 88E6063 ethernet switch chip support"
|
||||
+ select NET_DSA_TAG_TRAILER
|
||||
+ ---help---
|
||||
+ This enables support for the Marvell 88E6063 ethernet switch
|
||||
+ chip
|
||||
+
|
||||
config NET_DSA_MV88E6XXX_NEED_PPU
|
||||
bool
|
||||
default n
|
||||
--- a/net/dsa/Makefile
|
||||
+++ b/net/dsa/Makefile
|
||||
@@ -6,6 +6,7 @@ obj-$(CONFIG_NET_DSA_TAG_TRAILER) += tag
|
||||
# switch drivers
|
||||
obj-$(CONFIG_NET_DSA_MV88E6XXX) += mv88e6xxx.o
|
||||
obj-$(CONFIG_NET_DSA_MV88E6060) += mv88e6060.o
|
||||
+obj-$(CONFIG_NET_DSA_MV88E6063) += mv88e6063.o
|
||||
obj-$(CONFIG_NET_DSA_MV88E6123_61_65) += mv88e6123_61_65.o
|
||||
obj-$(CONFIG_NET_DSA_MV88E6131) += mv88e6131.o
|
||||
|
||||
@@ -0,0 +1,79 @@
|
||||
--- a/include/linux/if_ether.h
|
||||
+++ b/include/linux/if_ether.h
|
||||
@@ -81,6 +81,7 @@
|
||||
#define ETH_P_1588 0x88F7 /* IEEE 1588 Timesync */
|
||||
#define ETH_P_FCOE 0x8906 /* Fibre Channel over Ethernet */
|
||||
#define ETH_P_FIP 0x8914 /* FCoE Initialization Protocol */
|
||||
+#define ETH_P_QINQ 0x9100 /* QinQ VLAN Stacking Protocol */
|
||||
#define ETH_P_EDSA 0xDADA /* Ethertype DSA [ NOT AN OFFICIALLY REGISTERED ID ] */
|
||||
|
||||
/*
|
||||
--- a/net/dsa/dsa_priv.h
|
||||
+++ b/net/dsa/dsa_priv.h
|
||||
@@ -174,6 +174,9 @@ netdev_tx_t dsa_xmit(struct sk_buff *skb
|
||||
/* tag_edsa.c */
|
||||
netdev_tx_t edsa_xmit(struct sk_buff *skb, struct net_device *dev);
|
||||
|
||||
+/* tag_qinq.c */
|
||||
+netdev_tx_t qinq_xmit(struct sk_buff *skb, struct net_device *dev);
|
||||
+
|
||||
/* tag_trailer.c */
|
||||
netdev_tx_t trailer_xmit(struct sk_buff *skb, struct net_device *dev);
|
||||
|
||||
--- a/net/dsa/Kconfig
|
||||
+++ b/net/dsa/Kconfig
|
||||
@@ -23,6 +23,10 @@ config NET_DSA_TAG_TRAILER
|
||||
bool
|
||||
default n
|
||||
|
||||
+config NET_DSA_TAG_QINQ
|
||||
+ bool
|
||||
+ default y
|
||||
+
|
||||
|
||||
# switch drivers
|
||||
config NET_DSA_MV88E6XXX
|
||||
--- a/net/dsa/Makefile
|
||||
+++ b/net/dsa/Makefile
|
||||
@@ -1,6 +1,7 @@
|
||||
# tagging formats
|
||||
obj-$(CONFIG_NET_DSA_TAG_DSA) += tag_dsa.o
|
||||
obj-$(CONFIG_NET_DSA_TAG_EDSA) += tag_edsa.o
|
||||
+obj-$(CONFIG_NET_DSA_TAG_QINQ) += tag_qinq.o
|
||||
obj-$(CONFIG_NET_DSA_TAG_TRAILER) += tag_trailer.o
|
||||
|
||||
# switch drivers
|
||||
--- a/net/dsa/slave.c
|
||||
+++ b/net/dsa/slave.c
|
||||
@@ -321,6 +321,19 @@ static const struct net_device_ops edsa_
|
||||
.ndo_do_ioctl = dsa_slave_ioctl,
|
||||
};
|
||||
#endif
|
||||
+#ifdef CONFIG_NET_DSA_TAG_QINQ
|
||||
+static const struct net_device_ops qinq_netdev_ops = {
|
||||
+ .ndo_init = dsa_slave_init,
|
||||
+ .ndo_open = dsa_slave_open,
|
||||
+ .ndo_stop = dsa_slave_close,
|
||||
+ .ndo_start_xmit = qinq_xmit,
|
||||
+ .ndo_change_rx_flags = dsa_slave_change_rx_flags,
|
||||
+ .ndo_set_rx_mode = dsa_slave_set_rx_mode,
|
||||
+ .ndo_set_multicast_list = dsa_slave_set_rx_mode,
|
||||
+ .ndo_set_mac_address = dsa_slave_set_mac_address,
|
||||
+ .ndo_do_ioctl = dsa_slave_ioctl,
|
||||
+};
|
||||
+#endif
|
||||
#ifdef CONFIG_NET_DSA_TAG_TRAILER
|
||||
static const struct net_device_ops trailer_netdev_ops = {
|
||||
.ndo_init = dsa_slave_init,
|
||||
@@ -366,6 +379,11 @@ dsa_slave_create(struct dsa_switch *ds,
|
||||
slave_dev->netdev_ops = &edsa_netdev_ops;
|
||||
break;
|
||||
#endif
|
||||
+#ifdef CONFIG_NET_DSA_TAG_QINQ
|
||||
+ case htons(ETH_P_QINQ):
|
||||
+ slave_dev->netdev_ops = &qinq_netdev_ops;
|
||||
+ break;
|
||||
+#endif
|
||||
#ifdef CONFIG_NET_DSA_TAG_TRAILER
|
||||
case htons(ETH_P_TRAILER):
|
||||
slave_dev->netdev_ops = &trailer_netdev_ops;
|
||||
@@ -0,0 +1,28 @@
|
||||
--- a/net/dsa/Kconfig
|
||||
+++ b/net/dsa/Kconfig
|
||||
@@ -29,6 +29,15 @@ config NET_DSA_TAG_QINQ
|
||||
|
||||
|
||||
# switch drivers
|
||||
+config NET_DSA_AR7240
|
||||
+ bool "Atheros AR7240 built-in ethernet switch support"
|
||||
+ depends on ATHEROS_AR71XX
|
||||
+ default n
|
||||
+ select NET_DSA_TAG_QINQ
|
||||
+ ---help---
|
||||
+ This enables support for the built-in ethernet switch of the
|
||||
+ Atheros AR7240 SoC.
|
||||
+
|
||||
config NET_DSA_MV88E6XXX
|
||||
bool
|
||||
default n
|
||||
--- a/net/dsa/Makefile
|
||||
+++ b/net/dsa/Makefile
|
||||
@@ -5,6 +5,7 @@ obj-$(CONFIG_NET_DSA_TAG_QINQ) += tag_qi
|
||||
obj-$(CONFIG_NET_DSA_TAG_TRAILER) += tag_trailer.o
|
||||
|
||||
# switch drivers
|
||||
+obj-$(CONFIG_NET_DSA_AR7240) += ar7240.o
|
||||
obj-$(CONFIG_NET_DSA_MV88E6XXX) += mv88e6xxx.o
|
||||
obj-$(CONFIG_NET_DSA_MV88E6060) += mv88e6060.o
|
||||
obj-$(CONFIG_NET_DSA_MV88E6063) += mv88e6063.o
|
||||
@@ -0,0 +1,54 @@
|
||||
--- a/drivers/mtd/redboot.c
|
||||
+++ b/drivers/mtd/redboot.c
|
||||
@@ -60,31 +60,32 @@ static int parse_redboot_partitions(stru
|
||||
static char nullstring[] = "unallocated";
|
||||
#endif
|
||||
|
||||
+ buf = vmalloc(master->erasesize);
|
||||
+ if (!buf)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ restart:
|
||||
if ( directory < 0 ) {
|
||||
offset = master->size + directory * master->erasesize;
|
||||
- while (master->block_isbad &&
|
||||
+ while (master->block_isbad &&
|
||||
master->block_isbad(master, offset)) {
|
||||
if (!offset) {
|
||||
nogood:
|
||||
printk(KERN_NOTICE "Failed to find a non-bad block to check for RedBoot partition table\n");
|
||||
+ vfree(buf);
|
||||
return -EIO;
|
||||
}
|
||||
offset -= master->erasesize;
|
||||
}
|
||||
} else {
|
||||
offset = directory * master->erasesize;
|
||||
- while (master->block_isbad &&
|
||||
+ while (master->block_isbad &&
|
||||
master->block_isbad(master, offset)) {
|
||||
offset += master->erasesize;
|
||||
if (offset == master->size)
|
||||
goto nogood;
|
||||
}
|
||||
}
|
||||
- buf = vmalloc(master->erasesize);
|
||||
-
|
||||
- if (!buf)
|
||||
- return -ENOMEM;
|
||||
-
|
||||
printk(KERN_NOTICE "Searching for RedBoot partition table in %s at offset 0x%lx\n",
|
||||
master->name, offset);
|
||||
|
||||
@@ -156,6 +157,11 @@ static int parse_redboot_partitions(stru
|
||||
}
|
||||
if (i == numslots) {
|
||||
/* Didn't find it */
|
||||
+ if (offset + master->erasesize < master->size) {
|
||||
+ /* not at the end of the flash yet, maybe next block :) */
|
||||
+ directory++;
|
||||
+ goto restart;
|
||||
+ }
|
||||
printk(KERN_NOTICE "No RedBoot partition table detected in %s\n",
|
||||
master->name);
|
||||
ret = 0;
|
||||
@@ -0,0 +1,21 @@
|
||||
--- a/drivers/mtd/nand/Kconfig
|
||||
+++ b/drivers/mtd/nand/Kconfig
|
||||
@@ -488,4 +488,8 @@ config MTD_NAND_W90P910
|
||||
This enables the driver for the NAND Flash on evaluation board based
|
||||
on w90p910.
|
||||
|
||||
+config MTD_NAND_RB4XX
|
||||
+ tristate "NAND flash driver for RouterBoard 4xx series"
|
||||
+ depends on MTD_NAND && AR71XX_MACH_RB4XX
|
||||
+
|
||||
endif # MTD_NAND
|
||||
--- a/drivers/mtd/nand/Makefile
|
||||
+++ b/drivers/mtd/nand/Makefile
|
||||
@@ -30,6 +30,7 @@ obj-$(CONFIG_MTD_NAND_CM_X270) += cmx27
|
||||
obj-$(CONFIG_MTD_NAND_PXA3xx) += pxa3xx_nand.o
|
||||
obj-$(CONFIG_MTD_NAND_TMIO) += tmio_nand.o
|
||||
obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o
|
||||
+obj-$(CONFIG_MTD_NAND_RB4XX) += rb4xx_nand.o
|
||||
obj-$(CONFIG_MTD_ALAUDA) += alauda.o
|
||||
obj-$(CONFIG_MTD_NAND_PASEMI) += pasemi_nand.o
|
||||
obj-$(CONFIG_MTD_NAND_ORION) += orion_nand.o
|
||||
@@ -0,0 +1,27 @@
|
||||
--- a/drivers/spi/Makefile
|
||||
+++ b/drivers/spi/Makefile
|
||||
@@ -11,6 +11,7 @@ endif
|
||||
obj-$(CONFIG_SPI_MASTER) += spi.o
|
||||
|
||||
# SPI master controller drivers (bus)
|
||||
+obj-$(CONFIG_SPI_AP83) += ap83_spi.o
|
||||
obj-$(CONFIG_SPI_AR71XX) += ar71xx_spi.o
|
||||
obj-$(CONFIG_SPI_ATMEL) += atmel_spi.o
|
||||
obj-$(CONFIG_SPI_BFIN) += spi_bfin5xx.o
|
||||
--- a/drivers/spi/Kconfig
|
||||
+++ b/drivers/spi/Kconfig
|
||||
@@ -53,6 +53,14 @@ if SPI_MASTER
|
||||
|
||||
comment "SPI Master Controller Drivers"
|
||||
|
||||
+config SPI_AP83
|
||||
+ tristate "Atheros AP83 specific SPI Controller"
|
||||
+ depends on SPI_MASTER && AR71XX_MACH_AP83
|
||||
+ select SPI_BITBANG
|
||||
+ help
|
||||
+ This is a specific SPI controller driver for the Atheros AP83
|
||||
+ reference board.
|
||||
+
|
||||
config SPI_AR71XX
|
||||
tristate "Atheros AR71xx SPI Controller"
|
||||
depends on SPI_MASTER && ATHEROS_AR71XX
|
||||
@@ -0,0 +1,24 @@
|
||||
--- a/drivers/spi/Kconfig
|
||||
+++ b/drivers/spi/Kconfig
|
||||
@@ -365,6 +365,11 @@ config SPI_TLE62X0
|
||||
sysfs interface, with each line presented as a kind of GPIO
|
||||
exposing both switch control and diagnostic feedback.
|
||||
|
||||
+config SPI_VSC7385
|
||||
+ tristate "Vitesse VSC7385 ethernet switch driver"
|
||||
+ help
|
||||
+ SPI driver for the Vitesse VSC7385 ethernet switch.
|
||||
+
|
||||
#
|
||||
# Add new SPI protocol masters in alphabetical order above this line
|
||||
#
|
||||
--- a/drivers/spi/Makefile
|
||||
+++ b/drivers/spi/Makefile
|
||||
@@ -54,6 +54,7 @@ spi_s3c24xx_hw-$(CONFIG_SPI_S3C24XX_FIQ)
|
||||
|
||||
# SPI protocol drivers (device/link on bus)
|
||||
obj-$(CONFIG_SPI_SPIDEV) += spidev.o
|
||||
+obj-$(CONFIG_SPI_VSC7385) += spi_vsc7385.o
|
||||
obj-$(CONFIG_SPI_TLE62X0) += tle62x0.o
|
||||
# ... add above this line ...
|
||||
|
||||
@@ -0,0 +1,27 @@
|
||||
--- a/drivers/spi/Kconfig
|
||||
+++ b/drivers/spi/Kconfig
|
||||
@@ -68,6 +68,14 @@ config SPI_AR71XX
|
||||
help
|
||||
This is the SPI contoller driver for Atheros AR71xx.
|
||||
|
||||
+config SPI_PB44
|
||||
+ tristate "Atheros PB44 board specific SPI controller"
|
||||
+ depends on SPI_MASTER && AR71XX_MACH_PB44
|
||||
+ select SPI_BITBANG
|
||||
+ help
|
||||
+ This is a specific SPI controller driver for the Atheros PB44
|
||||
+ reference board.
|
||||
+
|
||||
config SPI_ATMEL
|
||||
tristate "Atmel SPI Controller"
|
||||
depends on (ARCH_AT91 || AVR32)
|
||||
--- a/drivers/spi/Makefile
|
||||
+++ b/drivers/spi/Makefile
|
||||
@@ -24,6 +24,7 @@ obj-$(CONFIG_SPI_GPIO) += spi_gpio.o
|
||||
obj-$(CONFIG_SPI_GPIO_OLD) += spi_gpio_old.o
|
||||
obj-$(CONFIG_SPI_IMX) += spi_imx.o
|
||||
obj-$(CONFIG_SPI_LM70_LLP) += spi_lm70llp.o
|
||||
+obj-$(CONFIG_SPI_PB44) += pb44_spi.o
|
||||
obj-$(CONFIG_SPI_PXA2XX) += pxa2xx_spi.o
|
||||
obj-$(CONFIG_SPI_OMAP_UWIRE) += omap_uwire.o
|
||||
obj-$(CONFIG_SPI_OMAP24XX) += omap2_mcspi.o
|
||||
@@ -0,0 +1,26 @@
|
||||
--- a/drivers/leds/Kconfig
|
||||
+++ b/drivers/leds/Kconfig
|
||||
@@ -269,6 +269,13 @@ config LEDS_ADP5520
|
||||
To compile this driver as a module, choose M here: the module will
|
||||
be called leds-adp5520.
|
||||
|
||||
+config LEDS_WNDR3700_USB
|
||||
+ tristate "NETGEAR WNDR3700 USB LED driver"
|
||||
+ depends on LEDS_CLASS && AR71XX_MACH_WNDR3700
|
||||
+ help
|
||||
+ This option enables support for the USB LED found on the
|
||||
+ NETGEAR WNDR3700 board.
|
||||
+
|
||||
comment "LED Triggers"
|
||||
|
||||
config LEDS_TRIGGERS
|
||||
--- a/drivers/leds/Makefile
|
||||
+++ b/drivers/leds/Makefile
|
||||
@@ -29,6 +29,7 @@ obj-$(CONFIG_LEDS_DA903X) += leds-da903
|
||||
obj-$(CONFIG_LEDS_WM831X_STATUS) += leds-wm831x-status.o
|
||||
obj-$(CONFIG_LEDS_WM8350) += leds-wm8350.o
|
||||
obj-$(CONFIG_LEDS_PWM) += leds-pwm.o
|
||||
+obj-${CONFIG_LEDS_WNDR3700_USB} += leds-wndr3700-usb.o
|
||||
obj-$(CONFIG_LEDS_REGULATOR) += leds-regulator.o
|
||||
obj-$(CONFIG_LEDS_INTEL_SS4200) += leds-ss4200.o
|
||||
obj-$(CONFIG_LEDS_LT3593) += leds-lt3593.o
|
||||
@@ -0,0 +1,25 @@
|
||||
--- a/drivers/gpio/Kconfig
|
||||
+++ b/drivers/gpio/Kconfig
|
||||
@@ -255,4 +255,12 @@ config GPIO_UCB1400
|
||||
To compile this driver as a module, choose M here: the
|
||||
module will be called ucb1400_gpio.
|
||||
|
||||
+comment "Other GPIO expanders"
|
||||
+
|
||||
+config GPIO_NXP_74HC153
|
||||
+ tristate "NXP 74HC153 Dual 4-input multiplexer"
|
||||
+ help
|
||||
+ Platform driver for NXP 74HC153 Dual 4-input Multiplexer. This
|
||||
+ provides a GPIO interface supporting inputs.
|
||||
+
|
||||
endif
|
||||
--- a/drivers/gpio/Makefile
|
||||
+++ b/drivers/gpio/Makefile
|
||||
@@ -11,6 +11,7 @@ obj-$(CONFIG_GPIO_MAX7301) += max7301.o
|
||||
obj-$(CONFIG_GPIO_MAX732X) += max732x.o
|
||||
obj-$(CONFIG_GPIO_MC33880) += mc33880.o
|
||||
obj-$(CONFIG_GPIO_MCP23S08) += mcp23s08.o
|
||||
+obj-$(CONFIG_GPIO_NXP_74HC153) += nxp_74hc153.o
|
||||
obj-$(CONFIG_GPIO_PCA953X) += pca953x.o
|
||||
obj-$(CONFIG_GPIO_PCF857X) += pcf857x.o
|
||||
obj-$(CONFIG_GPIO_PL061) += pl061.o
|
||||
@@ -0,0 +1,23 @@
|
||||
--- a/drivers/leds/Kconfig
|
||||
+++ b/drivers/leds/Kconfig
|
||||
@@ -276,6 +276,10 @@ config LEDS_WNDR3700_USB
|
||||
This option enables support for the USB LED found on the
|
||||
NETGEAR WNDR3700 board.
|
||||
|
||||
+config LEDS_RB750
|
||||
+ tristate "LED driver for the Mikrotik RouterBOARD 750"
|
||||
+ depends on LEDS_CLASS && AR71XX_MACH_RB750
|
||||
+
|
||||
comment "LED Triggers"
|
||||
|
||||
config LEDS_TRIGGERS
|
||||
--- a/drivers/leds/Makefile
|
||||
+++ b/drivers/leds/Makefile
|
||||
@@ -34,6 +34,7 @@ obj-$(CONFIG_LEDS_REGULATOR) += leds-re
|
||||
obj-$(CONFIG_LEDS_INTEL_SS4200) += leds-ss4200.o
|
||||
obj-$(CONFIG_LEDS_LT3593) += leds-lt3593.o
|
||||
obj-$(CONFIG_LEDS_ADP5520) += leds-adp5520.o
|
||||
+obj-$(CONFIG_LEDS_RB750) += leds-rb750.o
|
||||
|
||||
# LED SPI Drivers
|
||||
obj-$(CONFIG_LEDS_DAC124S085) += leds-dac124s085.o
|
||||
@@ -0,0 +1,21 @@
|
||||
--- a/drivers/mtd/nand/Kconfig
|
||||
+++ b/drivers/mtd/nand/Kconfig
|
||||
@@ -492,4 +492,8 @@ config MTD_NAND_RB4XX
|
||||
tristate "NAND flash driver for RouterBoard 4xx series"
|
||||
depends on MTD_NAND && AR71XX_MACH_RB4XX
|
||||
|
||||
+config MTD_NAND_RB750
|
||||
+ tristate "NAND flash driver for the RouterBoard 750"
|
||||
+ depends on MTD_NAND && AR71XX_MACH_RB750
|
||||
+
|
||||
endif # MTD_NAND
|
||||
--- a/drivers/mtd/nand/Makefile
|
||||
+++ b/drivers/mtd/nand/Makefile
|
||||
@@ -31,6 +31,7 @@ obj-$(CONFIG_MTD_NAND_PXA3xx) += pxa3xx
|
||||
obj-$(CONFIG_MTD_NAND_TMIO) += tmio_nand.o
|
||||
obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o
|
||||
obj-$(CONFIG_MTD_NAND_RB4XX) += rb4xx_nand.o
|
||||
+obj-$(CONFIG_MTD_NAND_RB750) += rb750_nand.o
|
||||
obj-$(CONFIG_MTD_ALAUDA) += alauda.o
|
||||
obj-$(CONFIG_MTD_NAND_PASEMI) += pasemi_nand.o
|
||||
obj-$(CONFIG_MTD_NAND_ORION) += orion_nand.o
|
||||
@@ -0,0 +1,22 @@
|
||||
--- a/arch/mips/Makefile
|
||||
+++ b/arch/mips/Makefile
|
||||
@@ -181,6 +181,7 @@ endif
|
||||
#
|
||||
libs-$(CONFIG_ARC) += arch/mips/fw/arc/
|
||||
libs-$(CONFIG_CFE) += arch/mips/fw/cfe/
|
||||
+libs-$(CONFIG_MYLOADER) += arch/mips/fw/myloader/
|
||||
libs-$(CONFIG_SNIPROM) += arch/mips/fw/sni/
|
||||
libs-y += arch/mips/fw/lib/
|
||||
|
||||
--- a/arch/mips/Kconfig
|
||||
+++ b/arch/mips/Kconfig
|
||||
@@ -877,6 +877,9 @@ config MIPS_NILE4
|
||||
config MIPS_DISABLE_OBSOLETE_IDE
|
||||
bool
|
||||
|
||||
+config MYLOADER
|
||||
+ bool
|
||||
+
|
||||
config SYNC_R4K
|
||||
bool
|
||||
|
||||
@@ -0,0 +1,134 @@
|
||||
--- a/arch/mips/kernel/mips_machine.c
|
||||
+++ b/arch/mips/kernel/mips_machine.c
|
||||
@@ -7,12 +7,13 @@
|
||||
*
|
||||
*/
|
||||
#include <linux/mm.h>
|
||||
+#include <linux/string.h>
|
||||
|
||||
#include <asm/mips_machine.h>
|
||||
-#include <asm/bootinfo.h>
|
||||
|
||||
static struct list_head mips_machines __initdata =
|
||||
LIST_HEAD_INIT(mips_machines);
|
||||
+static char *mips_machid __initdata;
|
||||
|
||||
char *mips_machine_name = "Unknown";
|
||||
|
||||
@@ -55,20 +56,65 @@ void __init mips_machine_set_name(char *
|
||||
}
|
||||
}
|
||||
|
||||
-void __init mips_machine_setup(unsigned long machtype)
|
||||
+void __init mips_machine_setup(void)
|
||||
{
|
||||
struct mips_machine *mach;
|
||||
|
||||
- mach = mips_machine_find(machtype);
|
||||
+ mach = mips_machine_find(mips_machtype);
|
||||
if (!mach) {
|
||||
- printk(KERN_ALERT "MIPS: no machine registered for "
|
||||
- "machtype %lu\n", machtype);
|
||||
+ printk(KERN_WARNING "MIPS: no machine registered for "
|
||||
+ "machtype %lu\n", mips_machtype);
|
||||
return;
|
||||
}
|
||||
|
||||
mips_machine_set_name(mach->mach_name);
|
||||
- printk(KERN_INFO "MIPS: machine is %s\n", mips_machine_name);
|
||||
+ printk(KERN_NOTICE "MIPS: machine is %s\n", mips_machine_name);
|
||||
|
||||
if (mach->mach_setup)
|
||||
mach->mach_setup();
|
||||
}
|
||||
+
|
||||
+int __init mips_machtype_setup(char *id)
|
||||
+{
|
||||
+ if (mips_machid == NULL)
|
||||
+ mips_machid = id;
|
||||
+
|
||||
+ return 1;
|
||||
+}
|
||||
+
|
||||
+__setup("machtype=", mips_machtype_setup);
|
||||
+
|
||||
+static int __init mips_machtype_init(void)
|
||||
+{
|
||||
+ struct list_head *this;
|
||||
+ struct mips_machine *mach;
|
||||
+
|
||||
+ if (mips_machid == NULL)
|
||||
+ return 0;
|
||||
+
|
||||
+ list_for_each(this, &mips_machines) {
|
||||
+ mach = list_entry(this, struct mips_machine, list);
|
||||
+ if (mach->mach_id == NULL)
|
||||
+ continue;
|
||||
+
|
||||
+ if (strcmp(mach->mach_id, mips_machid) == 0) {
|
||||
+ mips_machtype = mach->mach_type;
|
||||
+ return 0;
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
+ printk(KERN_WARNING
|
||||
+ "MIPS: no machine found for id: '%s', registered machines:\n",
|
||||
+ mips_machid);
|
||||
+ printk(KERN_WARNING "%32s %s\n", "id", "name");
|
||||
+
|
||||
+ list_for_each(this, &mips_machines) {
|
||||
+ mach = list_entry(this, struct mips_machine, list);
|
||||
+ printk(KERN_WARNING "%32s %s\n",
|
||||
+ mach->mach_id ? mach->mach_id : "", mach->mach_name);
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+core_initcall(mips_machtype_init);
|
||||
--- a/arch/mips/include/asm/mips_machine.h
|
||||
+++ b/arch/mips/include/asm/mips_machine.h
|
||||
@@ -13,25 +13,33 @@
|
||||
#include <linux/init.h>
|
||||
#include <linux/list.h>
|
||||
|
||||
+#include <asm/bootinfo.h>
|
||||
+
|
||||
struct mips_machine {
|
||||
unsigned long mach_type;
|
||||
- void (*mach_setup)(void);
|
||||
+ char *mach_id;
|
||||
char *mach_name;
|
||||
+ void (*mach_setup)(void);
|
||||
struct list_head list;
|
||||
};
|
||||
|
||||
void mips_machine_register(struct mips_machine *) __init;
|
||||
-void mips_machine_setup(unsigned long machtype) __init;
|
||||
+void mips_machine_setup(void) __init;
|
||||
+int mips_machtype_setup(char *id) __init;
|
||||
void mips_machine_set_name(char *name) __init;
|
||||
|
||||
extern char *mips_machine_name;
|
||||
|
||||
-#define MIPS_MACHINE(_type, _name, _setup) \
|
||||
-static char machine_name_##_type[] __initdata = _name; \
|
||||
+#define MIPS_MACHINE(_type, _id, _name, _setup) \
|
||||
+static const char machine_name_##_type[] __initconst \
|
||||
+ __aligned(1) = _name; \
|
||||
+static const char machine_id_##_type[] __initconst \
|
||||
+ __aligned(1) = _id; \
|
||||
static struct mips_machine machine_##_type __initdata = \
|
||||
{ \
|
||||
.mach_type = _type, \
|
||||
- .mach_name = machine_name_##_type, \
|
||||
+ .mach_id = (char *) machine_id_##_type, \
|
||||
+ .mach_name = (char *) machine_name_##_type, \
|
||||
.mach_setup = _setup, \
|
||||
}; \
|
||||
\
|
||||
@@ -44,4 +52,3 @@ static int __init register_machine_##_ty
|
||||
pure_initcall(register_machine_##_type)
|
||||
|
||||
#endif /* __ASM_MIPS_MACHINE_H */
|
||||
-
|
||||
@@ -0,0 +1,29 @@
|
||||
--- a/arch/mips/kernel/traps.c
|
||||
+++ b/arch/mips/kernel/traps.c
|
||||
@@ -50,6 +50,7 @@
|
||||
#include <asm/types.h>
|
||||
#include <asm/stacktrace.h>
|
||||
#include <asm/irq.h>
|
||||
+#include <asm/time.h>
|
||||
|
||||
extern void check_wait(void);
|
||||
extern asmlinkage void r4k_wait(void);
|
||||
@@ -1496,6 +1497,8 @@ void __cpuinit per_cpu_trap_init(void)
|
||||
if (cpu_has_mips_r2) {
|
||||
cp0_compare_irq_shift = CAUSEB_TI - CAUSEB_IP;
|
||||
cp0_compare_irq = (read_c0_intctl() >> INTCTLB_IPTI) & 7;
|
||||
+ if (get_c0_compare_irq)
|
||||
+ cp0_compare_irq = get_c0_compare_irq();
|
||||
cp0_perfcount_irq = (read_c0_intctl() >> INTCTLB_IPPCI) & 7;
|
||||
if (cp0_perfcount_irq == cp0_compare_irq)
|
||||
cp0_perfcount_irq = -1;
|
||||
--- a/arch/mips/include/asm/time.h
|
||||
+++ b/arch/mips/include/asm/time.h
|
||||
@@ -52,6 +52,7 @@ extern int (*perf_irq)(void);
|
||||
*/
|
||||
#ifdef CONFIG_CEVT_R4K_LIB
|
||||
extern unsigned int __weak get_c0_compare_int(void);
|
||||
+extern unsigned int __weak get_c0_compare_irq(void);
|
||||
extern int r4k_clockevent_init(void);
|
||||
#endif
|
||||
|
||||
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Reference in New Issue
Block a user