mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-25 11:55:30 +02:00
Partially fix commit r16660
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@16678 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
parent
f1d85b7a56
commit
fe4503efb4
@ -140,143 +140,3 @@
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s; \
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s; \
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})
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})
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/* macros for debug output */
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#define hcd_dbg(hcd, fmt, args...) \
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dev_info(hcd->self.controller, fmt, ## args)
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#define hcd_err(hcd, fmt, args...) \
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dev_err(hcd->self.controller, fmt, ## args)
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#define hcd_info(hcd, fmt, args...) \
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dev_info(hcd->self.controller, fmt, ## args)
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#define hcd_warn(hcd, fmt, args...) \
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dev_warn(hcd->self.controller, fmt, ## args)
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/*
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#define devdrv_dbg(fmt, args...) \
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printk(KERN_INFO "usb_devdrv dbg: ");printk(fmt, ## args)
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*/
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#define devdrv_dbg(fmt, args...) {}
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#define devdrv_err(fmt, args...) \
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printk(KERN_ERR "usb_devdrv error: ");printk(fmt, ## args)
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#define devdrv_info(fmt, args...) \
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printk(KERN_INFO "usb_devdrv: ");printk(fmt, ## args)
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#define irq_dbg(fmt, args...) \
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printk(KERN_INFO "crisv10_irq dbg: ");printk(fmt, ## args)
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#define irq_err(fmt, args...) \
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printk(KERN_ERR "crisv10_irq error: ");printk(fmt, ## args)
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#define irq_warn(fmt, args...) \
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printk(KERN_INFO "crisv10_irq warn: ");printk(fmt, ## args)
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#define irq_info(fmt, args...) \
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printk(KERN_INFO "crisv10_hcd: ");printk(fmt, ## args)
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/*
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#define rh_dbg(fmt, args...) \
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printk(KERN_DEBUG "crisv10_rh dbg: ");printk(fmt, ## args)
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*/
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#define rh_dbg(fmt, args...) {}
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#define rh_err(fmt, args...) \
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printk(KERN_ERR "crisv10_rh error: ");printk(fmt, ## args)
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#define rh_warn(fmt, args...) \
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printk(KERN_INFO "crisv10_rh warning: ");printk(fmt, ## args)
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#define rh_info(fmt, args...) \
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printk(KERN_INFO "crisv10_rh: ");printk(fmt, ## args)
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/*
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#define tc_dbg(fmt, args...) \
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printk(KERN_INFO "crisv10_tc dbg: ");printk(fmt, ## args)
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*/
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#define tc_dbg(fmt, args...) {while(0){}}
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#define tc_err(fmt, args...) \
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printk(KERN_ERR "crisv10_tc error: ");printk(fmt, ## args)
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/*
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#define tc_warn(fmt, args...) \
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printk(KERN_INFO "crisv10_tc warning: ");printk(fmt, ## args)
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*/
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#define tc_warn(fmt, args...) {while(0){}}
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#define tc_info(fmt, args...) \
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printk(KERN_INFO "crisv10_tc: ");printk(fmt, ## args)
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/* Debug print-outs for various traffic types */
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#define intr_warn(fmt, args...) \
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printk(KERN_INFO "crisv10_intr warning: ");printk(fmt, ## args)
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/*
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#define intr_dbg(fmt, args...) \
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printk(KERN_DEBUG "crisv10_intr dbg: ");printk(fmt, ## args)
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*/
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#define intr_dbg(fmt, args...) {while(0){}}
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#define isoc_err(fmt, args...) \
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printk(KERN_ERR "crisv10_isoc error: ");printk(fmt, ## args)
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/*
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#define isoc_warn(fmt, args...) \
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printk(KERN_INFO "crisv10_isoc warning: ");printk(fmt, ## args)
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*/
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#define isoc_warn(fmt, args...) {while(0){}}
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/*
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#define isoc_dbg(fmt, args...) \
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printk(KERN_INFO "crisv10_isoc dbg: ");printk(fmt, ## args)
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*/
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#define isoc_dbg(fmt, args...) {while(0){}}
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/*
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#define timer_warn(fmt, args...) \
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printk(KERN_INFO "crisv10_timer warning: ");printk(fmt, ## args)
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*/
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#define timer_warn(fmt, args...) {while(0){}}
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/*
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#define timer_dbg(fmt, args...) \
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printk(KERN_INFO "crisv10_timer dbg: ");printk(fmt, ## args)
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*/
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#define timer_dbg(fmt, args...) {while(0){}}
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/* Debug printouts for events related to late finishing of URBs */
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/*
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#define late_dbg(fmt, args...) \
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printk(KERN_INFO "crisv10_late dbg: ");printk(fmt, ## args)
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*/
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#define late_dbg(fmt, args...) {while(0){}}
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#define late_warn(fmt, args...) \
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printk(KERN_INFO "crisv10_late warning: ");printk(fmt, ## args)
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/*
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#define errno_dbg(fmt, args...) \
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printk(KERN_INFO "crisv10_errno dbg: ");printk(fmt, ## args)
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*/
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#define errno_dbg(fmt, args...) {while(0){}}
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#define dma_dbg(fmt, args...) \
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printk(KERN_INFO "crisv10_dma dbg: ");printk(fmt, ## args)
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#define dma_err(fmt, args...) \
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printk(KERN_ERR "crisv10_dma error: ");printk(fmt, ## args)
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#define dma_warn(fmt, args...) \
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printk(KERN_INFO "crisv10_dma warning: ");printk(fmt, ## args)
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#define dma_info(fmt, args...) \
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printk(KERN_INFO "crisv10_dma: ");printk(fmt, ## args)
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#define str_dir(pipe) \
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(usb_pipeout(pipe) ? "out" : "in")
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#define str_type(pipe) \
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({ \
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char *s = "?"; \
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switch (usb_pipetype(pipe)) { \
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case PIPE_ISOCHRONOUS: s = "iso"; break; \
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case PIPE_INTERRUPT: s = "intr"; break; \
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case PIPE_CONTROL: s = "ctrl"; break; \
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case PIPE_BULK: s = "bulk"; break; \
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}; \
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s; \
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})
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File diff suppressed because it is too large
Load Diff
@ -331,336 +331,4 @@ typedef struct urb_entry
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#define USB_SB_command__full__yes 1
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#define USB_SB_command__full__yes 1
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#endif
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#endif
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#ifndef __LINUX_ETRAX_USB_H
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#define __LINUX_ETRAX_USB_H
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#include <linux/types.h>
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#include <linux/list.h>
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struct USB_IN_Desc {
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volatile __u16 sw_len;
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volatile __u16 command;
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volatile unsigned long next;
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volatile unsigned long buf;
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volatile __u16 hw_len;
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volatile __u16 status;
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};
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struct USB_SB_Desc {
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volatile __u16 sw_len;
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volatile __u16 command;
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volatile unsigned long next;
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volatile unsigned long buf;
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};
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struct USB_EP_Desc {
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volatile __u16 hw_len;
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volatile __u16 command;
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volatile unsigned long sub;
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volatile unsigned long next;
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};
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/* Root Hub port status struct */
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struct crisv10_rh {
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volatile __u16 wPortChange[2];
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volatile __u16 wPortStatusPrev[2];
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};
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/* HCD description */
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struct crisv10_hcd {
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spinlock_t lock;
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__u8 num_ports;
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__u8 running;
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};
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/* Endpoint HC private data description */
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struct crisv10_ep_priv {
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int epid;
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};
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/* Additional software state info for a USB Controller epid */
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struct etrax_epid {
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__u8 inuse; /* !0 = setup in Etrax and used for a endpoint */
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__u8 disabled; /* !0 = Temporarly disabled to avoid resubmission */
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__u8 type; /* Setup as: PIPE_BULK, PIPE_CONTROL ... */
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__u8 out_traffic; /* !0 = This epid is for out traffic */
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};
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/* Struct to hold information of scheduled later URB completion */
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struct urb_later_data {
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struct delayed_work dws;
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struct usb_hcd *hcd;
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struct urb *urb;
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int urb_num;
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int status;
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};
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typedef enum {
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STARTED,
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NOT_STARTED,
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UNLINK,
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} crisv10_urb_state_t;
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struct crisv10_urb_priv {
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/* Sequence number for this URB. Every new submited URB gets this from
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a incrementing counter. Used when a URB is scheduled for later finish to
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be sure that the intended URB hasn't already been completed (device
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drivers has a tendency to reuse URBs once they are completed, causing us
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to not be able to single old ones out only based on the URB pointer.) */
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__u32 urb_num;
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/* The first_sb field is used for freeing all SB descriptors belonging
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to an urb. The corresponding ep descriptor's sub pointer cannot be
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used for this since the DMA advances the sub pointer as it processes
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the sb list. */
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struct USB_SB_Desc *first_sb;
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/* The last_sb field referes to the last SB descriptor that belongs to
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this urb. This is important to know so we can free the SB descriptors
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that ranges between first_sb and last_sb. */
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struct USB_SB_Desc *last_sb;
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/* The rx_offset field is used in ctrl and bulk traffic to keep track
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of the offset in the urb's transfer_buffer where incoming data should be
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copied to. */
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__u32 rx_offset;
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/* Counter used in isochronous transfers to keep track of the
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number of packets received/transmitted. */
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__u32 isoc_packet_counter;
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/* Flag that marks if this Isoc Out URB has finished it's transfer. Used
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because several URBs can be finished before list is processed */
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__u8 isoc_out_done;
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/* This field is used to pass information about the urb's current state
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between the various interrupt handlers (thus marked volatile). */
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volatile crisv10_urb_state_t urb_state;
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/* In Ctrl transfers consist of (at least) 3 packets: SETUP, IN and ZOUT.
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When DMA8 sub-channel 2 has processed the SB list for this sequence we
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get a interrupt. We also get a interrupt for In transfers and which
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one of these interrupts that comes first depends of data size and device.
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To be sure that we have got both interrupts before we complete the URB
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we have these to flags that shows which part that has completed.
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We can then check when we get one of the interrupts that if the other has
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occured it's safe for us to complete the URB, otherwise we set appropriate
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flag and do the completion when we get the other interrupt. */
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volatile unsigned char ctrl_zout_done;
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volatile unsigned char ctrl_rx_done;
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/* Connection between the submitted urb and ETRAX epid number */
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__u8 epid;
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/* The rx_data_list field is used for periodic traffic, to hold
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received data for later processing in the the complete_urb functions,
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where the data us copied to the urb's transfer_buffer. Basically, we
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use this intermediate storage because we don't know when it's safe to
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reuse the transfer_buffer (FIXME?). */
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struct list_head rx_data_list;
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/* The interval time rounded up to closest 2^N */
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int interval;
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/* Pool of EP descriptors needed if it's a INTR transfer.
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Amount of EPs in pool correspons to how many INTR that should
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be inserted in TxIntrEPList (max 128, defined by MAX_INTR_INTERVAL) */
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struct USB_EP_Desc* intr_ep_pool[128];
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/* The mount of EPs allocated for this INTR URB */
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int intr_ep_pool_length;
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/* Pointer to info struct if URB is scheduled to be finished later */
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struct urb_later_data* later_data;
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/* Allocated bandwidth for isochronous and interrupt traffic */
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int bandwidth;
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};
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/* This struct is for passing data from the top half to the bottom half irq
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handlers */
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struct crisv10_irq_reg {
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struct usb_hcd* hcd;
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__u32 r_usb_epid_attn;
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__u8 r_usb_status;
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__u16 r_usb_rh_port_status_1;
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__u16 r_usb_rh_port_status_2;
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__u32 r_usb_irq_mask_read;
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__u32 r_usb_fm_number;
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struct work_struct usb_bh;
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};
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/* This struct is for passing data from the isoc top half to the isoc bottom
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half. */
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struct crisv10_isoc_complete_data {
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struct usb_hcd *hcd;
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struct urb *urb;
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struct work_struct usb_bh;
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};
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/* Entry item for URB lists for each endpint */
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typedef struct urb_entry
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{
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struct urb *urb;
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struct list_head list;
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} urb_entry_t;
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/* ---------------------------------------------------------------------------
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Virtual Root HUB
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------------------------------------------------------------------------- */
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/* destination of request */
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#define RH_INTERFACE 0x01
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#define RH_ENDPOINT 0x02
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#define RH_OTHER 0x03
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#define RH_CLASS 0x20
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#define RH_VENDOR 0x40
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/* Requests: bRequest << 8 | bmRequestType */
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#define RH_GET_STATUS 0x0080
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#define RH_CLEAR_FEATURE 0x0100
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#define RH_SET_FEATURE 0x0300
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#define RH_SET_ADDRESS 0x0500
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#define RH_GET_DESCRIPTOR 0x0680
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#define RH_SET_DESCRIPTOR 0x0700
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#define RH_GET_CONFIGURATION 0x0880
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#define RH_SET_CONFIGURATION 0x0900
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#define RH_GET_STATE 0x0280
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#define RH_GET_INTERFACE 0x0A80
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#define RH_SET_INTERFACE 0x0B00
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#define RH_SYNC_FRAME 0x0C80
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/* Our Vendor Specific Request */
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#define RH_SET_EP 0x2000
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/* Hub port features */
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#define RH_PORT_CONNECTION 0x00
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#define RH_PORT_ENABLE 0x01
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#define RH_PORT_SUSPEND 0x02
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#define RH_PORT_OVER_CURRENT 0x03
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#define RH_PORT_RESET 0x04
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#define RH_PORT_POWER 0x08
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#define RH_PORT_LOW_SPEED 0x09
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#define RH_C_PORT_CONNECTION 0x10
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#define RH_C_PORT_ENABLE 0x11
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#define RH_C_PORT_SUSPEND 0x12
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#define RH_C_PORT_OVER_CURRENT 0x13
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#define RH_C_PORT_RESET 0x14
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/* Hub features */
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||||||
#define RH_C_HUB_LOCAL_POWER 0x00
|
|
||||||
#define RH_C_HUB_OVER_CURRENT 0x01
|
|
||||||
|
|
||||||
#define RH_DEVICE_REMOTE_WAKEUP 0x00
|
|
||||||
#define RH_ENDPOINT_STALL 0x01
|
|
||||||
|
|
||||||
/* Our Vendor Specific feature */
|
|
||||||
#define RH_REMOVE_EP 0x00
|
|
||||||
|
|
||||||
|
|
||||||
#define RH_ACK 0x01
|
|
||||||
#define RH_REQ_ERR -1
|
|
||||||
#define RH_NACK 0x00
|
|
||||||
|
|
||||||
/* Field definitions for */
|
|
||||||
|
|
||||||
#define USB_IN_command__eol__BITNR 0 /* command macros */
|
|
||||||
#define USB_IN_command__eol__WIDTH 1
|
|
||||||
#define USB_IN_command__eol__no 0
|
|
||||||
#define USB_IN_command__eol__yes 1
|
|
||||||
|
|
||||||
#define USB_IN_command__intr__BITNR 3
|
|
||||||
#define USB_IN_command__intr__WIDTH 1
|
|
||||||
#define USB_IN_command__intr__no 0
|
|
||||||
#define USB_IN_command__intr__yes 1
|
|
||||||
|
|
||||||
#define USB_IN_status__eop__BITNR 1 /* status macros. */
|
|
||||||
#define USB_IN_status__eop__WIDTH 1
|
|
||||||
#define USB_IN_status__eop__no 0
|
|
||||||
#define USB_IN_status__eop__yes 1
|
|
||||||
|
|
||||||
#define USB_IN_status__eot__BITNR 5
|
|
||||||
#define USB_IN_status__eot__WIDTH 1
|
|
||||||
#define USB_IN_status__eot__no 0
|
|
||||||
#define USB_IN_status__eot__yes 1
|
|
||||||
|
|
||||||
#define USB_IN_status__error__BITNR 6
|
|
||||||
#define USB_IN_status__error__WIDTH 1
|
|
||||||
#define USB_IN_status__error__no 0
|
|
||||||
#define USB_IN_status__error__yes 1
|
|
||||||
|
|
||||||
#define USB_IN_status__nodata__BITNR 7
|
|
||||||
#define USB_IN_status__nodata__WIDTH 1
|
|
||||||
#define USB_IN_status__nodata__no 0
|
|
||||||
#define USB_IN_status__nodata__yes 1
|
|
||||||
|
|
||||||
#define USB_IN_status__epid__BITNR 8
|
|
||||||
#define USB_IN_status__epid__WIDTH 5
|
|
||||||
|
|
||||||
#define USB_EP_command__eol__BITNR 0
|
|
||||||
#define USB_EP_command__eol__WIDTH 1
|
|
||||||
#define USB_EP_command__eol__no 0
|
|
||||||
#define USB_EP_command__eol__yes 1
|
|
||||||
|
|
||||||
#define USB_EP_command__eof__BITNR 1
|
|
||||||
#define USB_EP_command__eof__WIDTH 1
|
|
||||||
#define USB_EP_command__eof__no 0
|
|
||||||
#define USB_EP_command__eof__yes 1
|
|
||||||
|
|
||||||
#define USB_EP_command__intr__BITNR 3
|
|
||||||
#define USB_EP_command__intr__WIDTH 1
|
|
||||||
#define USB_EP_command__intr__no 0
|
|
||||||
#define USB_EP_command__intr__yes 1
|
|
||||||
|
|
||||||
#define USB_EP_command__enable__BITNR 4
|
|
||||||
#define USB_EP_command__enable__WIDTH 1
|
|
||||||
#define USB_EP_command__enable__no 0
|
|
||||||
#define USB_EP_command__enable__yes 1
|
|
||||||
|
|
||||||
#define USB_EP_command__hw_valid__BITNR 5
|
|
||||||
#define USB_EP_command__hw_valid__WIDTH 1
|
|
||||||
#define USB_EP_command__hw_valid__no 0
|
|
||||||
#define USB_EP_command__hw_valid__yes 1
|
|
||||||
|
|
||||||
#define USB_EP_command__epid__BITNR 8
|
|
||||||
#define USB_EP_command__epid__WIDTH 5
|
|
||||||
|
|
||||||
#define USB_SB_command__eol__BITNR 0 /* command macros. */
|
|
||||||
#define USB_SB_command__eol__WIDTH 1
|
|
||||||
#define USB_SB_command__eol__no 0
|
|
||||||
#define USB_SB_command__eol__yes 1
|
|
||||||
|
|
||||||
#define USB_SB_command__eot__BITNR 1
|
|
||||||
#define USB_SB_command__eot__WIDTH 1
|
|
||||||
#define USB_SB_command__eot__no 0
|
|
||||||
#define USB_SB_command__eot__yes 1
|
|
||||||
|
|
||||||
#define USB_SB_command__intr__BITNR 3
|
|
||||||
#define USB_SB_command__intr__WIDTH 1
|
|
||||||
#define USB_SB_command__intr__no 0
|
|
||||||
#define USB_SB_command__intr__yes 1
|
|
||||||
|
|
||||||
#define USB_SB_command__tt__BITNR 4
|
|
||||||
#define USB_SB_command__tt__WIDTH 2
|
|
||||||
#define USB_SB_command__tt__zout 0
|
|
||||||
#define USB_SB_command__tt__in 1
|
|
||||||
#define USB_SB_command__tt__out 2
|
|
||||||
#define USB_SB_command__tt__setup 3
|
|
||||||
|
|
||||||
|
|
||||||
#define USB_SB_command__rem__BITNR 8
|
|
||||||
#define USB_SB_command__rem__WIDTH 6
|
|
||||||
|
|
||||||
#define USB_SB_command__full__BITNR 6
|
|
||||||
#define USB_SB_command__full__WIDTH 1
|
|
||||||
#define USB_SB_command__full__no 0
|
|
||||||
#define USB_SB_command__full__yes 1
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
Loading…
Reference in New Issue
Block a user