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Commit Graph

8 Commits

Author SHA1 Message Date
juhosg
4f961361c6 ar71xx: add PCI Host Controller fixup for ar724x
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@17808 3c298f89-4303-0410-b956-a3cf2f4a3e73
2009-10-01 19:41:00 +00:00
juhosg
19bf20fcbf ar71xx: use ar71xx_pci_fixup on ar71xx SoCs only
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@17807 3c298f89-4303-0410-b956-a3cf2f4a3e73
2009-10-01 19:40:57 +00:00
juhosg
b737d591cf ar71xx: fix a typo in the ar724x PCI code
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@17806 3c298f89-4303-0410-b956-a3cf2f4a3e73
2009-10-01 19:40:51 +00:00
juhosg
191909b36e [ar71xx] add AR7240 specific PCI code
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@16674 3c298f89-4303-0410-b956-a3cf2f4a3e73
2009-07-05 08:06:24 +00:00
juhosg
43bb8183eb [ar71xx] reorganize PCI code
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@16672 3c298f89-4303-0410-b956-a3cf2f4a3e73
2009-07-05 07:53:07 +00:00
juhosg
a2d8b1a229 [ar71xx] rename DDR registers
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@13363 3c298f89-4303-0410-b956-a3cf2f4a3e73
2008-11-26 17:17:13 +00:00
juhosg
ac1c761834 [ar71xx] fix the PCI byte lane enable generation code, based on a patch by Chris Dearman
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@12617 3c298f89-4303-0410-b956-a3cf2f4a3e73
2008-09-17 13:29:47 +00:00
juhosg
546b5ed544 surprise :p
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@11894 3c298f89-4303-0410-b956-a3cf2f4a3e73
2008-07-21 17:08:14 +00:00