level monitoring and control of Gateworks boards. It is used on several
product families spanning several different target architectures (ixp4xx,
cns3xxx, davinci).
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33720 3c298f89-4303-0410-b956-a3cf2f4a3e73
Resolves crashes when probing multiple serial devices
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33719 3c298f89-4303-0410-b956-a3cf2f4a3e73
Bugfix from linux head - don't delay acks from ECN congestion
experienced in some situations.
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33686 3c298f89-4303-0410-b956-a3cf2f4a3e73
The Laguna boards do not use all the same pins for SDHCI as the Cavium
reference board.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33684 3c298f89-4303-0410-b956-a3cf2f4a3e73
The ARM11MPCore Timer/Watchdog registers start at offset 0x600 which is where
all mpcore-wdt boards point the driver base too. I believe this is wrong
because 0x600 is aliased to the timer/watchdog of the 'current CPU' where
0x700 is CPU0's timer/watchdog, and 0x800 is CPU1's timer/watchdog. Thus
if your timer/watchdog application is switching between CPU's it can end up
writing to the wrong CPU's registers which results in random board resets
from watchdog timeouts etc.
This patch forces the timer/watchdog driver to use CPU0's registers always.
Its my opinion that other mpcore-wdt boards should be doing the same thing.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33683 3c298f89-4303-0410-b956-a3cf2f4a3e73
This allows sysupgrade for devices such as the Gateworks Avila/Cambria
product families based on the ixp4xx using the redboot bootloader with
combined FIS directory and RedBoot config partitions on larger FLASH
devices with larger eraseblocks.
This second iteration of this patch addresses previous issues:
- whitespace breakage fixed
- unlock in all scenarios
- simplification and fix logic bug
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33681 3c298f89-4303-0410-b956-a3cf2f4a3e73
Enabling OPTIMIZE_FOR_SIZE cuts the kernel binary down by 50K which is
critical for some small-footprint boards.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33679 3c298f89-4303-0410-b956-a3cf2f4a3e73
Since there is only one user of bcm_tag.h left, we can safely move it
into the firmware-utils directory, replacing the symlink.
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33655 3c298f89-4303-0410-b956-a3cf2f4a3e73
gpio_keys_polled needs to be loaded in preinit for buttons to work for
entering failsafe.
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33653 3c298f89-4303-0410-b956-a3cf2f4a3e73
Several new features for newer boards:
- add additional UARTs present on some boards
- add additional LEDs present on some boards
- add HSS audio device codec present on some boards
- add support for GSC present on some boards
- add per model setup support for newer boards
- set FLASH window per-model for boards with larger FLASH
Some fixes:
- add IRQ mapping for additional PCI devices (USB Host)
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33647 3c298f89-4303-0410-b956-a3cf2f4a3e73
roll all avila patches into a single patch (no code changes)
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33646 3c298f89-4303-0410-b956-a3cf2f4a3e73
Several new features for newer boards:
- add irq mapping for additional devices
- add platform data for i2c bus to SFP modules
- add additional UARTs present on some boards
- increased R/W delay for expansion bus UARTs
- add additional LEDs present on some boards
- add GPIO exports and configuration
- add ENET switch config present on some boards
- add support for GSC present on some boards
- added per model setup support for newer boards
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33644 3c298f89-4303-0410-b956-a3cf2f4a3e73
roll all cambria patches into a single patch (no code changes)
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33643 3c298f89-4303-0410-b956-a3cf2f4a3e73
This is being done for general cleanup
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33642 3c298f89-4303-0410-b956-a3cf2f4a3e73
Before it was tried to initialize the deactivated PCIe core in client
mode, but this causes the SoC to hang. Just do not initialize it at all
and ignore the core it is not working and nothing is connected to it
when the specific bit is set in the boardflags.
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33620 3c298f89-4303-0410-b956-a3cf2f4a3e73
The new version of the ALL0256N now got 8MB SPI NOR flash instead of 4MB.
In order to expose the whole amount of flash, add another image which contains
the corresponding GENERIC_8M mtdparts.
[juhosg: change suffix from '8m' to '8M']
Patch by: Daniel Golle <dgolle@allnet.de>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33614 3c298f89-4303-0410-b956-a3cf2f4a3e73
Sometimes the PCIe card indicates that it has a sprom somewhere and we
are able to read the memory region, but it is empty and not valid. In
these cases we should try to use the fallback sprom as a last chance.
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33601 3c298f89-4303-0410-b956-a3cf2f4a3e73
The chip common and the PCIe code are accessing the sprom struct which
is not filled when these cores are initialized. Fix this by adding an
early initialize and fill the sprom struct before accessing it in other
code.
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33600 3c298f89-4303-0410-b956-a3cf2f4a3e73
The bcma based SoCs with a ieee80211 core on the SoC and an other
connected via PCIe or USB store the sprom for the SoC with a sb/1/
prefix. The SoC with just one wifi core do not use prefixes. The
BCM4706 do not use a prefix for the SoC part at all, because the prefix
is the path to the ieee80211 core and there is non on the BCM4706.
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33597 3c298f89-4303-0410-b956-a3cf2f4a3e73
