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Commit Graph

5 Commits

Author SHA1 Message Date
juhosg
e96ea88268 ar71xx: define NAND controller base address and register size for AR934X/QCA955x
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33382 3c298f89-4303-0410-b956-a3cf2f4a3e73
2012-09-12 19:06:38 +00:00
juhosg
41be3a0bd3 ar71xx: fix CPU/DDR frequency calculation for SRIF PLLs on AR934x
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33335 3c298f89-4303-0410-b956-a3cf2f4a3e73
2012-09-08 13:39:09 +00:00
juhosg
74d33b7b96 ar71xx: add initial support for the QCA955X SoCs
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@32606 3c298f89-4303-0410-b956-a3cf2f4a3e73
2012-07-05 08:26:47 +00:00
juhosg
97e6f60806 ar71xx: refactor PCI code to allow registering multiple PCI controllers
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@32605 3c298f89-4303-0410-b956-a3cf2f4a3e73
2012-07-05 08:26:45 +00:00
nbd
bd85fd265b ar71xx: add support for reading the MAC address from OTP ROM on AR933x
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@32446 3c298f89-4303-0410-b956-a3cf2f4a3e73
2012-06-19 00:21:58 +00:00