mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-27 22:21:51 +02:00
fa4420fdd5
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34285 3c298f89-4303-0410-b956-a3cf2f4a3e73
202 lines
4.7 KiB
Diff
202 lines
4.7 KiB
Diff
--- a/arch/arm/mach-cns21xx/Kconfig
|
|
+++ b/arch/arm/mach-cns21xx/Kconfig
|
|
@@ -2,6 +2,15 @@ if ARCH_CNS21XX
|
|
|
|
menu "Cavium Networks CNS21xx based machines"
|
|
|
|
+config MACH_NSB3AST
|
|
+ bool "AGESTAR NSB3AST support"
|
|
+ select CNS21XX_DEV_GEC
|
|
+ select CNS21XX_DEV_SPI_MASTER
|
|
+ select CNS21XX_DEV_USB
|
|
+ help
|
|
+ Say Y here if you intend to run this kernel on the
|
|
+ AGESTAR NSB3AST board.
|
|
+
|
|
config MACH_NS_K330
|
|
bool "NS-K330 NAS"
|
|
select CNS21XX_DEV_GEC
|
|
--- /dev/null
|
|
+++ b/arch/arm/mach-cns21xx/mach-nsb3ast.c
|
|
@@ -0,0 +1,173 @@
|
|
+/*
|
|
+ * AGESTAR NSB3AST board support
|
|
+ *
|
|
+ * Copyright (c) 2010-2012 Gabor Juhos <juhosg@openwrt.org>
|
|
+ *
|
|
+ * This file is free software; you can redistribute it and/or modify
|
|
+ * it under the terms of the GNU General Public License, Version 2, as
|
|
+ * published by the Free Software Foundation.
|
|
+ */
|
|
+
|
|
+#include <linux/kernel.h>
|
|
+#include <linux/init.h>
|
|
+#include <linux/mtd/mtd.h>
|
|
+#include <linux/mtd/map.h>
|
|
+#include <linux/mtd/partitions.h>
|
|
+#include <linux/spi/spi.h>
|
|
+#include <linux/spi/flash.h>
|
|
+#include <linux/platform_device.h>
|
|
+#include <linux/gpio.h>
|
|
+#include <linux/leds.h>
|
|
+#include <linux/gpio_keys.h>
|
|
+#include <linux/input.h>
|
|
+
|
|
+#include <asm/setup.h>
|
|
+#include <asm/mach-types.h>
|
|
+#include <asm/mach/arch.h>
|
|
+#include <asm/mach/time.h>
|
|
+#include <mach/hardware.h>
|
|
+#include <mach/cns21xx.h>
|
|
+#include <mach/cns21xx_misc.h>
|
|
+
|
|
+#include "common.h"
|
|
+#include "dev-gec.h"
|
|
+
|
|
+static struct mtd_partition nsb3ast_partitions[] = {
|
|
+ {
|
|
+ .name = "armboot",
|
|
+ .offset = 0x0,
|
|
+ .size = 0x040000,
|
|
+ .mask_flags = MTD_WRITEABLE,
|
|
+ }, {
|
|
+ .name = "kernel",
|
|
+ .offset = 0x040000,
|
|
+ .size = 0x100000,
|
|
+ }, {
|
|
+ .name = "rootfs",
|
|
+ .offset = 0x140000,
|
|
+ .size = 0x6c0000,
|
|
+ }, {
|
|
+ .name = "firmware",
|
|
+ .offset = 0x040000,
|
|
+ .size = 0x7c0000,
|
|
+ }, {
|
|
+ .name = "wholeflash",
|
|
+ .offset = 0x0,
|
|
+ .size = 0x800000,
|
|
+ .mask_flags = MTD_WRITEABLE,
|
|
+ },
|
|
+};
|
|
+
|
|
+static struct flash_platform_data nsb3ast_flash_data = {
|
|
+ .parts = nsb3ast_partitions,
|
|
+ .nr_parts = ARRAY_SIZE(nsb3ast_partitions),
|
|
+};
|
|
+
|
|
+static struct spi_board_info nsb3ast_spi_board_info[] = {
|
|
+ {
|
|
+ .bus_num = 0,
|
|
+ .chip_select = 0,
|
|
+ .max_speed_hz = 25000000,
|
|
+ .modalias = "m25p80",
|
|
+ .platform_data = &nsb3ast_flash_data,
|
|
+ }
|
|
+};
|
|
+
|
|
+static struct gpio_led nsb3ast_gpio_leds[] = {
|
|
+ {
|
|
+ .name = "nsb3ast:red:d1",
|
|
+ .gpio = 15,
|
|
+ .active_low = 1,
|
|
+ }, {
|
|
+ .name = "nsb3ast:amber:eth",
|
|
+ .gpio = 22,
|
|
+ .active_low = 1,
|
|
+ }
|
|
+};
|
|
+
|
|
+static struct gpio_led_platform_data nsb3ast_gpio_leds_data = {
|
|
+ .num_leds = ARRAY_SIZE(nsb3ast_gpio_leds),
|
|
+ .leds = nsb3ast_gpio_leds,
|
|
+};
|
|
+
|
|
+static struct platform_device nsb3ast_gpio_leds_device = {
|
|
+ .name = "leds-gpio",
|
|
+ .id = -1,
|
|
+ .dev.platform_data = &nsb3ast_gpio_leds_data,
|
|
+};
|
|
+
|
|
+static struct gpio_keys_button nsb3ast_gpio_keys[] = {
|
|
+ {
|
|
+ .code = KEY_RESTART,
|
|
+ .gpio = 0,
|
|
+ .desc = "Reset Button",
|
|
+ .active_low = 1,
|
|
+ },
|
|
+ {
|
|
+ .code = BTN_0,
|
|
+ .gpio = 2,
|
|
+ .desc = "USB Button",
|
|
+ .active_low = 0,
|
|
+ },
|
|
+};
|
|
+
|
|
+static struct gpio_keys_platform_data nsb3ast_gpio_keys_data = {
|
|
+ .buttons = nsb3ast_gpio_keys,
|
|
+ .nbuttons = ARRAY_SIZE(nsb3ast_gpio_keys),
|
|
+};
|
|
+
|
|
+static struct platform_device nsb3ast_gpio_keys_device = {
|
|
+ .name = "gpio-keys",
|
|
+ .id = -1,
|
|
+ .num_resources = 0,
|
|
+ .dev = {
|
|
+ .platform_data = &nsb3ast_gpio_keys_data,
|
|
+ },
|
|
+};
|
|
+
|
|
+static void __init nsb3ast_fixup(struct tag *tags, char **cmdline,
|
|
+ struct meminfo *mi)
|
|
+{
|
|
+ struct tag *t;
|
|
+
|
|
+ /* The board has 32MB of RAM mapped at 0. */
|
|
+ mi->nr_banks = 1;
|
|
+ mi->bank[0].start = 0;
|
|
+ mi->bank[0].size = SZ_32M;
|
|
+
|
|
+ for (t = tags; t->hdr.size; t = tag_next(t)) {
|
|
+ switch (t->hdr.tag) {
|
|
+ case ATAG_CORE:
|
|
+ if (t->u.core.rootdev == 255)
|
|
+ t->u.core.rootdev = 0;
|
|
+ break;
|
|
+ }
|
|
+ }
|
|
+}
|
|
+
|
|
+static void __init nsb3ast_init(void)
|
|
+{
|
|
+ cns21xx_gpio_init();
|
|
+ cns21xx_register_uart0();
|
|
+ cns21xx_register_uart1();
|
|
+ cns21xx_register_wdt();
|
|
+ cns21xx_register_usb();
|
|
+ cns21xx_register_spi_master(-1, nsb3ast_spi_board_info,
|
|
+ ARRAY_SIZE(nsb3ast_spi_board_info));
|
|
+
|
|
+ cns21xx_gec_data.phy_type = CNS21XX_GEC_PHY_TYPE_INTERNAL;
|
|
+ cns21xx_register_gec();
|
|
+
|
|
+ HAL_MISC_DISABLE_LED012_PINS();
|
|
+ platform_device_register(&nsb3ast_gpio_leds_device);
|
|
+ platform_device_register(&nsb3ast_gpio_keys_device);
|
|
+}
|
|
+
|
|
+MACHINE_START(NSB3AST, "AGESTAR NSB3AST")
|
|
+ .fixup = nsb3ast_fixup,
|
|
+ .map_io = cns21xx_map_io,
|
|
+ .init_irq = cns21xx_init_irq,
|
|
+ .timer = &cns21xx_timer,
|
|
+ .init_machine = nsb3ast_init,
|
|
+ .restart = cns21xx_restart,
|
|
+MACHINE_END
|
|
--- a/arch/arm/mach-cns21xx/Makefile
|
|
+++ b/arch/arm/mach-cns21xx/Makefile
|
|
@@ -13,3 +13,4 @@ obj-$(CONFIG_CNS21XX_DEV_SPI_MASTER) +=
|
|
|
|
# machine specific files
|
|
obj-$(CONFIG_MACH_NS_K330) += mach-ns-k330.o
|
|
+obj-$(CONFIG_MACH_NSB3AST) += mach-nsb3ast.o
|