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bf183aeff8
* this adds sflash support for ssb devices * the flash is now a platform device * minor updates git-svn-id: svn://svn.openwrt.org/openwrt/trunk@27902 3c298f89-4303-0410-b956-a3cf2f4a3e73
38 lines
1.0 KiB
Diff
38 lines
1.0 KiB
Diff
From 1c44f60e3fd9336d19f56a67c1efc1129fd728a6 Mon Sep 17 00:00:00 2001
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From: Hauke Mehrtens <hauke@hauke-m.de>
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Date: Mon, 6 Jun 2011 00:07:38 +0200
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Subject: [PATCH 11/26] bcm47xx: fix irq assignment for new SoCs.
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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---
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arch/mips/bcm47xx/irq.c | 12 ++++++++++++
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1 files changed, 12 insertions(+), 0 deletions(-)
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--- a/arch/mips/bcm47xx/irq.c
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+++ b/arch/mips/bcm47xx/irq.c
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@@ -26,6 +26,7 @@
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <asm/irq_cpu.h>
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+#include <bcm47xx.h>
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void plat_irq_dispatch(void)
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{
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@@ -51,5 +52,16 @@ void plat_irq_dispatch(void)
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void __init arch_init_irq(void)
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{
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+#ifdef CONFIG_BCM47XX_BCMA
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+ if (bcm47xx_bus_type == BCM47XX_BUS_TYPE_BCMA) {
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+ bcma_write32(bcm47xx_bus.bcma.bus.drv_mips.core,
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+ BCMA_MIPS_MIPS74K_INTMASK(5), 1 << 31);
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+ /*
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+ * the kernel reads the timer irq from some register and thinks
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+ * it's #5, but we offset it by 2 and route to #7
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+ */
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+ cp0_compare_irq = 7;
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+ }
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+#endif
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mips_cpu_irq_init();
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}
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