mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
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00f29ce9a4
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34162 3c298f89-4303-0410-b956-a3cf2f4a3e73
293 lines
9.7 KiB
C
293 lines
9.7 KiB
C
/* ==========================================================================
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* $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_pcd.h $
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* $Revision: #36 $
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* $Date: 2008/09/26 $
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* $Change: 1103515 $
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*
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* Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
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* "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
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* otherwise expressly agreed to in writing between Synopsys and you.
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*
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* The Software IS NOT an item of Licensed Software or Licensed Product under
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* any End User Software License Agreement or Agreement for Licensed Product
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* with Synopsys or any supplement thereto. You are permitted to use and
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* redistribute this Software in source and binary forms, with or without
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* modification, provided that redistributions of source code must retain this
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* notice. You may not view, use, disclose, copy or distribute this file or
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* any information contained herein except pursuant to this license grant from
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* Synopsys. If you do not agree with this notice, including the disclaimer
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* below, then you are not authorized to use the Software.
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*
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* THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
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* DAMAGE.
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* ========================================================================== */
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#ifndef DWC_HOST_ONLY
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#if !defined(__DWC_PCD_H__)
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#define __DWC_PCD_H__
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#include <linux/types.h>
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#include <linux/list.h>
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#include <linux/errno.h>
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/usb/ch9.h>
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#include <linux/usb/gadget.h>
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#include <linux/interrupt.h>
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#include <linux/dma-mapping.h>
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struct dwc_otg_device;
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#include "otg_cil.h"
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/**
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* @file
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*
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* This file contains the structures, constants, and interfaces for
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* the Perpherial Contoller Driver (PCD).
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*
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* The Peripheral Controller Driver (PCD) for Linux will implement the
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* Gadget API, so that the existing Gadget drivers can be used. For
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* the Mass Storage Function driver the File-backed USB Storage Gadget
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* (FBS) driver will be used. The FBS driver supports the
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* Control-Bulk (CB), Control-Bulk-Interrupt (CBI), and Bulk-Only
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* transports.
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*
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*/
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/** Invalid DMA Address */
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#define DMA_ADDR_INVALID (~(dma_addr_t)0)
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/** Maxpacket size for EP0 */
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#define MAX_EP0_SIZE 64
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/** Maxpacket size for any EP */
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#define MAX_PACKET_SIZE 1024
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/** Max Transfer size for any EP */
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#define MAX_TRANSFER_SIZE 65535
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/** Max DMA Descriptor count for any EP */
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#define MAX_DMA_DESC_CNT 64
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/**
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* Get the pointer to the core_if from the pcd pointer.
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*/
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#define GET_CORE_IF( _pcd ) (_pcd->otg_dev->core_if)
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/**
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* States of EP0.
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*/
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typedef enum ep0_state
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{
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EP0_DISCONNECT, /* no host */
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EP0_IDLE,
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EP0_IN_DATA_PHASE,
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EP0_OUT_DATA_PHASE,
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EP0_IN_STATUS_PHASE,
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EP0_OUT_STATUS_PHASE,
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EP0_STALL,
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} ep0state_e;
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/** Fordward declaration.*/
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struct dwc_otg_pcd;
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/** DWC_otg iso request structure.
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*
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*/
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typedef struct usb_iso_request dwc_otg_pcd_iso_request_t;
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/** PCD EP structure.
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* This structure describes an EP, there is an array of EPs in the PCD
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* structure.
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*/
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typedef struct dwc_otg_pcd_ep
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{
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/** USB EP data */
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struct usb_ep ep;
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/** USB EP Descriptor */
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const struct usb_endpoint_descriptor *desc;
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/** queue of dwc_otg_pcd_requests. */
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struct list_head queue;
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unsigned stopped : 1;
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unsigned disabling : 1;
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unsigned dma : 1;
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unsigned queue_sof : 1;
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#ifdef DWC_EN_ISOC
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/** DWC_otg Isochronous Transfer */
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struct usb_iso_request* iso_req;
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#endif //DWC_EN_ISOC
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/** DWC_otg ep data. */
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dwc_ep_t dwc_ep;
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/** Pointer to PCD */
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struct dwc_otg_pcd *pcd;
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}dwc_otg_pcd_ep_t;
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/** DWC_otg PCD Structure.
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* This structure encapsulates the data for the dwc_otg PCD.
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*/
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typedef struct dwc_otg_pcd
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{
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/** USB gadget */
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struct usb_gadget gadget;
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/** USB gadget driver pointer*/
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struct usb_gadget_driver *driver;
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/** The DWC otg device pointer. */
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struct dwc_otg_device *otg_dev;
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/** State of EP0 */
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ep0state_e ep0state;
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/** EP0 Request is pending */
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unsigned ep0_pending : 1;
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/** Indicates when SET CONFIGURATION Request is in process */
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unsigned request_config : 1;
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/** The state of the Remote Wakeup Enable. */
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unsigned remote_wakeup_enable : 1;
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/** The state of the B-Device HNP Enable. */
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unsigned b_hnp_enable : 1;
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/** The state of A-Device HNP Support. */
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unsigned a_hnp_support : 1;
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/** The state of the A-Device Alt HNP support. */
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unsigned a_alt_hnp_support : 1;
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/** Count of pending Requests */
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unsigned request_pending;
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/** SETUP packet for EP0
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* This structure is allocated as a DMA buffer on PCD initialization
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* with enough space for up to 3 setup packets.
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*/
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union
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{
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struct usb_ctrlrequest req;
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uint32_t d32[2];
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} *setup_pkt;
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dma_addr_t setup_pkt_dma_handle;
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/** 2-byte dma buffer used to return status from GET_STATUS */
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uint16_t *status_buf;
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dma_addr_t status_buf_dma_handle;
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/** EP0 */
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dwc_otg_pcd_ep_t ep0;
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/** Array of IN EPs. */
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dwc_otg_pcd_ep_t in_ep[ MAX_EPS_CHANNELS - 1];
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/** Array of OUT EPs. */
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dwc_otg_pcd_ep_t out_ep[ MAX_EPS_CHANNELS - 1];
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/** number of valid EPs in the above array. */
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// unsigned num_eps : 4;
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spinlock_t lock;
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/** Timer for SRP. If it expires before SRP is successful
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* clear the SRP. */
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struct timer_list srp_timer;
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/** Tasklet to defer starting of TEST mode transmissions until
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* Status Phase has been completed.
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*/
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struct tasklet_struct test_mode_tasklet;
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/** Tasklet to delay starting of xfer in DMA mode */
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struct tasklet_struct *start_xfer_tasklet;
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/** The test mode to enter when the tasklet is executed. */
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unsigned test_mode;
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} dwc_otg_pcd_t;
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/** DWC_otg request structure.
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* This structure is a list of requests.
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*/
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typedef struct
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{
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struct usb_request req; /**< USB Request. */
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struct list_head queue; /**< queue of these requests. */
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} dwc_otg_pcd_request_t;
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extern int dwc_otg_pcd_init(struct platform_device *pdev);
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//extern void dwc_otg_pcd_remove( struct dwc_otg_device *_otg_dev );
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extern void dwc_otg_pcd_remove( struct platform_device *pdev );
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extern int32_t dwc_otg_pcd_handle_intr( dwc_otg_pcd_t *pcd );
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extern void dwc_otg_pcd_start_srp_timer(dwc_otg_pcd_t *pcd );
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extern void dwc_otg_pcd_initiate_srp(dwc_otg_pcd_t *pcd);
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extern void dwc_otg_pcd_remote_wakeup(dwc_otg_pcd_t *pcd, int set);
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extern void dwc_otg_iso_buffer_done(dwc_otg_pcd_ep_t *ep, dwc_otg_pcd_iso_request_t *req);
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extern void dwc_otg_request_done(dwc_otg_pcd_ep_t *_ep, dwc_otg_pcd_request_t *req,
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int status);
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extern void dwc_otg_request_nuke(dwc_otg_pcd_ep_t *_ep);
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extern void dwc_otg_pcd_update_otg(dwc_otg_pcd_t *_pcd,
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const unsigned reset);
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#ifndef VERBOSE
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#define VERIFY_PCD_DMA_ADDR(_addr_) BUG_ON(((_addr_)==DMA_ADDR_INVALID)||\
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((_addr_)==0)||\
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((_addr_)&0x3))
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#else
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#define VERIFY_PCD_DMA_ADDR(_addr_) {\
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if(((_addr_)==DMA_ADDR_INVALID)||\
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((_addr_)==0)||\
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((_addr_)&0x3)) {\
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printk("%s: Invalid DMA address "#_addr_"(%.8x)\n",__func__,_addr_);\
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BUG();\
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}\
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}
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#endif
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static inline void ep_check_and_patch_dma_addr(dwc_otg_pcd_ep_t *ep){
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//void ep_check_and_patch_dma_addr(dwc_otg_pcd_ep_t *ep){
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dwc_ep_t *dwc_ep=&ep->dwc_ep;
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DWC_DEBUGPL(DBG_PCDV,"%s: dwc_ep xfer_buf=%.8x, total_len=%d, dma_addr=%.8x\n",__func__,(u32)dwc_ep->xfer_buff,(dwc_ep->total_len),dwc_ep->dma_addr);
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if (/*(core_if->dma_enable)&&*/(dwc_ep->dma_addr==DMA_ADDR_INVALID)) {
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if((((u32)dwc_ep->xfer_buff)&0x3)==0){
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dwc_ep->dma_addr=dma_map_single(NULL,(void *)(dwc_ep->start_xfer_buff),(dwc_ep->total_len), DMA_TO_DEVICE);
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DWC_DEBUGPL(DBG_PCDV," got dma_addr=%.8x\n",dwc_ep->dma_addr);
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}else{
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DWC_DEBUGPL(DBG_PCDV," buf not aligned, use aligned_buf instead. xfer_buf=%.8x, total_len=%d, aligned_buf_size=%d\n",(u32)dwc_ep->xfer_buff,(dwc_ep->total_len),dwc_ep->aligned_buf_size);
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if(dwc_ep->aligned_buf_size<dwc_ep->total_len){
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if(dwc_ep->aligned_buf){
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//printk(" free buff dwc_ep aligned_buf_size=%d, aligned_buf(%.8x), aligned_dma_addr(%.8x));\n",dwc_ep->aligned_buf_size,dwc_ep->aligned_buf,dwc_ep->aligned_dma_addr);
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//dma_free_coherent(NULL,dwc_ep->aligned_buf_size,dwc_ep->aligned_buf,dwc_ep->aligned_dma_addr);
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kfree(dwc_ep->aligned_buf);
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}
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dwc_ep->aligned_buf_size=((1<<20)>(dwc_ep->total_len<<1))?(dwc_ep->total_len<<1):(1<<20);
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//dwc_ep->aligned_buf = dma_alloc_coherent (NULL, dwc_ep->aligned_buf_size, &dwc_ep->aligned_dma_addr, GFP_KERNEL|GFP_DMA);
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dwc_ep->aligned_buf=kmalloc(dwc_ep->aligned_buf_size,GFP_KERNEL|GFP_DMA|GFP_ATOMIC);
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dwc_ep->aligned_dma_addr=dma_map_single(NULL,(void *)(dwc_ep->aligned_buf),(dwc_ep->aligned_buf_size),DMA_FROM_DEVICE);
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if(!dwc_ep->aligned_buf){
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DWC_ERROR("Cannot alloc required buffer!!\n");
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BUG();
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}
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DWC_DEBUGPL(DBG_PCDV," dwc_ep allocated aligned buf=%.8x, dma_addr=%.8x, size=%d(0x%x)\n", (u32)dwc_ep->aligned_buf, dwc_ep->aligned_dma_addr, dwc_ep->aligned_buf_size, dwc_ep->aligned_buf_size);
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}
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dwc_ep->dma_addr=dwc_ep->aligned_dma_addr;
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if(dwc_ep->is_in) {
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memcpy(dwc_ep->aligned_buf,dwc_ep->xfer_buff,dwc_ep->total_len);
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dma_sync_single_for_device(NULL,dwc_ep->dma_addr,dwc_ep->total_len,DMA_TO_DEVICE);
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}
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}
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}
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}
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#endif
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#endif /* DWC_HOST_ONLY */
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