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openwrt-xburst/target/linux/ar71xx/patches-3.3/108-MIPS-ath79-use-io-accessor-macros-in-pci-ar724x.c.patch
juhosg 33ec8951f8 ar71xx: add preliminary support for 3.3
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@30410 3c298f89-4303-0410-b956-a3cf2f4a3e73
2012-02-10 11:53:56 +00:00

133 lines
3.8 KiB
Diff

From db464f2ad82c03f847d8eabbb8251b5c567e6720 Mon Sep 17 00:00:00 2001
From: Gabor Juhos <juhosg@openwrt.org>
Date: Fri, 18 Nov 2011 11:52:41 +0100
Subject: [PATCH 08/35] MIPS: ath79: use io-accessor macros in pci-ar724x.c
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: René Bolldorf <xsecute@googlemail.com>
v4: - add an Acked-by tag from René
v3: - no changes
v2: - no changes
---
arch/mips/pci/pci-ar724x.c | 38 ++++++++++++++++++++++++--------------
1 files changed, 24 insertions(+), 14 deletions(-)
--- a/arch/mips/pci/pci-ar724x.c
+++ b/arch/mips/pci/pci-ar724x.c
@@ -11,19 +11,19 @@
#include <linux/pci.h>
#include <asm/mach-ath79/pci.h>
-#define reg_read(_phys) (*(unsigned int *) KSEG1ADDR(_phys))
-#define reg_write(_phys, _val) ((*(unsigned int *) KSEG1ADDR(_phys)) = (_val))
-
-#define AR724X_PCI_DEV_BASE 0x14000000
+#define AR724X_PCI_CFG_BASE 0x14000000
+#define AR724X_PCI_CFG_SIZE 0x1000
#define AR724X_PCI_MEM_BASE 0x10000000
#define AR724X_PCI_MEM_SIZE 0x08000000
static DEFINE_SPINLOCK(ar724x_pci_lock);
+static void __iomem *ar724x_pci_devcfg_base;
static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
int size, uint32_t *value)
{
unsigned long flags, addr, tval, mask;
+ void __iomem *base;
if (devfn)
return PCIBIOS_DEVICE_NOT_FOUND;
@@ -31,25 +31,27 @@ static int ar724x_pci_read(struct pci_bu
if (where & (size - 1))
return PCIBIOS_BAD_REGISTER_NUMBER;
+ base = ar724x_pci_devcfg_base;
+
spin_lock_irqsave(&ar724x_pci_lock, flags);
switch (size) {
case 1:
addr = where & ~3;
mask = 0xff000000 >> ((where % 4) * 8);
- tval = reg_read(AR724X_PCI_DEV_BASE + addr);
+ tval = __raw_readl(base + addr);
tval = tval & ~mask;
*value = (tval >> ((4 - (where % 4))*8));
break;
case 2:
addr = where & ~3;
mask = 0xffff0000 >> ((where % 4)*8);
- tval = reg_read(AR724X_PCI_DEV_BASE + addr);
+ tval = __raw_readl(base + addr);
tval = tval & ~mask;
*value = (tval >> ((4 - (where % 4))*8));
break;
case 4:
- *value = reg_read(AR724X_PCI_DEV_BASE + where);
+ *value = __raw_readl(base + where);
break;
default:
spin_unlock_irqrestore(&ar724x_pci_lock, flags);
@@ -66,6 +68,7 @@ static int ar724x_pci_write(struct pci_b
int size, uint32_t value)
{
unsigned long flags, tval, addr, mask;
+ void __iomem *base;
if (devfn)
return PCIBIOS_DEVICE_NOT_FOUND;
@@ -73,27 +76,29 @@ static int ar724x_pci_write(struct pci_b
if (where & (size - 1))
return PCIBIOS_BAD_REGISTER_NUMBER;
+ base = ar724x_pci_devcfg_base;
+
spin_lock_irqsave(&ar724x_pci_lock, flags);
switch (size) {
case 1:
- addr = (AR724X_PCI_DEV_BASE + where) & ~3;
+ addr = where & ~3;
mask = 0xff000000 >> ((where % 4)*8);
- tval = reg_read(addr);
+ tval = __raw_readl(base + addr);
tval = tval & ~mask;
tval |= (value << ((4 - (where % 4))*8)) & mask;
- reg_write(addr, tval);
+ __raw_writel(tval, base + addr);
break;
case 2:
- addr = (AR724X_PCI_DEV_BASE + where) & ~3;
+ addr = where & ~3;
mask = 0xffff0000 >> ((where % 4)*8);
- tval = reg_read(addr);
+ tval = __raw_readl(base + addr);
tval = tval & ~mask;
tval |= (value << ((4 - (where % 4))*8)) & mask;
- reg_write(addr, tval);
+ __raw_writel(tval, base + addr);
break;
case 4:
- reg_write((AR724X_PCI_DEV_BASE + where), value);
+ __raw_writel(value, (base + where));
break;
default:
spin_unlock_irqrestore(&ar724x_pci_lock, flags);
@@ -133,6 +138,11 @@ static struct pci_controller ar724x_pci_
int __init ar724x_pcibios_init(void)
{
+ ar724x_pci_devcfg_base = ioremap(AR724X_PCI_CFG_BASE,
+ AR724X_PCI_CFG_SIZE);
+ if (ar724x_pci_devcfg_base == NULL)
+ return -ENOMEM;
+
register_pci_controller(&ar724x_pci_controller);
return PCIBIOS_SUCCESSFUL;