mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
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a95f9f92e2
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@13619 3c298f89-4303-0410-b956-a3cf2f4a3e73
168 lines
4.3 KiB
Diff
Executable File
168 lines
4.3 KiB
Diff
Executable File
From 0535fda1958587000a4abe711a50d221e0f82379 Mon Sep 17 00:00:00 2001
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From: Andy Green <andy@openmoko.com>
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Date: Fri, 25 Jul 2008 23:16:57 +0100
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Subject: [PATCH] fix-s3c2410-serial-fwd-ref.patch.patch
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Signed-off-by: Andy Green <andy@openmoko.com>
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---
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drivers/serial/s3c2410.c | 129 +++++++++++++++++++++++----------------------
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1 files changed, 66 insertions(+), 63 deletions(-)
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diff --git a/drivers/serial/s3c2410.c b/drivers/serial/s3c2410.c
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index f20f63b..b4833bd 100644
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--- a/drivers/serial/s3c2410.c
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+++ b/drivers/serial/s3c2410.c
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@@ -1167,6 +1167,10 @@ static int s3c24xx_serial_resume(struct platform_device *dev)
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#define s3c24xx_serial_resume NULL
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#endif
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+static void s3c24xx_serial_force_debug_port_up(void);
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+static void s3c2410_printascii(const char *sz);
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+
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+
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static int s3c24xx_serial_init(struct platform_driver *drv,
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struct s3c24xx_uart_info *info)
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{
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@@ -1521,6 +1525,68 @@ static struct platform_driver s3c2440_serial_drv = {
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};
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+static void s3c24xx_serial_force_debug_port_up(void)
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+{
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+ struct s3c24xx_uart_port *ourport = &s3c24xx_serial_ports[
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+ CONFIG_DEBUG_S3C_UART];
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+ struct s3c24xx_uart_clksrc *clksrc = NULL;
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+ struct clk *clk = NULL;
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+ unsigned long tmp;
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+
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+ s3c24xx_serial_getclk(&ourport->port, &clksrc, &clk, 115200);
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+
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+ tmp = __raw_readl(S3C2410_CLKCON);
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+
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+ /* re-start uart clocks */
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+ tmp |= S3C2410_CLKCON_UART0;
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+ tmp |= S3C2410_CLKCON_UART1;
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+ tmp |= S3C2410_CLKCON_UART2;
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+
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+ __raw_writel(tmp, S3C2410_CLKCON);
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+ udelay(10);
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+
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+ s3c24xx_serial_setsource(&ourport->port, clksrc);
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+
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+ if (ourport->baudclk != NULL && !IS_ERR(ourport->baudclk)) {
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+ clk_disable(ourport->baudclk);
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+ ourport->baudclk = NULL;
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+ }
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+
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+ clk_enable(clk);
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+
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+ ourport->clksrc = clksrc;
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+ ourport->baudclk = clk;
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+}
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+
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+static void s3c2410_printascii(const char *sz)
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+{
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+ struct s3c24xx_uart_port *ourport = &s3c24xx_serial_ports[
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+ CONFIG_DEBUG_S3C_UART];
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+ struct uart_port *port = &ourport->port;
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+
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+ /* 8 N 1 */
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+ wr_regl(port, S3C2410_ULCON, (rd_regl(port, S3C2410_ULCON)) | 3);
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+ /* polling mode */
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+ wr_regl(port, S3C2410_UCON, (rd_regl(port, S3C2410_UCON) & ~0xc0f) | 5);
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+ /* disable FIFO */
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+ wr_regl(port, S3C2410_UFCON, (rd_regl(port, S3C2410_UFCON) & ~0x01));
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+ /* fix baud rate */
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+ wr_regl(port, S3C2410_UBRDIV, 26);
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+
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+ while (*sz) {
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+ int timeout = 10000000;
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+
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+ /* spin on it being busy */
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+ while ((!(rd_regl(port, S3C2410_UTRSTAT) & 2)) && timeout--)
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+ ;
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+
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+ /* transmit register */
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+ wr_regl(port, S3C2410_UTXH, *sz);
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+
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+ sz++;
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+ }
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+}
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+
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static inline int s3c2440_serial_init(void)
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{
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return s3c24xx_serial_init(&s3c2440_serial_drv, &s3c2440_uart_inf);
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@@ -1654,69 +1720,6 @@ static struct platform_driver s3c2412_serial_drv = {
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},
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};
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-static void s3c24xx_serial_force_debug_port_up(void)
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-{
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- struct s3c24xx_uart_port *ourport = &s3c24xx_serial_ports[
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- CONFIG_DEBUG_S3C_UART];
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- struct s3c24xx_uart_clksrc *clksrc = NULL;
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- struct clk *clk = NULL;
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- unsigned long tmp;
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-
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- s3c24xx_serial_getclk(&ourport->port, &clksrc, &clk, 115200);
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-
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- tmp = __raw_readl(S3C2410_CLKCON);
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-
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- /* re-start uart clocks */
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- tmp |= S3C2410_CLKCON_UART0;
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- tmp |= S3C2410_CLKCON_UART1;
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- tmp |= S3C2410_CLKCON_UART2;
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-
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- __raw_writel(tmp, S3C2410_CLKCON);
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- udelay(10);
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-
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- s3c24xx_serial_setsource(&ourport->port, clksrc);
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-
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- if (ourport->baudclk != NULL && !IS_ERR(ourport->baudclk)) {
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- clk_disable(ourport->baudclk);
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- ourport->baudclk = NULL;
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- }
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-
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- clk_enable(clk);
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-
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- ourport->clksrc = clksrc;
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- ourport->baudclk = clk;
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-}
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-
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-static void s3c2410_printascii(const char *sz)
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-{
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- struct s3c24xx_uart_port *ourport = &s3c24xx_serial_ports[
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- CONFIG_DEBUG_S3C_UART];
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- struct uart_port *port = &ourport->port;
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-
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- /* 8 N 1 */
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- wr_regl(port, S3C2410_ULCON, (rd_regl(port, S3C2410_ULCON)) | 3);
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- /* polling mode */
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- wr_regl(port, S3C2410_UCON, (rd_regl(port, S3C2410_UCON) & ~0xc0f) | 5);
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- /* disable FIFO */
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- wr_regl(port, S3C2410_UFCON, (rd_regl(port, S3C2410_UFCON) & ~0x01));
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- /* fix baud rate */
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- wr_regl(port, S3C2410_UBRDIV, 26);
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-
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- while (*sz) {
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- int timeout = 10000000;
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-
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- /* spin on it being busy */
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- while ((!(rd_regl(port, S3C2410_UTRSTAT) & 2)) && timeout--)
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- ;
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-
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- /* transmit register */
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- wr_regl(port, S3C2410_UTXH, *sz);
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-
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- sz++;
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- }
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-}
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-
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-
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/* s3c24xx_serial_resetport
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*
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* wrapper to call the specific reset for this port (reset the fifos
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--
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1.5.6.3
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