mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
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bf183aeff8
* this adds sflash support for ssb devices * the flash is now a platform device * minor updates git-svn-id: svn://svn.openwrt.org/openwrt/trunk@27902 3c298f89-4303-0410-b956-a3cf2f4a3e73
418 lines
9.9 KiB
Diff
418 lines
9.9 KiB
Diff
From d743a740b76a6be9e88fe1ae6991682927a7769c Mon Sep 17 00:00:00 2001
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From: Hauke Mehrtens <hauke@hauke-m.de>
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Date: Sat, 18 Jun 2011 14:31:53 +0200
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Subject: [PATCH 04/26] bcma: add SOC bus
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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This patch adds support for using bcma on a Broadcom SoC as the system
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bus. An SoC like the bcm4716 could register this bus and use it to
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searches for the bcma cores and register the devices on this bus.
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BCMA_HOSTTYPE_NONE was intended for SoCs at first but BCMA_HOSTTYPE_SOC
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is a better name.
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Acked-by: Rafał Miłecki <zajec5@gmail.com>
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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---
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drivers/bcma/Kconfig | 4 +
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drivers/bcma/Makefile | 1 +
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drivers/bcma/core.c | 2 +
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drivers/bcma/driver_pci.c | 9 ++-
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drivers/bcma/host_soc.c | 183 +++++++++++++++++++++++++++++++++++++++++
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drivers/bcma/main.c | 9 ++-
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drivers/bcma/scan.c | 42 ++++++++-
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include/linux/bcma/bcma.h | 5 +-
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include/linux/bcma/bcma_soc.h | 16 ++++
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9 files changed, 263 insertions(+), 8 deletions(-)
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create mode 100644 drivers/bcma/host_soc.c
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create mode 100644 include/linux/bcma/bcma_soc.h
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--- a/drivers/bcma/Kconfig
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+++ b/drivers/bcma/Kconfig
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@@ -34,6 +34,10 @@ config BCMA_DRIVER_PCI_HOSTMODE
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help
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PCI core hostmode operation (external PCI bus).
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+config BCMA_HOST_SOC
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+ bool
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+ depends on BCMA && MIPS
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+
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config BCMA_DEBUG
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bool "BCMA debugging"
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depends on BCMA
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--- a/drivers/bcma/Makefile
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+++ b/drivers/bcma/Makefile
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@@ -3,6 +3,7 @@ bcma-y += driver_chipcommon.o driver
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bcma-y += driver_pci.o
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bcma-$(CONFIG_BCMA_DRIVER_PCI_HOSTMODE) += driver_pci_host.o
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bcma-$(CONFIG_BCMA_HOST_PCI) += host_pci.o
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+bcma-$(CONFIG_BCMA_HOST_SOC) += host_soc.o
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obj-$(CONFIG_BCMA) += bcma.o
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ccflags-$(CONFIG_BCMA_DEBUG) := -DDEBUG
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--- a/drivers/bcma/core.c
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+++ b/drivers/bcma/core.c
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@@ -110,6 +110,8 @@ EXPORT_SYMBOL_GPL(bcma_core_pll_ctl);
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u32 bcma_core_dma_translation(struct bcma_device *core)
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{
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switch (core->bus->hosttype) {
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+ case BCMA_HOSTTYPE_SOC:
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+ return 0;
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case BCMA_HOSTTYPE_PCI:
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if (bcma_aread32(core, BCMA_IOST) & BCMA_IOST_DMA64)
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return BCMA_DMA_TRANSLATION_DMA64_CMT;
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--- a/drivers/bcma/driver_pci.c
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+++ b/drivers/bcma/driver_pci.c
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@@ -208,7 +208,14 @@ int bcma_core_pci_irq_ctl(struct bcma_dr
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{
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struct pci_dev *pdev = pc->core->bus->host_pci;
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u32 coremask, tmp;
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- int err;
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+ int err = 0;
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+
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+ if (core->bus->hosttype != BCMA_HOSTTYPE_PCI) {
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+ /* This bcma device is not on a PCI host-bus. So the IRQs are
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+ * not routed through the PCI core.
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+ * So we must not enable routing through the PCI core. */
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+ goto out;
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+ }
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err = pci_read_config_dword(pdev, BCMA_PCI_IRQMASK, &tmp);
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if (err)
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--- /dev/null
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+++ b/drivers/bcma/host_soc.c
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@@ -0,0 +1,183 @@
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+/*
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+ * Broadcom specific AMBA
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+ * System on Chip (SoC) Host
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+ *
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+ * Licensed under the GNU/GPL. See COPYING for details.
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+ */
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+
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+#include "bcma_private.h"
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+#include "scan.h"
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+#include <linux/bcma/bcma.h>
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+#include <linux/bcma/bcma_soc.h>
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+
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+static u8 bcma_host_soc_read8(struct bcma_device *core, u16 offset)
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+{
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+ return readb(core->io_addr + offset);
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+}
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+
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+static u16 bcma_host_soc_read16(struct bcma_device *core, u16 offset)
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+{
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+ return readw(core->io_addr + offset);
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+}
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+
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+static u32 bcma_host_soc_read32(struct bcma_device *core, u16 offset)
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+{
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+ return readl(core->io_addr + offset);
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+}
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+
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+static void bcma_host_soc_write8(struct bcma_device *core, u16 offset,
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+ u8 value)
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+{
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+ writeb(value, core->io_addr + offset);
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+}
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+
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+static void bcma_host_soc_write16(struct bcma_device *core, u16 offset,
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+ u16 value)
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+{
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+ writew(value, core->io_addr + offset);
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+}
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+
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+static void bcma_host_soc_write32(struct bcma_device *core, u16 offset,
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+ u32 value)
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+{
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+ writel(value, core->io_addr + offset);
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+}
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+
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+#ifdef CONFIG_BCMA_BLOCKIO
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+static void bcma_host_soc_block_read(struct bcma_device *core, void *buffer,
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+ size_t count, u16 offset, u8 reg_width)
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+{
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+ void __iomem *addr = core->io_addr + offset;
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+
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+ switch (reg_width) {
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+ case sizeof(u8): {
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+ u8 *buf = buffer;
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+
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+ while (count) {
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+ *buf = __raw_readb(addr);
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+ buf++;
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+ count--;
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+ }
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+ break;
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+ }
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+ case sizeof(u16): {
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+ __le16 *buf = buffer;
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+
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+ WARN_ON(count & 1);
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+ while (count) {
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+ *buf = (__force __le16)__raw_readw(addr);
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+ buf++;
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+ count -= 2;
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+ }
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+ break;
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+ }
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+ case sizeof(u32): {
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+ __le32 *buf = buffer;
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+
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+ WARN_ON(count & 3);
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+ while (count) {
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+ *buf = (__force __le32)__raw_readl(addr);
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+ buf++;
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+ count -= 4;
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+ }
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+ break;
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+ }
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+ default:
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+ WARN_ON(1);
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+ }
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+}
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+
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+static void bcma_host_soc_block_write(struct bcma_device *core,
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+ const void *buffer,
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+ size_t count, u16 offset, u8 reg_width)
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+{
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+ void __iomem *addr = core->io_addr + offset;
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+
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+ switch (reg_width) {
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+ case sizeof(u8): {
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+ const u8 *buf = buffer;
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+
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+ while (count) {
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+ __raw_writeb(*buf, addr);
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+ buf++;
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+ count--;
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+ }
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+ break;
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+ }
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+ case sizeof(u16): {
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+ const __le16 *buf = buffer;
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+
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+ WARN_ON(count & 1);
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+ while (count) {
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+ __raw_writew((__force u16)(*buf), addr);
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+ buf++;
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+ count -= 2;
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+ }
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+ break;
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+ }
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+ case sizeof(u32): {
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+ const __le32 *buf = buffer;
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+
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+ WARN_ON(count & 3);
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+ while (count) {
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+ __raw_writel((__force u32)(*buf), addr);
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+ buf++;
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+ count -= 4;
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+ }
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+ break;
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+ }
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+ default:
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+ WARN_ON(1);
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+ }
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+}
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+#endif /* CONFIG_BCMA_BLOCKIO */
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+
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+static u32 bcma_host_soc_aread32(struct bcma_device *core, u16 offset)
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+{
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+ return readl(core->io_wrap + offset);
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+}
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+
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+static void bcma_host_soc_awrite32(struct bcma_device *core, u16 offset,
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+ u32 value)
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+{
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+ writel(value, core->io_wrap + offset);
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+}
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+
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+const struct bcma_host_ops bcma_host_soc_ops = {
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+ .read8 = bcma_host_soc_read8,
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+ .read16 = bcma_host_soc_read16,
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+ .read32 = bcma_host_soc_read32,
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+ .write8 = bcma_host_soc_write8,
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+ .write16 = bcma_host_soc_write16,
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+ .write32 = bcma_host_soc_write32,
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+#ifdef CONFIG_BCMA_BLOCKIO
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+ .block_read = bcma_host_soc_block_read,
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+ .block_write = bcma_host_soc_block_write,
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+#endif
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+ .aread32 = bcma_host_soc_aread32,
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+ .awrite32 = bcma_host_soc_awrite32,
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+};
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+
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+int __init bcma_host_soc_register(struct bcma_soc *soc)
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+{
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+ struct bcma_bus *bus = &soc->bus;
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+ int err;
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+
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+ /* iomap only first core. We have to read some register on this core
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+ * to scan the bus.
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+ */
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+ bus->mmio = ioremap_nocache(BCMA_ADDR_BASE, BCMA_CORE_SIZE * 1);
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+ if (!bus->mmio)
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+ return -ENOMEM;
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+
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+ /* Host specific */
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+ bus->hosttype = BCMA_HOSTTYPE_SOC;
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+ bus->ops = &bcma_host_soc_ops;
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+
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+ /* Register */
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+ err = bcma_bus_early_register(bus, &soc->core_cc, &soc->core_mips);
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+ if (err)
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+ iounmap(bus->mmio);
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+
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+ return err;
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+}
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--- a/drivers/bcma/main.c
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+++ b/drivers/bcma/main.c
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@@ -66,6 +66,10 @@ static struct bcma_device *bcma_find_cor
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static void bcma_release_core_dev(struct device *dev)
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{
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struct bcma_device *core = container_of(dev, struct bcma_device, dev);
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+ if (core->io_addr)
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+ iounmap(core->io_addr);
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+ if (core->io_wrap)
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+ iounmap(core->io_wrap);
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kfree(core);
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}
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@@ -93,7 +97,10 @@ static int bcma_register_cores(struct bc
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core->dma_dev = &bus->host_pci->dev;
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core->irq = bus->host_pci->irq;
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break;
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- case BCMA_HOSTTYPE_NONE:
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+ case BCMA_HOSTTYPE_SOC:
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+ core->dev.dma_mask = &core->dev.coherent_dma_mask;
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+ core->dma_dev = &core->dev;
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+ break;
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case BCMA_HOSTTYPE_SDIO:
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break;
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}
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--- a/drivers/bcma/scan.c
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+++ b/drivers/bcma/scan.c
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@@ -337,6 +337,16 @@ static int bcma_get_next_core(struct bcm
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}
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}
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}
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+ if (bus->hosttype == BCMA_HOSTTYPE_SOC) {
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+ core->io_addr = ioremap_nocache(core->addr, BCMA_CORE_SIZE);
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+ if (!core->io_addr)
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+ return -ENOMEM;
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+ core->io_wrap = ioremap_nocache(core->wrap, BCMA_CORE_SIZE);
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+ if (!core->io_wrap) {
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+ iounmap(core->io_addr);
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+ return -ENOMEM;
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+ }
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+ }
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return 0;
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}
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@@ -369,7 +379,14 @@ int bcma_bus_scan(struct bcma_bus *bus)
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bcma_init_bus(bus);
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erombase = bcma_scan_read32(bus, 0, BCMA_CC_EROM);
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- eromptr = bus->mmio;
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+ if (bus->hosttype == BCMA_HOSTTYPE_SOC) {
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+ eromptr = ioremap_nocache(erombase, BCMA_CORE_SIZE);
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+ if (!eromptr)
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+ return -ENOMEM;
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+ } else {
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+ eromptr = bus->mmio;
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+ }
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+
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eromend = eromptr + BCMA_CORE_SIZE / sizeof(u32);
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bcma_scan_switch_core(bus, erombase);
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@@ -404,6 +421,9 @@ int bcma_bus_scan(struct bcma_bus *bus)
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list_add(&core->list, &bus->cores);
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}
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+ if (bus->hosttype == BCMA_HOSTTYPE_SOC)
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+ iounmap(eromptr);
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+
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return 0;
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}
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@@ -414,10 +434,18 @@ int __init bcma_bus_scan_early(struct bc
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u32 erombase;
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u32 __iomem *eromptr, *eromend;
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- int err, core_num = 0;
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+ int err = -ENODEV;
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+ int core_num = 0;
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erombase = bcma_scan_read32(bus, 0, BCMA_CC_EROM);
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- eromptr = bus->mmio;
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+ if (bus->hosttype == BCMA_HOSTTYPE_SOC) {
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+ eromptr = ioremap_nocache(erombase, BCMA_CORE_SIZE);
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+ if (!eromptr)
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+ return -ENOMEM;
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+ } else {
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+ eromptr = bus->mmio;
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+ }
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+
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eromend = eromptr + BCMA_CORE_SIZE / sizeof(u32);
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bcma_scan_switch_core(bus, erombase);
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@@ -447,8 +475,12 @@ int __init bcma_bus_scan_early(struct bc
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core->id.class);
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list_add(&core->list, &bus->cores);
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- return 0;
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+ err = 0;
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+ break;
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}
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- return -ENODEV;
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+ if (bus->hosttype == BCMA_HOSTTYPE_SOC)
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+ iounmap(eromptr);
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+
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+ return err;
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}
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--- a/include/linux/bcma/bcma.h
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+++ b/include/linux/bcma/bcma.h
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@@ -14,9 +14,9 @@ struct bcma_device;
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struct bcma_bus;
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enum bcma_hosttype {
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- BCMA_HOSTTYPE_NONE,
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BCMA_HOSTTYPE_PCI,
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BCMA_HOSTTYPE_SDIO,
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+ BCMA_HOSTTYPE_SOC,
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};
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struct bcma_chipinfo {
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@@ -138,6 +138,9 @@ struct bcma_device {
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u32 addr;
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u32 wrap;
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+ void __iomem *io_addr;
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+ void __iomem *io_wrap;
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+
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void *drvdata;
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struct list_head list;
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};
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--- /dev/null
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+++ b/include/linux/bcma/bcma_soc.h
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@@ -0,0 +1,16 @@
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+#ifndef LINUX_BCMA_SOC_H_
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+#define LINUX_BCMA_SOC_H_
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+
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+#include <linux/bcma/bcma.h>
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+
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+struct bcma_soc {
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+ struct bcma_bus bus;
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+ struct bcma_device core_cc;
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+ struct bcma_device core_mips;
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+};
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+
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+int __init bcma_host_soc_register(struct bcma_soc *soc);
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+
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+int bcma_bus_register(struct bcma_bus *bus);
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+
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+#endif /* LINUX_BCMA_SOC_H_ */
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