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d8297bb0a4
* based on a patch by Hauke Mehrtens * closes #4193 git-svn-id: svn://svn.openwrt.org/openwrt/trunk@13192 3c298f89-4303-0410-b956-a3cf2f4a3e73
102 lines
2.9 KiB
Diff
102 lines
2.9 KiB
Diff
From a9f65413f9ea81ef2208da66a3db9cb8a9020eef Mon Sep 17 00:00:00 2001
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From: Maxime Bizon <mbizon@freebox.fr>
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Date: Fri, 18 Jul 2008 15:53:08 +0200
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Subject: [PATCH] [MIPS] BCM63XX: Add Broadcom 63xx CPU definitions.
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Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
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---
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arch/mips/kernel/cpu-probe.c | 25 +++++++++++++++++++++++++
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arch/mips/mm/tlbex.c | 4 ++++
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include/asm-mips/cpu.h | 7 +++++++
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3 files changed, 36 insertions(+), 0 deletions(-)
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--- a/arch/mips/kernel/cpu-probe.c
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+++ b/arch/mips/kernel/cpu-probe.c
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@@ -153,6 +153,10 @@ void __init check_wait(void)
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case CPU_25KF:
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case CPU_PR4450:
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case CPU_BCM3302:
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+ case CPU_BCM6338:
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+ case CPU_BCM6345:
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+ case CPU_BCM6348:
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+ case CPU_BCM6358:
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cpu_wait = r4k_wait;
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break;
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@@ -802,11 +806,28 @@ static inline void cpu_probe_broadcom(st
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decode_configs(c);
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switch (c->processor_id & 0xff00) {
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case PRID_IMP_BCM3302:
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+ /* same as PRID_IMP_BCM6338 */
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c->cputype = CPU_BCM3302;
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break;
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case PRID_IMP_BCM4710:
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c->cputype = CPU_BCM4710;
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break;
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+ case PRID_IMP_BCM6345:
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+ c->cputype = CPU_BCM6345;
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+ break;
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+ case PRID_IMP_BCM6348:
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+ c->cputype = CPU_BCM6348;
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+ break;
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+ case PRID_IMP_BCM4350:
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+ switch (c->processor_id & 0xf0) {
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+ case PRID_REV_BCM6358:
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+ c->cputype = CPU_BCM6358;
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+ break;
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+ default:
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+ c->cputype = CPU_UNKNOWN;
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+ break;
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+ }
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+ break;
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default:
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c->cputype = CPU_UNKNOWN;
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break;
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@@ -892,6 +913,10 @@ static __cpuinit const char *cpu_to_name
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case CPU_SR71000: name = "Sandcraft SR71000"; break;
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case CPU_BCM3302: name = "Broadcom BCM3302"; break;
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case CPU_BCM4710: name = "Broadcom BCM4710"; break;
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+ case CPU_BCM6338: name = "Broadcom BCM6338"; break;
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+ case CPU_BCM6345: name = "Broadcom BCM6345"; break;
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+ case CPU_BCM6348: name = "Broadcom BCM6348"; break;
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+ case CPU_BCM6358: name = "Broadcom BCM6358"; break;
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case CPU_PR4450: name = "Philips PR4450"; break;
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case CPU_LOONGSON2: name = "ICT Loongson-2"; break;
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default:
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--- a/arch/mips/mm/tlbex.c
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+++ b/arch/mips/mm/tlbex.c
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@@ -317,6 +317,10 @@ static void __cpuinit build_tlb_write_en
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case CPU_BCM3302:
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case CPU_BCM4710:
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case CPU_LOONGSON2:
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+ case CPU_BCM6338:
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+ case CPU_BCM6345:
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+ case CPU_BCM6348:
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+ case CPU_BCM6358:
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if (m4kc_tlbp_war())
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uasm_i_nop(p);
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tlbw(p);
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--- a/include/asm-mips/cpu.h
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+++ b/include/asm-mips/cpu.h
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@@ -112,6 +112,12 @@
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#define PRID_IMP_BCM4710 0x4000
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#define PRID_IMP_BCM3302 0x9000
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+#define PRID_IMP_BCM6338 0x9000
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+#define PRID_IMP_BCM6345 0x8000
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+#define PRID_IMP_BCM6348 0x9100
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+#define PRID_IMP_BCM4350 0xA000
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+#define PRID_REV_BCM6358 0x0010
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+#define PRID_REV_BCM6368 0x0030
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/*
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* Definitions for 7:0 on legacy processors
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@@ -198,6 +204,7 @@ enum cpu_type_enum {
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CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_1004K, CPU_74K,
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CPU_AU1000, CPU_AU1100, CPU_AU1200, CPU_AU1210, CPU_AU1250, CPU_AU1500,
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CPU_AU1550, CPU_PR4450, CPU_BCM3302, CPU_BCM4710,
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+ CPU_BCM6338, CPU_BCM6345, CPU_BCM6348, CPU_BCM6358,
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/*
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* MIPS64 class processors
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