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git://projects.qi-hardware.com/openwrt-xburst.git
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a95f9f92e2
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@13619 3c298f89-4303-0410-b956-a3cf2f4a3e73
29 lines
1013 B
Diff
Executable File
29 lines
1013 B
Diff
Executable File
From bc0d09dd89a8837b9a4eeb63585caded6b290cf9 Mon Sep 17 00:00:00 2001
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From: mokopatches <mokopatches@openmoko.org>
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Date: Fri, 25 Jul 2008 22:21:22 +0100
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Subject: [PATCH] s3c2440-nand-disable-hwecc.patch
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Disable the hardware ECC checking on S3C2440 based platforms (HXD8, SMDK2440,
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GTA02) for the time being, since our u-boot doesn't yet support it for 2k page
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size NAND
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---
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drivers/mtd/nand/s3c2410.c | 2 +-
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1 files changed, 1 insertions(+), 1 deletions(-)
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diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c
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index 6e7a5b9..8e1e482 100644
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--- a/drivers/mtd/nand/s3c2410.c
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+++ b/drivers/mtd/nand/s3c2410.c
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@@ -665,7 +665,7 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
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nmtd->mtd.owner = THIS_MODULE;
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nmtd->set = set;
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- if (hardware_ecc) {
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+ if (info->cpu_type == TYPE_S3C2410 && hardware_ecc) {
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chip->ecc.calculate = s3c2410_nand_calculate_ecc;
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chip->ecc.correct = s3c2410_nand_correct_data;
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chip->ecc.mode = NAND_ECC_HW;
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--
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1.5.6.3
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