mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-21 11:20:50 +02:00
a210854b74
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@16048 3c298f89-4303-0410-b956-a3cf2f4a3e73
419 lines
12 KiB
Diff
419 lines
12 KiB
Diff
--- a/arch/arm/mach-s3c2410/include/mach/spi-gpio.h
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+++ b/arch/arm/mach-s3c2410/include/mach/spi-gpio.h
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@@ -21,7 +21,8 @@ struct s3c2410_spigpio_info {
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int num_chipselect;
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int bus_num;
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- void (*chip_select)(struct s3c2410_spigpio_info *spi, int cs);
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+ int non_blocking_transfer;
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+ void (*chip_select)(struct s3c2410_spigpio_info *spi, int csid, int cs);
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};
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--- a/drivers/spi/spi_bitbang.c
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+++ b/drivers/spi/spi_bitbang.c
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@@ -264,6 +264,123 @@ static int spi_bitbang_bufs(struct spi_d
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* Drivers can provide word-at-a-time i/o primitives, or provide
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* transfer-at-a-time ones to leverage dma or fifo hardware.
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*/
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+
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+/* Synchronous non blocking transfer */
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+int
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+spi_bitbang_transfer_sync(struct spi_device *spi, struct spi_message *m)
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+{
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+ struct spi_bitbang *bitbang = spi_master_get_devdata(spi->master);
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+ struct spi_transfer *t;
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+ unsigned long flags;
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+ int cs_change = 1;
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+ int status;
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+ int nsecs;
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+ int (*setup_transfer)(struct spi_device *, struct spi_transfer *);
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+
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+ /* FIXME this is made-up ... the correct value is known to
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+ * word-at-a-time bitbang code, and presumably chipselect()
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+ * should enforce these requirements too?
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+ */
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+ nsecs = 100;
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+ cs_change = 1;
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+ status = 0;
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+ setup_transfer = NULL;
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+
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+ local_irq_save(flags);
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+ list_for_each_entry (t, &m->transfers, transfer_list) {
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+ /* override or restore speed and wordsize */
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+ if (t->speed_hz || t->bits_per_word) {
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+ setup_transfer = bitbang->setup_transfer;
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+ if (!setup_transfer) {
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+ status = -ENOPROTOOPT;
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+ break;
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+ }
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+ }
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+ if (setup_transfer) {
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+ status = setup_transfer(spi, t);
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+ if (status < 0)
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+ break;
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+ }
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+
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+ /* set up default clock polarity, and activate chip;
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+ * this implicitly updates clock and spi modes as
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+ * previously recorded for this device via setup().
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+ * (and also deselects any other chip that might be
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+ * selected ...)
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+ */
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+
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+ if (cs_change) {
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+ bitbang->chipselect(spi, BITBANG_CS_ACTIVE);
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+ ndelay(nsecs);
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+ }
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+
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+ cs_change = t->cs_change;
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+ if (!t->tx_buf && !t->rx_buf && t->len) {
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+ status = -EINVAL;
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+ break;
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+ }
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+
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+ /* transfer data. the lower level code handles any
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+ * new dma mappings it needs. our caller always gave
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+ * us dma-safe buffers.
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+ */
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+ if (t->len) {
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+ /* REVISIT dma API still needs a designated
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+ * DMA_ADDR_INVALID; ~0 might be better.
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+ */
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+ if (!m->is_dma_mapped)
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+ t->rx_dma = t->tx_dma = 0;
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+ status = bitbang->txrx_bufs(spi, t);
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+ }
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+
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+ if (status > 0)
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+ m->actual_length += status;
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+ if (status != t->len) {
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+ /* always report some kind of error */
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+ if (status >= 0)
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+ status = -EREMOTEIO;
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+ break;
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+ }
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+ status = 0;
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+ /* protocol tweaks before next transfer */
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+ if (t->delay_usecs)
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+ udelay(t->delay_usecs);
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+ if (!cs_change)
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+ continue;
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+ if (t->transfer_list.next == &m->transfers)
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+ break;
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+ /* sometimes a short mid-message deselect of the chip
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+ * may be needed to terminate a mode or command
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+ */
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+ ndelay(nsecs);
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+ bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
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+ ndelay(nsecs);
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+ }
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+
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+ m->status = status;
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+ if (m->complete)
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+ m->complete(m->context);
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+
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+ /* restore speed and wordsize */
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+ if (setup_transfer)
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+ setup_transfer(spi, NULL);
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+
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+ /* normally deactivate chipselect ... unless no error and
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+ * cs_change has hinted that the next message will probably
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+ * be for this chip too.
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+ */
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+ if (!(status == 0 && cs_change)) {
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+ ndelay(nsecs);
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+ bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
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+ ndelay(nsecs);
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+ }
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+
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+ local_irq_restore(flags);
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+
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+ return status;
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+}
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+EXPORT_SYMBOL_GPL(spi_bitbang_transfer_sync);
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+
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static void bitbang_work(struct work_struct *work)
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{
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struct spi_bitbang *bitbang =
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@@ -274,120 +391,13 @@ static void bitbang_work(struct work_str
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bitbang->busy = 1;
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while (!list_empty(&bitbang->queue)) {
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struct spi_message *m;
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- struct spi_device *spi;
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- unsigned nsecs;
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- struct spi_transfer *t = NULL;
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- unsigned tmp;
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- unsigned cs_change;
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- int status;
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- int (*setup_transfer)(struct spi_device *,
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- struct spi_transfer *);
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m = container_of(bitbang->queue.next, struct spi_message,
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queue);
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list_del_init(&m->queue);
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- spin_unlock_irqrestore(&bitbang->lock, flags);
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-
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- /* FIXME this is made-up ... the correct value is known to
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- * word-at-a-time bitbang code, and presumably chipselect()
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- * should enforce these requirements too?
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- */
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- nsecs = 100;
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-
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- spi = m->spi;
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- tmp = 0;
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- cs_change = 1;
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- status = 0;
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- setup_transfer = NULL;
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-
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- list_for_each_entry (t, &m->transfers, transfer_list) {
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-
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- /* override or restore speed and wordsize */
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- if (t->speed_hz || t->bits_per_word) {
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- setup_transfer = bitbang->setup_transfer;
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- if (!setup_transfer) {
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- status = -ENOPROTOOPT;
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- break;
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- }
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- }
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- if (setup_transfer) {
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- status = setup_transfer(spi, t);
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- if (status < 0)
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- break;
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- }
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-
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- /* set up default clock polarity, and activate chip;
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- * this implicitly updates clock and spi modes as
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- * previously recorded for this device via setup().
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- * (and also deselects any other chip that might be
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- * selected ...)
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- */
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- if (cs_change) {
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- bitbang->chipselect(spi, BITBANG_CS_ACTIVE);
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- ndelay(nsecs);
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- }
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- cs_change = t->cs_change;
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- if (!t->tx_buf && !t->rx_buf && t->len) {
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- status = -EINVAL;
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- break;
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- }
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-
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- /* transfer data. the lower level code handles any
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- * new dma mappings it needs. our caller always gave
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- * us dma-safe buffers.
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- */
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- if (t->len) {
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- /* REVISIT dma API still needs a designated
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- * DMA_ADDR_INVALID; ~0 might be better.
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- */
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- if (!m->is_dma_mapped)
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- t->rx_dma = t->tx_dma = 0;
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- status = bitbang->txrx_bufs(spi, t);
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- }
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- if (status > 0)
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- m->actual_length += status;
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- if (status != t->len) {
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- /* always report some kind of error */
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- if (status >= 0)
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- status = -EREMOTEIO;
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- break;
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- }
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- status = 0;
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-
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- /* protocol tweaks before next transfer */
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- if (t->delay_usecs)
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- udelay(t->delay_usecs);
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-
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- if (!cs_change)
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- continue;
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- if (t->transfer_list.next == &m->transfers)
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- break;
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-
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- /* sometimes a short mid-message deselect of the chip
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- * may be needed to terminate a mode or command
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- */
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- ndelay(nsecs);
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- bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
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- ndelay(nsecs);
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- }
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-
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- m->status = status;
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- m->complete(m->context);
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-
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- /* restore speed and wordsize */
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- if (setup_transfer)
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- setup_transfer(spi, NULL);
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-
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- /* normally deactivate chipselect ... unless no error and
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- * cs_change has hinted that the next message will probably
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- * be for this chip too.
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- */
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- if (!(status == 0 && cs_change)) {
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- ndelay(nsecs);
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- bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
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- ndelay(nsecs);
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- }
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+ spin_unlock_irqrestore(&bitbang->lock, flags);
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+ spi_bitbang_transfer_sync(m->spi, m);
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spin_lock_irqsave(&bitbang->lock, flags);
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}
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bitbang->busy = 0;
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@@ -459,6 +469,9 @@ int spi_bitbang_start(struct spi_bitbang
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if (!bitbang->master->transfer)
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bitbang->master->transfer = spi_bitbang_transfer;
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+ if (!bitbang->master->transfer_sync && bitbang->non_blocking_transfer)
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+ bitbang->master->transfer_sync = spi_bitbang_transfer_sync;
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+
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if (!bitbang->txrx_bufs) {
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bitbang->use_dma = 0;
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bitbang->txrx_bufs = spi_bitbang_bufs;
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--- a/drivers/spi/spi_s3c24xx_gpio.c
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+++ b/drivers/spi/spi_s3c24xx_gpio.c
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@@ -91,7 +91,7 @@ static void s3c2410_spigpio_chipselect(s
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struct s3c2410_spigpio *sg = spidev_to_sg(dev);
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if (sg->info && sg->info->chip_select)
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- (sg->info->chip_select)(sg->info, value);
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+ (sg->info->chip_select)(sg->info, dev->chip_select, value);
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}
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static int s3c2410_spigpio_probe(struct platform_device *dev)
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@@ -112,14 +112,17 @@ static int s3c2410_spigpio_probe(struct
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platform_set_drvdata(dev, sp);
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- /* copy in the plkatform data */
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+ /* copy in the platform data */
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info = sp->info = dev->dev.platform_data;
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+ master->num_chipselect = info->num_chipselect;
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+
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/* setup spi bitbang adaptor */
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sp->bitbang.master = spi_master_get(master);
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sp->bitbang.master->bus_num = info->bus_num;
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sp->bitbang.master->num_chipselect = info->num_chipselect;
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sp->bitbang.chipselect = s3c2410_spigpio_chipselect;
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+ sp->bitbang.non_blocking_transfer = info->non_blocking_transfer;
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sp->bitbang.txrx_word[SPI_MODE_0] = s3c2410_spigpio_txrx_mode0;
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sp->bitbang.txrx_word[SPI_MODE_1] = s3c2410_spigpio_txrx_mode1;
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--- a/include/linux/mmc/core.h
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+++ b/include/linux/mmc/core.h
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@@ -129,6 +129,8 @@ struct mmc_request {
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struct mmc_host;
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struct mmc_card;
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+extern void mmc_flush_scheduled_work(void);
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+
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extern void mmc_wait_for_req(struct mmc_host *, struct mmc_request *);
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extern int mmc_wait_for_cmd(struct mmc_host *, struct mmc_command *, int);
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extern int mmc_wait_for_app_cmd(struct mmc_host *, struct mmc_card *,
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--- a/include/linux/mmc/sdio_ids.h
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+++ b/include/linux/mmc/sdio_ids.h
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@@ -25,5 +25,9 @@
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#define SDIO_VENDOR_ID_MARVELL 0x02df
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#define SDIO_DEVICE_ID_MARVELL_LIBERTAS 0x9103
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+#define SDIO_DEVICE_ID_MARVELL_88W8688 0x9104
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+#define SDIO_VENDOR_ID_ATHEROS 0x0271
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+#define SDIO_DEVICE_ID_ATHEROS_AR6001 0x0100
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+#define SDIO_DEVICE_ID_ATHEROS_AR6002 0x0200
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#endif
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--- a/include/linux/spi/spi_bitbang.h
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+++ b/include/linux/spi/spi_bitbang.h
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@@ -31,6 +31,9 @@ struct spi_bitbang {
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u8 use_dma;
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u8 flags; /* extra spi->mode support */
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+ /* Support for synchronous non blocking transfers */
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+ int non_blocking_transfer;
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+
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struct spi_master *master;
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/* setup_transfer() changes clock and/or wordsize to match settings
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@@ -62,6 +65,8 @@ extern void spi_bitbang_cleanup(struct s
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extern int spi_bitbang_transfer(struct spi_device *spi, struct spi_message *m);
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extern int spi_bitbang_setup_transfer(struct spi_device *spi,
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struct spi_transfer *t);
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+extern int spi_bitbang_transfer_sync(struct spi_device *spi,
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+ struct spi_message *m);
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/* start or stop queue processing */
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extern int spi_bitbang_start(struct spi_bitbang *spi);
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--- a/include/linux/spi/spi.h
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+++ b/include/linux/spi/spi.h
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@@ -204,7 +204,6 @@ static inline void spi_unregister_driver
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* SPI slaves, and are numbered from zero to num_chipselects.
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* each slave has a chipselect signal, but it's common that not
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* every chipselect is connected to a slave.
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- * @dma_alignment: SPI controller constraint on DMA buffers alignment.
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* @setup: updates the device mode and clocking records used by a
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* device's SPI controller; protocol code may call this. This
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* must fail if an unrecognized or unsupported mode is requested.
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@@ -240,17 +239,7 @@ struct spi_master {
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*/
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u16 num_chipselect;
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- /* some SPI controllers pose alignment requirements on DMAable
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- * buffers; let protocol drivers know about these requirements.
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- */
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- u16 dma_alignment;
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-
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- /* Setup mode and clock, etc (spi driver may call many times).
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- *
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- * IMPORTANT: this may be called when transfers to another
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- * device are active. DO NOT UPDATE SHARED REGISTERS in ways
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- * which could break those transfers.
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- */
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+ /* setup mode and clock, etc (spi driver may call many times) */
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int (*setup)(struct spi_device *spi);
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/* bidirectional bulk transfers
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@@ -275,6 +264,13 @@ struct spi_master {
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int (*transfer)(struct spi_device *spi,
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struct spi_message *mesg);
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+ /*
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+ * Synchronous non blocking transfer function. Should guarantee
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+ * data availability when it returns
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+ */
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+ int (*transfer_sync)(struct spi_device *spi,
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+ struct spi_message *mesg);
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+
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/* called on release() to free memory provided by spi_master */
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void (*cleanup)(struct spi_device *spi);
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};
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@@ -584,6 +580,29 @@ spi_async(struct spi_device *spi, struct
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return spi->master->transfer(spi, message);
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}
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+/**
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+ * spi_non_blocking_transfer - Synchronous, non blocking transfer
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+ * @spi: device with which data will be exchanged
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+ * @message: describes the data transfers with optional completion handlers
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+ * Context: any (irqs may be blocked, etc)
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+ *
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+ * Data is guaranteed to be written or read when this function returns.
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+ *
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+ * Note : This may not be supported by all spi masters.
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+ */
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+
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+static inline int
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+spi_non_blocking_transfer(struct spi_device *spi, struct spi_message *message)
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+{
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+ if (unlikely(!spi->master->transfer_sync)) {
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+ dev_err(&spi->master->dev,
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+ "non-blocking transfers not supported\n");
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+ return -EIO;
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+ }
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+
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+ return spi->master->transfer_sync(spi, message);
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+}
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+
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/*---------------------------------------------------------------------------*/
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/* All these synchronous SPI transfer routines are utilities layered
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