mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
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874 lines
23 KiB
C
874 lines
23 KiB
C
/*
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* linux/arch/mips/jz4740/proc.c
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*
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* /proc/jz/ procfs for jz4740 on-chip modules.
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*
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* Copyright (C) 2006 Ingenic Semiconductor Inc.
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* Author: <jlwei@ingenic.cn>
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*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License (Version 2) as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/sysctl.h>
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#include <linux/proc_fs.h>
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#include <linux/page-flags.h>
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#include <asm/uaccess.h>
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#include <asm/pgtable.h>
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#include <asm/jzsoc.h>
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//#define DEBUG 1
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#undef DEBUG
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struct proc_dir_entry *proc_jz_root;
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/*
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* EMC Modules
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*/
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static int emc_read_proc (char *page, char **start, off_t off,
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int count, int *eof, void *data)
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{
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int len = 0;
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len += sprintf (page+len, "SMCR(0-5): 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", REG_EMC_SMCR0, REG_EMC_SMCR1, REG_EMC_SMCR2, REG_EMC_SMCR3, REG_EMC_SMCR4);
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len += sprintf (page+len, "SACR(0-5): 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", REG_EMC_SACR0, REG_EMC_SACR1, REG_EMC_SACR2, REG_EMC_SACR3, REG_EMC_SACR4);
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len += sprintf (page+len, "DMCR: 0x%08x\n", REG_EMC_DMCR);
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len += sprintf (page+len, "RTCSR: 0x%04x\n", REG_EMC_RTCSR);
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len += sprintf (page+len, "RTCOR: 0x%04x\n", REG_EMC_RTCOR);
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return len;
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}
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/*
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* Power Manager Module
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*/
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static int pmc_read_proc (char *page, char **start, off_t off,
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int count, int *eof, void *data)
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{
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int len = 0;
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unsigned long lcr = REG_CPM_LCR;
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unsigned long clkgr = REG_CPM_CLKGR;
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len += sprintf (page+len, "Low Power Mode : %s\n",
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((lcr & CPM_LCR_LPM_MASK) == (CPM_LCR_LPM_IDLE)) ?
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"IDLE" : (((lcr & CPM_LCR_LPM_MASK) == (CPM_LCR_LPM_SLEEP)) ?
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"SLEEP" : "HIBERNATE"));
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len += sprintf (page+len, "Doze Mode : %s\n",
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(lcr & CPM_LCR_DOZE_ON) ? "on" : "off");
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if (lcr & CPM_LCR_DOZE_ON)
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len += sprintf (page+len, " duty : %d\n", (int)((lcr & CPM_LCR_DOZE_DUTY_MASK) >> CPM_LCR_DOZE_DUTY_BIT));
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len += sprintf (page+len, "IPU : %s\n",
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(clkgr & CPM_CLKGR_IPU) ? "stopped" : "running");
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len += sprintf (page+len, "DMAC : %s\n",
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(clkgr & CPM_CLKGR_DMAC) ? "stopped" : "running");
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len += sprintf (page+len, "UHC : %s\n",
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(clkgr & CPM_CLKGR_UHC) ? "stopped" : "running");
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len += sprintf (page+len, "UDC : %s\n",
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(clkgr & CPM_CLKGR_UDC) ? "stopped" : "running");
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len += sprintf (page+len, "LCD : %s\n",
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(clkgr & CPM_CLKGR_LCD) ? "stopped" : "running");
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len += sprintf (page+len, "CIM : %s\n",
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(clkgr & CPM_CLKGR_CIM) ? "stopped" : "running");
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len += sprintf (page+len, "SADC : %s\n",
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(clkgr & CPM_CLKGR_SADC) ? "stopped" : "running");
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len += sprintf (page+len, "MSC : %s\n",
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(clkgr & CPM_CLKGR_MSC) ? "stopped" : "running");
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len += sprintf (page+len, "AIC1 : %s\n",
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(clkgr & CPM_CLKGR_AIC1) ? "stopped" : "running");
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len += sprintf (page+len, "AIC2 : %s\n",
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(clkgr & CPM_CLKGR_AIC2) ? "stopped" : "running");
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len += sprintf (page+len, "SSI : %s\n",
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(clkgr & CPM_CLKGR_SSI) ? "stopped" : "running");
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len += sprintf (page+len, "I2C : %s\n",
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(clkgr & CPM_CLKGR_I2C) ? "stopped" : "running");
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len += sprintf (page+len, "RTC : %s\n",
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(clkgr & CPM_CLKGR_RTC) ? "stopped" : "running");
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len += sprintf (page+len, "TCU : %s\n",
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(clkgr & CPM_CLKGR_TCU) ? "stopped" : "running");
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len += sprintf (page+len, "UART1 : %s\n",
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(clkgr & CPM_CLKGR_UART1) ? "stopped" : "running");
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len += sprintf (page+len, "UART0 : %s\n",
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(clkgr & CPM_CLKGR_UART0) ? "stopped" : "running");
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return len;
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}
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static int pmc_write_proc(struct file *file, const char *buffer, unsigned long count, void *data)
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{
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REG_CPM_CLKGR = simple_strtoul(buffer, 0, 16);
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return count;
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}
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/*
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* Clock Generation Module
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*/
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#define TO_MHZ(x) (x/1000000),(x%1000000)/10000
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#define TO_KHZ(x) (x/1000),(x%1000)/10
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static int cgm_read_proc (char *page, char **start, off_t off,
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int count, int *eof, void *data)
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{
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int len = 0;
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unsigned int cppcr = REG_CPM_CPPCR; /* PLL Control Register */
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unsigned int cpccr = REG_CPM_CPCCR; /* Clock Control Register */
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unsigned int div[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32};
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unsigned int od[4] = {1, 2, 2, 4};
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len += sprintf (page+len, "CPPCR : 0x%08x\n", cppcr);
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len += sprintf (page+len, "CPCCR : 0x%08x\n", cpccr);
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len += sprintf (page+len, "PLL : %s\n",
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(cppcr & CPM_CPPCR_PLLEN) ? "ON" : "OFF");
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len += sprintf (page+len, "m:n:o : %d:%d:%d\n",
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__cpm_get_pllm() + 2,
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__cpm_get_plln() + 2,
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od[__cpm_get_pllod()]
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);
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len += sprintf (page+len, "C:H:M:P : %d:%d:%d:%d\n",
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div[__cpm_get_cdiv()],
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div[__cpm_get_hdiv()],
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div[__cpm_get_mdiv()],
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div[__cpm_get_pdiv()]
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);
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len += sprintf (page+len, "PLL Freq : %3d.%02d MHz\n", TO_MHZ(__cpm_get_pllout()));
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len += sprintf (page+len, "CCLK : %3d.%02d MHz\n", TO_MHZ(__cpm_get_cclk()));
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len += sprintf (page+len, "HCLK : %3d.%02d MHz\n", TO_MHZ(__cpm_get_hclk()));
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len += sprintf (page+len, "MCLK : %3d.%02d MHz\n", TO_MHZ(__cpm_get_mclk()));
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len += sprintf (page+len, "PCLK : %3d.%02d MHz\n", TO_MHZ(__cpm_get_pclk()));
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len += sprintf (page+len, "LCDCLK : %3d.%02d MHz\n", TO_MHZ(__cpm_get_lcdclk()));
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len += sprintf (page+len, "PIXCLK : %3d.%02d KHz\n", TO_KHZ(__cpm_get_pixclk()));
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len += sprintf (page+len, "I2SCLK : %3d.%02d MHz\n", TO_MHZ(__cpm_get_i2sclk()));
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len += sprintf (page+len, "USBCLK : %3d.%02d MHz\n", TO_MHZ(__cpm_get_usbclk()));
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len += sprintf (page+len, "MSCCLK : %3d.%02d MHz\n", TO_MHZ(__cpm_get_mscclk()));
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len += sprintf (page+len, "EXTALCLK : %3d.%02d MHz\n", TO_MHZ(__cpm_get_extalclk()));
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len += sprintf (page+len, "RTCCLK : %3d.%02d MHz\n", TO_MHZ(__cpm_get_rtcclk()));
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return len;
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}
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static int cgm_write_proc(struct file *file, const char *buffer, unsigned long count, void *data)
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{
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REG_CPM_CPCCR = simple_strtoul(buffer, 0, 16);
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return count;
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}
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/* USAGE:
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* echo n > /proc/jz/ipu // n = [1,...,9], alloc mem, 2^n pages.
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* echo FF > /proc/jz/ipu // 255, free all buffer
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* echo xxxx > /proc/jz/ipu // free buffer which addr is xxxx
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* echo llll > /proc/jz/ipu // add_wired_entry(l,l,l,l)
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* echo 0 > /proc/jz/ipu // debug, print ipu_buf
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* od -X /proc/jz/ipu // read mem addr
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*/
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typedef struct _ipu_buf {
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unsigned int addr; /* phys addr */
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unsigned int page_shift;
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} ipu_buf_t;
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#define IPU_BUF_MAX 4 /* 4 buffers */
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static struct _ipu_buf ipu_buf[IPU_BUF_MAX];
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static int ipu_buf_cnt = 0;
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static unsigned char g_asid=0;
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extern void local_flush_tlb_all(void);
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/* CP0 hazard avoidance. */
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#define BARRIER __asm__ __volatile__(".set noreorder\n\t" \
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"nop; nop; nop; nop; nop; nop;\n\t" \
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".set reorder\n\t")
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void show_tlb(void)
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{
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#define ASID_MASK 0xFF
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unsigned long flags;
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unsigned int old_ctx;
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unsigned int entry;
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unsigned int entrylo0, entrylo1, entryhi;
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unsigned int pagemask;
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local_irq_save(flags);
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/* Save old context */
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old_ctx = (read_c0_entryhi() & 0xff);
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printk("TLB content:\n");
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entry = 0;
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while(entry < 32) {
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write_c0_index(entry);
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BARRIER;
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tlb_read();
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BARRIER;
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entryhi = read_c0_entryhi();
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entrylo0 = read_c0_entrylo0();
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entrylo1 = read_c0_entrylo1();
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pagemask = read_c0_pagemask();
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printk("%02d: ASID=%02d%s VA=0x%08x ", entry, entryhi & ASID_MASK, (entrylo0 & entrylo1 & 1) ? "(G)" : " ", entryhi & ~ASID_MASK);
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printk("PA0=0x%08x C0=%x %s%s%s\n", (entrylo0>>6)<<12, (entrylo0>>3) & 7, (entrylo0 & 4) ? "Dirty " : "", (entrylo0 & 2) ? "Valid " : "Invalid ", (entrylo0 & 1) ? "Global" : "");
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printk("\t\t\t PA1=0x%08x C1=%x %s%s%s\n", (entrylo1>>6)<<12, (entrylo1>>3) & 7, (entrylo1 & 4) ? "Dirty " : "", (entrylo1 & 2) ? "Valid " : "Invalid ", (entrylo1 & 1) ? "Global" : "");
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printk("\t\tpagemask=0x%08x", pagemask);
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printk("\tentryhi=0x%08x\n", entryhi);
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printk("\t\tentrylo0=0x%08x", entrylo0);
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printk("\tentrylo1=0x%08x\n", entrylo1);
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entry++;
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}
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BARRIER;
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write_c0_entryhi(old_ctx);
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local_irq_restore(flags);
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}
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static void ipu_add_wired_entry(unsigned long pid,
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unsigned long entrylo0, unsigned long entrylo1,
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unsigned long entryhi, unsigned long pagemask)
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{
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unsigned long flags;
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unsigned long wired;
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unsigned long old_pagemask;
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unsigned long old_ctx;
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struct task_struct *g, *p;
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/* We will lock an 4MB page size entry to map the 4MB reserved IPU memory */
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wired = read_c0_wired();
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if (wired) return;
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do_each_thread(g, p) {
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if (p->pid == pid )
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g_asid = p->mm->context[0];
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} while_each_thread(g, p);
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local_irq_save(flags);
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entrylo0 = entrylo0 >> 6; /* PFN */
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entrylo0 |= 0x6 | (0 << 3); /* Write-through cacheable, dirty, valid */
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/* Save old context and create impossible VPN2 value */
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old_ctx = read_c0_entryhi() & 0xff;
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old_pagemask = read_c0_pagemask();
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write_c0_wired(wired + 1);
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write_c0_index(wired);
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BARRIER;
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entryhi &= ~0xff; /* new add, 20070906 */
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entryhi |= g_asid; /* new add, 20070906 */
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// entryhi |= old_ctx; /* new add, 20070906 */
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write_c0_pagemask(pagemask);
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write_c0_entryhi(entryhi);
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write_c0_entrylo0(entrylo0);
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write_c0_entrylo1(entrylo1);
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BARRIER;
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tlb_write_indexed();
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BARRIER;
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write_c0_entryhi(old_ctx);
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BARRIER;
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write_c0_pagemask(old_pagemask);
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local_flush_tlb_all();
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local_irq_restore(flags);
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#if defined(DEBUG)
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printk("\nold_ctx=%03d\n", old_ctx);
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show_tlb();
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#endif
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}
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static void ipu_del_wired_entry( void )
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{
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unsigned long flags;
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unsigned long wired;
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/* Free all lock entry */
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local_irq_save(flags);
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wired = read_c0_wired();
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if (wired)
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write_c0_wired(0);
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local_irq_restore(flags);
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}
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static inline void ipu_buf_get( unsigned int page_shift )
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{
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unsigned char * virt_addr;
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int i;
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for ( i=0; i< IPU_BUF_MAX; ++i ) {
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if ( ipu_buf[i].addr == 0 ) {
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break;
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}
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}
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if ( (ipu_buf_cnt = i) == IPU_BUF_MAX ) {
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printk("Error, no free ipu buffer.\n");
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return ;
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}
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virt_addr = (unsigned char *)__get_free_pages(GFP_KERNEL, page_shift);
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if ( virt_addr ) {
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ipu_buf[ipu_buf_cnt].addr = (unsigned int)virt_to_phys((void *)virt_addr);
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ipu_buf[ipu_buf_cnt].page_shift = page_shift;
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for (i = 0; i < (1<<page_shift); i++) {
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SetPageReserved(virt_to_page(virt_addr));
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virt_addr += PAGE_SIZE;
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}
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}
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else {
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printk("get memory Failed.\n");
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}
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}
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static inline void ipu_buf_free( unsigned int phys_addr )
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{
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unsigned char * virt_addr, *addr;
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int cnt, i;
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if ( phys_addr == 0 )
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return ;
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for ( cnt=0; cnt<IPU_BUF_MAX; ++cnt )
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if ( phys_addr == ipu_buf[cnt].addr )
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break;
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if ( cnt == IPU_BUF_MAX ) { /* addr not in the ipu buffers */
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printk("Invalid addr:0x%08x\n", (unsigned int)phys_addr);
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}
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virt_addr = (unsigned char *)phys_to_virt(ipu_buf[cnt].addr);
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addr = virt_addr;
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for (i = 0; i < (1<<ipu_buf[cnt].page_shift); i++) {
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ClearPageReserved(virt_to_page(addr));
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addr += PAGE_SIZE;
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}
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if ( cnt == 0 )
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ipu_del_wired_entry();
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free_pages((unsigned long )virt_addr, ipu_buf[cnt].page_shift);
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ipu_buf[cnt].addr = 0;
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ipu_buf[cnt].page_shift = 0;
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}
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static int ipu_read_proc (char *page, char **start, off_t off,
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int count, int *eof, void *data)
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{
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int len = 0;
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/* read as binary */
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unsigned int * pint;
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pint = (unsigned int *) (page+len);
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if ( ipu_buf_cnt >= IPU_BUF_MAX ) { /* failed alloc mem, rturn 0 */
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printk("no free buffer.\n");
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*pint = 0;
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}
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else
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*pint = (unsigned int )ipu_buf[ipu_buf_cnt].addr; /* phys addr */
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len += sizeof(unsigned int);
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#if defined(DEBUG)
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show_tlb();
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#endif
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return len;
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}
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static int ipu_write_proc(struct file *file, const char *buffer, unsigned long count, void *data)
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{
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unsigned int val ;
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int cnt,i;
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char buf[12];
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unsigned long pid, entrylo0, entrylo1, entryhi, pagemask;
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#if defined(DEBUG)
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printk("ipu write count=%u\n", count);
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#endif
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if (count == (8*5+1)) {
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for (i=0;i<12;i++) buf[i]=0;
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strncpy(buf, buffer+8*0, 8);
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pid = simple_strtoul(buf, 0, 16);
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for (i=0;i<12;i++) buf[i]=0;
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strncpy(buf, buffer+8*1, 8);
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entrylo0 = simple_strtoul(buf, 0, 16);
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for (i=0;i<12;i++) buf[i]=0;
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strncpy(buf, buffer+8*2, 8);
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entrylo1 = simple_strtoul(buf, 0, 16);
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for (i=0;i<12;i++) buf[i]=0;
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strncpy(buf, buffer+8*3, 8);
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entryhi = simple_strtoul(buf, 0, 16);
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for (i=0;i<12;i++) buf[i]=0;
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strncpy(buf, buffer+8*4, 8);
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pagemask = simple_strtoul(buf, 0, 16);
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#if defined(DEBUG)
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printk("pid=0x%08x, entrylo0=0x%08x, entrylo1=0x%08x, entryhi=0x%08x, pagemask=0x%08x\n",
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|
pid, entrylo0, entrylo1, entryhi, pagemask);
|
|
#endif
|
|
ipu_add_wired_entry( pid, entrylo0, entrylo1, entryhi, pagemask);
|
|
return 41;
|
|
} else if ( count <= 8+1 ) {
|
|
for (i=0;i<12;i++) buf[i]=0;
|
|
strncpy(buf, buffer, 8);
|
|
val = simple_strtoul(buf, 0, 16);
|
|
} else if (count == 44) {
|
|
for (i = 0; i < 12; i++)
|
|
buf[i] = 0;
|
|
strncpy(buf, buffer, 10);
|
|
pid = simple_strtoul(buf, 0, 16);
|
|
for (i = 0; i < 12; i++)
|
|
buf[i] = 0;
|
|
strncpy(buf, buffer + 11, 10);
|
|
entryhi = simple_strtoul(buf, 0, 16);//vaddr
|
|
for (i = 0; i < 12; i++)
|
|
buf[i] = 0;
|
|
strncpy(buf, buffer + 22, 10);
|
|
entrylo0 = simple_strtoul(buf, 0, 16);//paddr
|
|
for (i = 0; i < 12; i++)
|
|
buf[i] = 0;
|
|
strncpy(buf, buffer + 33, 10);
|
|
pagemask = simple_strtoul(buf, 0, 16);
|
|
pagemask = 0x3ff << 13; /* Fixed to 4MB page size */
|
|
ipu_add_wired_entry(pid, entrylo0, 0, entryhi, pagemask);
|
|
return 44;
|
|
} else {
|
|
printk("ipu write count error, count=%d\n.", (unsigned int)count);
|
|
return -1;
|
|
}
|
|
|
|
/* val: 1-9, page_shift, val>= 10: ipu_buf.addr */
|
|
if ( val == 0 ) { /* debug, print ipu_buf info */
|
|
for ( cnt=0; cnt<IPU_BUF_MAX; ++cnt)
|
|
printk("ipu_buf[%d]: addr=0x%08x, page_shift=%d\n",
|
|
cnt, ipu_buf[cnt].addr, ipu_buf[cnt].page_shift );
|
|
#if defined(DEBUG)
|
|
show_tlb();
|
|
#endif
|
|
}
|
|
else if ( 0< val && val < 10 ) {
|
|
ipu_buf_get(val);
|
|
}
|
|
else if ( val == 0xff ) { /* 255: free all ipu_buf */
|
|
for ( cnt=0; cnt<IPU_BUF_MAX; ++cnt ) {
|
|
ipu_buf_free(ipu_buf[cnt].addr);
|
|
}
|
|
}
|
|
else {
|
|
ipu_buf_free(val);
|
|
}
|
|
|
|
return count;
|
|
}
|
|
|
|
/*
|
|
* UDC hotplug
|
|
*/
|
|
#ifdef CONFIG_JZ_UDC_HOTPLUG
|
|
extern int jz_udc_active; /* defined in drivers/char/jzchar/jz_udc_hotplug.c */
|
|
#endif
|
|
|
|
#ifndef GPIO_UDC_HOTPLUG
|
|
#define GPIO_UDC_HOTPLUG 86
|
|
#endif
|
|
|
|
static int udc_read_proc(char *page, char **start, off_t off,
|
|
int count, int *eof, void *data)
|
|
{
|
|
int len = 0;
|
|
|
|
if (__gpio_get_pin(GPIO_UDC_HOTPLUG)) {
|
|
|
|
#ifdef CONFIG_JZ_UDC_HOTPLUG
|
|
|
|
/* Cable has connected, wait for disconnection. */
|
|
__gpio_as_irq_fall_edge(GPIO_UDC_HOTPLUG);
|
|
|
|
if (jz_udc_active)
|
|
len += sprintf (page+len, "CONNECT_CABLE\n");
|
|
else
|
|
len += sprintf (page+len, "CONNECT_POWER\n");
|
|
#else
|
|
len += sprintf (page+len, "CONNECT\n");
|
|
#endif
|
|
}
|
|
else {
|
|
|
|
#ifdef CONFIG_JZ_UDC_HOTPLUG
|
|
/* Cable has disconnected, wait for connection. */
|
|
__gpio_as_irq_rise_edge(GPIO_UDC_HOTPLUG);
|
|
#endif
|
|
|
|
len += sprintf (page+len, "REMOVE\n");
|
|
}
|
|
|
|
return len;
|
|
}
|
|
|
|
/*
|
|
* MMC/SD hotplug
|
|
*/
|
|
|
|
#ifndef MSC_HOTPLUG_PIN
|
|
#define MSC_HOTPLUG_PIN 90
|
|
#endif
|
|
|
|
static int mmc_read_proc (char *page, char **start, off_t off,
|
|
int count, int *eof, void *data)
|
|
{
|
|
int len = 0;
|
|
|
|
#if defined(CONFIG_JZ4740_LYRA)
|
|
if (!(__gpio_get_pin(MSC_HOTPLUG_PIN)))
|
|
#else
|
|
if (__gpio_get_pin(MSC_HOTPLUG_PIN))
|
|
#endif
|
|
len += sprintf (page+len, "REMOVE\n");
|
|
else
|
|
len += sprintf (page+len, "INSERT\n");
|
|
|
|
return len;
|
|
}
|
|
|
|
/***********************************************************************
|
|
* IPU memory management (used by mplayer and other apps)
|
|
*
|
|
* We reserved 4MB memory for IPU
|
|
* The memory base address is jz_ipu_framebuf
|
|
*/
|
|
|
|
/* Usage:
|
|
*
|
|
* echo n > /proc/jz/imem // n = [0,...,10], allocate memory, 2^n pages
|
|
* echo xxxxxxxx > /proc/jz/imem // free buffer which addr is xxxxxxxx
|
|
* echo FF > /proc/jz/ipu // FF, free all buffers
|
|
* od -X /proc/jz/imem // return the allocated buffer address and the max order of free buffer
|
|
*/
|
|
|
|
//#define DEBUG_IMEM 1
|
|
|
|
#define IMEM_MAX_ORDER 10 /* max 2^10 * 4096 = 4MB */
|
|
|
|
static unsigned int jz_imem_base; /* physical base address of ipu memory */
|
|
|
|
static unsigned int allocated_phys_addr = 0;
|
|
|
|
/*
|
|
* Allocated buffer list
|
|
*/
|
|
typedef struct imem_list {
|
|
unsigned int phys_start; /* physical start addr */
|
|
unsigned int phys_end; /* physical end addr */
|
|
struct imem_list *next;
|
|
} imem_list_t;
|
|
|
|
static struct imem_list *imem_list_head = NULL; /* up sorted by phys_start */
|
|
|
|
#ifdef DEBUG_IMEM
|
|
static void dump_imem_list(void)
|
|
{
|
|
struct imem_list *imem;
|
|
|
|
printk("*** dump_imem_list 0x%x ***\n", (u32)imem_list_head);
|
|
imem = imem_list_head;
|
|
while (imem) {
|
|
printk("imem=0x%x phys_start=0x%x phys_end=0x%x next=0x%x\n", (u32)imem, imem->phys_start, imem->phys_end, (u32)imem->next);
|
|
imem = imem->next;
|
|
}
|
|
}
|
|
#endif
|
|
|
|
/* allocate 2^order pages inside the 4MB memory */
|
|
static int imem_alloc(unsigned int order)
|
|
{
|
|
int alloc_ok = 0;
|
|
unsigned int start, end;
|
|
unsigned int size = (1 << order) * PAGE_SIZE;
|
|
struct imem_list *imem, *imemn, *imemp;
|
|
|
|
allocated_phys_addr = 0;
|
|
|
|
start = jz_imem_base;
|
|
end = start + (1 << IMEM_MAX_ORDER) * PAGE_SIZE;
|
|
|
|
imem = imem_list_head;
|
|
while (imem) {
|
|
if ((imem->phys_start - start) >= size) {
|
|
/* we got a valid address range */
|
|
alloc_ok = 1;
|
|
break;
|
|
}
|
|
|
|
start = imem->phys_end + 1;
|
|
imem = imem->next;
|
|
}
|
|
|
|
if (!alloc_ok) {
|
|
if ((end - start) >= size)
|
|
alloc_ok = 1;
|
|
}
|
|
|
|
if (alloc_ok) {
|
|
end = start + size - 1;
|
|
allocated_phys_addr = start;
|
|
|
|
/* add to imem_list, up sorted by phys_start */
|
|
imemn = kmalloc(sizeof(struct imem_list), GFP_KERNEL);
|
|
if (!imemn) {
|
|
return -ENOMEM;
|
|
}
|
|
imemn->phys_start = start;
|
|
imemn->phys_end = end;
|
|
imemn->next = NULL;
|
|
|
|
if (!imem_list_head)
|
|
imem_list_head = imemn;
|
|
else {
|
|
imem = imemp = imem_list_head;
|
|
while (imem) {
|
|
if (start < imem->phys_start) {
|
|
break;
|
|
}
|
|
|
|
imemp = imem;
|
|
imem = imem->next;
|
|
}
|
|
|
|
if (imem == imem_list_head) {
|
|
imem_list_head = imemn;
|
|
imemn->next = imem;
|
|
}
|
|
else {
|
|
imemn->next = imemp->next;
|
|
imemp->next = imemn;
|
|
}
|
|
}
|
|
}
|
|
|
|
#ifdef DEBUG_IMEM
|
|
dump_imem_list();
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
static void imem_free(unsigned int phys_addr)
|
|
{
|
|
struct imem_list *imem, *imemp;
|
|
|
|
imem = imemp = imem_list_head;
|
|
while (imem) {
|
|
if (phys_addr == imem->phys_start) {
|
|
if (imem == imem_list_head) {
|
|
imem_list_head = imem->next;
|
|
}
|
|
else {
|
|
imemp->next = imem->next;
|
|
}
|
|
|
|
kfree(imem);
|
|
break;
|
|
}
|
|
|
|
imemp = imem;
|
|
imem = imem->next;
|
|
}
|
|
|
|
#ifdef DEBUG_IMEM
|
|
dump_imem_list();
|
|
#endif
|
|
}
|
|
|
|
static void imem_free_all(void)
|
|
{
|
|
struct imem_list *imem;
|
|
|
|
imem = imem_list_head;
|
|
while (imem) {
|
|
kfree(imem);
|
|
imem = imem->next;
|
|
}
|
|
|
|
imem_list_head = NULL;
|
|
|
|
allocated_phys_addr = 0;
|
|
|
|
#ifdef DEBUG_IMEM
|
|
dump_imem_list();
|
|
#endif
|
|
}
|
|
|
|
/*
|
|
* Return the allocated buffer address and the max order of free buffer
|
|
*/
|
|
static int imem_read_proc(char *page, char **start, off_t off,
|
|
int count, int *eof, void *data)
|
|
{
|
|
int len = 0;
|
|
unsigned int start_addr, end_addr, max_order, max_size;
|
|
struct imem_list *imem;
|
|
|
|
unsigned int *tmp = (unsigned int *)(page + len);
|
|
|
|
start_addr = jz_imem_base;
|
|
end_addr = start_addr + (1 << IMEM_MAX_ORDER) * PAGE_SIZE;
|
|
|
|
if (!imem_list_head)
|
|
max_size = end_addr - start_addr;
|
|
else {
|
|
max_size = 0;
|
|
imem = imem_list_head;
|
|
while (imem) {
|
|
if (max_size < (imem->phys_start - start_addr))
|
|
max_size = imem->phys_start - start_addr;
|
|
|
|
start_addr = imem->phys_end + 1;
|
|
imem = imem->next;
|
|
}
|
|
|
|
if (max_size < (end_addr - start_addr))
|
|
max_size = end_addr - start_addr;
|
|
}
|
|
|
|
if (max_size > 0) {
|
|
max_order = get_order(max_size);
|
|
if (((1 << max_order) * PAGE_SIZE) > max_size)
|
|
max_order--;
|
|
}
|
|
else {
|
|
max_order = 0xffffffff; /* No any free buffer */
|
|
}
|
|
|
|
*tmp++ = allocated_phys_addr; /* address allocated by 'echo n > /proc/jz/imem' */
|
|
*tmp = max_order; /* max order of current free buffers */
|
|
|
|
len += 2 * sizeof(unsigned int);
|
|
|
|
return len;
|
|
}
|
|
|
|
static int imem_write_proc(struct file *file, const char *buffer, unsigned long count, void *data)
|
|
{
|
|
unsigned int val;
|
|
|
|
val = simple_strtoul(buffer, 0, 16);
|
|
|
|
if (val == 0xff) {
|
|
/* free all memory */
|
|
imem_free_all();
|
|
ipu_del_wired_entry();
|
|
}
|
|
else if ((val >= 0) && (val <= IMEM_MAX_ORDER)) {
|
|
/* allocate 2^val pages */
|
|
imem_alloc(val);
|
|
}
|
|
else {
|
|
/* free buffer which phys_addr is val */
|
|
imem_free(val);
|
|
}
|
|
|
|
return count;
|
|
}
|
|
|
|
/*
|
|
* /proc/jz/xxx entry
|
|
*
|
|
*/
|
|
static int __init jz_proc_init(void)
|
|
{
|
|
struct proc_dir_entry *res;
|
|
unsigned int virt_addr, i;
|
|
|
|
proc_jz_root = proc_mkdir("jz", 0);
|
|
|
|
/* External Memory Controller */
|
|
res = create_proc_entry("emc", 0644, proc_jz_root);
|
|
if (res) {
|
|
res->read_proc = emc_read_proc;
|
|
res->write_proc = NULL;
|
|
res->data = NULL;
|
|
}
|
|
|
|
/* Power Management Controller */
|
|
res = create_proc_entry("pmc", 0644, proc_jz_root);
|
|
if (res) {
|
|
res->read_proc = pmc_read_proc;
|
|
res->write_proc = pmc_write_proc;
|
|
res->data = NULL;
|
|
}
|
|
|
|
/* Clock Generation Module */
|
|
res = create_proc_entry("cgm", 0644, proc_jz_root);
|
|
if (res) {
|
|
res->read_proc = cgm_read_proc;
|
|
res->write_proc = cgm_write_proc;
|
|
res->data = NULL;
|
|
}
|
|
|
|
/* Image process unit */
|
|
res = create_proc_entry("ipu", 0644, proc_jz_root);
|
|
if (res) {
|
|
res->read_proc = ipu_read_proc;
|
|
res->write_proc = ipu_write_proc;
|
|
res->data = NULL;
|
|
}
|
|
|
|
/* udc hotplug */
|
|
res = create_proc_entry("udc", 0644, proc_jz_root);
|
|
if (res) {
|
|
res->read_proc = udc_read_proc;
|
|
res->write_proc = NULL;
|
|
res->data = NULL;
|
|
}
|
|
|
|
/* mmc hotplug */
|
|
res = create_proc_entry("mmc", 0644, proc_jz_root);
|
|
if (res) {
|
|
res->read_proc = mmc_read_proc;
|
|
res->write_proc = NULL;
|
|
res->data = NULL;
|
|
}
|
|
|
|
/*
|
|
* Reserve a 4MB memory for IPU on JZ4740.
|
|
*/
|
|
jz_imem_base = (unsigned int)__get_free_pages(GFP_KERNEL, IMEM_MAX_ORDER);
|
|
if (jz_imem_base) {
|
|
/* imem (IPU memory management) */
|
|
res = create_proc_entry("imem", 0644, proc_jz_root);
|
|
if (res) {
|
|
res->read_proc = imem_read_proc;
|
|
res->write_proc = imem_write_proc;
|
|
res->data = NULL;
|
|
}
|
|
|
|
/* Set page reserved */
|
|
virt_addr = jz_imem_base;
|
|
for (i = 0; i < (1 << IMEM_MAX_ORDER); i++) {
|
|
SetPageReserved(virt_to_page((void *)virt_addr));
|
|
virt_addr += PAGE_SIZE;
|
|
}
|
|
|
|
/* Convert to physical address */
|
|
jz_imem_base = virt_to_phys((void *)jz_imem_base);
|
|
|
|
printk("Total %dMB memory at 0x%x was reserved for IPU\n",
|
|
(unsigned int)((1 << IMEM_MAX_ORDER) * PAGE_SIZE)/1000000, jz_imem_base);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
__initcall(jz_proc_init);
|