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238839d6be
Signed-off-by: Miguel Gaio <miguel.gaio@efixo.com> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@23498 3c298f89-4303-0410-b956-a3cf2f4a3e73
218 lines
7.4 KiB
Diff
218 lines
7.4 KiB
Diff
From 3c8e1a84fd6b984a7bce8816db2e3defc57bbfe4 Mon Sep 17 00:00:00 2001
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From: Marek Szyprowski <m.szyprowski@samsung.com>
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Date: Wed, 30 Jun 2010 14:27:37 -0600
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Subject: [PATCH] spi/spi-gpio: add support for controllers without MISO or MOSI pin
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There are some boards that do not strictly follow SPI standard and use
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only 3 wires (SCLK, MOSI or MISO, SS) for connecting some simple auxiliary
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chips and controls them with GPIO based 'spi controller'. In this
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configuration the MISO or MOSI line is missing (it is not required if the
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chip does not transfer any data back to host or host only reads data from
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chip).
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This patch adds support for such non-standard configuration in GPIO-based
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SPI controller. It has been tested in configuration without MISO pin.
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Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
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Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
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Acked-by: David Brownell <dbrownell@users.sourceforge.net>
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Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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---
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drivers/spi/spi_gpio.c | 101 ++++++++++++++++++++++++++++++++++-------
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include/linux/spi/spi_gpio.h | 5 ++
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2 files changed, 88 insertions(+), 18 deletions(-)
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--- a/drivers/spi/spi_gpio.c
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+++ b/drivers/spi/spi_gpio.c
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@@ -178,6 +178,44 @@ static u32 spi_gpio_txrx_word_mode3(stru
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return bitbang_txrx_be_cpha1(spi, nsecs, 1, 0, word, bits);
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}
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+/*
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+ * These functions do not call setmosi or getmiso if respective flag
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+ * (SPI_MASTER_NO_RX or SPI_MASTER_NO_TX) is set, so they are safe to
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+ * call when such pin is not present or defined in the controller.
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+ * A separate set of callbacks is defined to get highest possible
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+ * speed in the generic case (when both MISO and MOSI lines are
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+ * available), as optimiser will remove the checks when argument is
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+ * constant.
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+ */
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+
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+static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi,
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+ unsigned nsecs, u32 word, u8 bits)
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+{
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+ unsigned flags = spi->master->flags;
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+ return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
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+}
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+
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+static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi,
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+ unsigned nsecs, u32 word, u8 bits)
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+{
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+ unsigned flags = spi->master->flags;
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+ return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
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+}
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+
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+static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi,
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+ unsigned nsecs, u32 word, u8 bits)
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+{
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+ unsigned flags = spi->master->flags;
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+ return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
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+}
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+
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+static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi,
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+ unsigned nsecs, u32 word, u8 bits)
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+{
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+ unsigned flags = spi->master->flags;
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+ return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
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+}
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+
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/*----------------------------------------------------------------------*/
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static void spi_gpio_chipselect(struct spi_device *spi, int is_active)
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@@ -243,19 +281,30 @@ static int __devinit spi_gpio_alloc(unsi
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}
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static int __devinit
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-spi_gpio_request(struct spi_gpio_platform_data *pdata, const char *label)
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+spi_gpio_request(struct spi_gpio_platform_data *pdata, const char *label,
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+ u16 *res_flags)
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{
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int value;
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/* NOTE: SPI_*_GPIO symbols may reference "pdata" */
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- value = spi_gpio_alloc(SPI_MOSI_GPIO, label, false);
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- if (value)
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- goto done;
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-
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- value = spi_gpio_alloc(SPI_MISO_GPIO, label, true);
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- if (value)
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- goto free_mosi;
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+ if (SPI_MOSI_GPIO != SPI_GPIO_NO_MOSI) {
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+ value = spi_gpio_alloc(SPI_MOSI_GPIO, label, false);
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+ if (value)
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+ goto done;
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+ } else {
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+ /* HW configuration without MOSI pin */
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+ *res_flags |= SPI_MASTER_NO_TX;
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+ }
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+
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+ if (SPI_MISO_GPIO != SPI_GPIO_NO_MISO) {
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+ value = spi_gpio_alloc(SPI_MISO_GPIO, label, true);
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+ if (value)
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+ goto free_mosi;
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+ } else {
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+ /* HW configuration without MISO pin */
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+ *res_flags |= SPI_MASTER_NO_RX;
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+ }
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value = spi_gpio_alloc(SPI_SCK_GPIO, label, false);
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if (value)
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@@ -264,9 +313,11 @@ spi_gpio_request(struct spi_gpio_platfor
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goto done;
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free_miso:
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- gpio_free(SPI_MISO_GPIO);
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+ if (SPI_MISO_GPIO != SPI_GPIO_NO_MISO)
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+ gpio_free(SPI_MISO_GPIO);
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free_mosi:
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- gpio_free(SPI_MOSI_GPIO);
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+ if (SPI_MOSI_GPIO != SPI_GPIO_NO_MOSI)
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+ gpio_free(SPI_MOSI_GPIO);
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done:
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return value;
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}
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@@ -277,6 +328,7 @@ static int __devinit spi_gpio_probe(stru
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struct spi_master *master;
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struct spi_gpio *spi_gpio;
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struct spi_gpio_platform_data *pdata;
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+ u16 master_flags = 0;
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pdata = pdev->dev.platform_data;
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#ifdef GENERIC_BITBANG
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@@ -284,7 +336,7 @@ static int __devinit spi_gpio_probe(stru
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return -ENODEV;
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#endif
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- status = spi_gpio_request(pdata, dev_name(&pdev->dev));
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+ status = spi_gpio_request(pdata, dev_name(&pdev->dev), &master_flags);
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if (status < 0)
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return status;
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@@ -300,6 +352,7 @@ static int __devinit spi_gpio_probe(stru
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if (pdata)
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spi_gpio->pdata = *pdata;
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+ master->flags = master_flags;
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master->bus_num = pdev->id;
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master->num_chipselect = SPI_N_CHIPSEL;
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master->setup = spi_gpio_setup;
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@@ -307,10 +360,18 @@ static int __devinit spi_gpio_probe(stru
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spi_gpio->bitbang.master = spi_master_get(master);
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spi_gpio->bitbang.chipselect = spi_gpio_chipselect;
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- spi_gpio->bitbang.txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0;
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- spi_gpio->bitbang.txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1;
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- spi_gpio->bitbang.txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2;
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- spi_gpio->bitbang.txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3;
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+
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+ if ((master_flags & (SPI_MASTER_NO_RX | SPI_MASTER_NO_RX)) == 0) {
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+ spi_gpio->bitbang.txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0;
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+ spi_gpio->bitbang.txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1;
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+ spi_gpio->bitbang.txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2;
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+ spi_gpio->bitbang.txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3;
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+ } else {
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+ spi_gpio->bitbang.txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0;
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+ spi_gpio->bitbang.txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1;
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+ spi_gpio->bitbang.txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2;
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+ spi_gpio->bitbang.txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3;
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+ }
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spi_gpio->bitbang.setup_transfer = spi_bitbang_setup_transfer;
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spi_gpio->bitbang.flags = SPI_CS_HIGH;
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@@ -318,8 +379,10 @@ static int __devinit spi_gpio_probe(stru
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if (status < 0) {
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spi_master_put(spi_gpio->bitbang.master);
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gpio_free:
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- gpio_free(SPI_MISO_GPIO);
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- gpio_free(SPI_MOSI_GPIO);
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+ if (SPI_MISO_GPIO != SPI_GPIO_NO_MISO)
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+ gpio_free(SPI_MISO_GPIO);
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+ if (SPI_MOSI_GPIO != SPI_GPIO_NO_MOSI)
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+ gpio_free(SPI_MOSI_GPIO);
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gpio_free(SPI_SCK_GPIO);
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spi_master_put(master);
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}
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@@ -342,8 +405,10 @@ static int __devexit spi_gpio_remove(str
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platform_set_drvdata(pdev, NULL);
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- gpio_free(SPI_MISO_GPIO);
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- gpio_free(SPI_MOSI_GPIO);
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+ if (SPI_MISO_GPIO != SPI_GPIO_NO_MISO)
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+ gpio_free(SPI_MISO_GPIO);
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+ if (SPI_MOSI_GPIO != SPI_GPIO_NO_MOSI)
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+ gpio_free(SPI_MOSI_GPIO);
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gpio_free(SPI_SCK_GPIO);
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return status;
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--- a/include/linux/spi/spi_gpio.h
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+++ b/include/linux/spi/spi_gpio.h
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@@ -29,11 +29,16 @@
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* SPI_GPIO_NO_CHIPSELECT to the controller_data:
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* .controller_data = (void *) SPI_GPIO_NO_CHIPSELECT;
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*
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+ * If the MISO or MOSI pin is not available then it should be set to
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+ * SPI_GPIO_NO_MISO or SPI_GPIO_NO_MOSI.
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+ *
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* If the bitbanged bus is later switched to a "native" controller,
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* that platform_device and controller_data should be removed.
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*/
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#define SPI_GPIO_NO_CHIPSELECT ((unsigned long)-1l)
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+#define SPI_GPIO_NO_MISO ((unsigned long)-1l)
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+#define SPI_GPIO_NO_MOSI ((unsigned long)-1l)
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/**
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* struct spi_gpio_platform_data - parameter for bitbanged SPI master
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