mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
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dc3d3f1c49
it's basically also provided by ingenic and nativly based on 2.6.27, adjusted to fit into the OpenWrt-environment
332 lines
9.3 KiB
C
332 lines
9.3 KiB
C
/*
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* linux/drivers/video/jz4760_lcd.h -- Ingenic Jz4760 On-Chip LCD frame buffer device
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*
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* Copyright (C) 2005-2008, Ingenic Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#ifndef __JZ4760_LCD_H__
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#define __JZ4760_LCD_H__
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//#include <asm/io.h>
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#define NR_PALETTE 256
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#define PALETTE_SIZE (NR_PALETTE*2)
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/* use new descriptor(8 words) */
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struct jz4760_lcd_dma_desc {
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unsigned int next_desc; /* LCDDAx */
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unsigned int databuf; /* LCDSAx */
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unsigned int frame_id; /* LCDFIDx */
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unsigned int cmd; /* LCDCMDx */
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unsigned int offsize; /* Stride Offsize(in word) */
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unsigned int page_width; /* Stride Pagewidth(in word) */
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unsigned int cmd_num; /* Command Number(for SLCD) */
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unsigned int desc_size; /* Foreground Size */
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};
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struct jz4760lcd_panel_t {
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unsigned int cfg; /* panel mode and pin usage etc. */
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unsigned int slcd_cfg; /* Smart lcd configurations */
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unsigned int ctrl; /* lcd controll register */
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unsigned int w; /* Panel Width(in pixel) */
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unsigned int h; /* Panel Height(in line) */
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unsigned int fclk; /* frame clk */
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unsigned int hsw; /* hsync width, in pclk */
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unsigned int vsw; /* vsync width, in line count */
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unsigned int elw; /* end of line, in pclk */
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unsigned int blw; /* begin of line, in pclk */
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unsigned int efw; /* end of frame, in line count */
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unsigned int bfw; /* begin of frame, in line count */
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};
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struct jz4760lcd_fg_t {
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int bpp; /* foreground bpp */
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int x; /* foreground start position x */
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int y; /* foreground start position y */
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int w; /* foreground width */
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int h; /* foreground height */
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};
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struct jz4760lcd_osd_t {
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unsigned int osd_cfg; /* OSDEN, ALHPAEN, F0EN, F1EN, etc */
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unsigned int osd_ctrl; /* IPUEN, OSDBPP, etc */
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unsigned int rgb_ctrl; /* RGB Dummy, RGB sequence, RGB to YUV */
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unsigned int bgcolor; /* background color(RGB888) */
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unsigned int colorkey0; /* foreground0's Colorkey enable, Colorkey value */
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unsigned int colorkey1; /* foreground1's Colorkey enable, Colorkey value */
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unsigned int alpha; /* ALPHAEN, alpha value */
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unsigned int ipu_restart; /* IPU Restart enable, ipu restart interval time */
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#define FG_NOCHANGE 0x0000
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#define FG0_CHANGE_SIZE 0x0001
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#define FG0_CHANGE_POSITION 0x0002
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#define FG1_CHANGE_SIZE 0x0010
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#define FG1_CHANGE_POSITION 0x0020
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#define FG_CHANGE_ALL ( FG0_CHANGE_SIZE | FG0_CHANGE_POSITION | \
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FG1_CHANGE_SIZE | FG1_CHANGE_POSITION )
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int fg_change;
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struct jz4760lcd_fg_t fg0; /* foreground 0 */
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struct jz4760lcd_fg_t fg1; /* foreground 1 */
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};
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struct jz4760lcd_info {
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struct jz4760lcd_panel_t panel;
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struct jz4760lcd_osd_t osd;
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};
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/* Jz LCDFB supported I/O controls. */
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#define FBIOSETBACKLIGHT 0x4688 /* set back light level */
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#define FBIODISPON 0x4689 /* display on */
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#define FBIODISPOFF 0x468a /* display off */
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#define FBIORESET 0x468b /* lcd reset */
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#define FBIOPRINT_REG 0x468c /* print lcd registers(debug) */
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#define FBIOROTATE 0x46a0 /* rotated fb */
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#define FBIOGETBUFADDRS 0x46a1 /* get buffers addresses */
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#define FBIO_GET_MODE 0x46a2 /* get lcd info */
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#define FBIO_SET_MODE 0x46a3 /* set osd mode */
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#define FBIO_DEEP_SET_MODE 0x46a4 /* set panel and osd mode */
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#define FBIO_MODE_SWITCH 0x46a5 /* switch mode between LCD and TVE */
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#define FBIO_GET_TVE_MODE 0x46a6 /* get tve info */
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#define FBIO_SET_TVE_MODE 0x46a7 /* set tve mode */
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#define FBIODISON_FG 0x46a8 /* FG display on */
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#define FBIODISOFF_FG 0x46a9 /* FG display on */
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#define FBIO_SET_LCD_TO_TVE 0x46b0 /* set lcd to tve mode */
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#define FBIO_SET_FRM_TO_LCD 0x46b1 /* set framebuffer to lcd */
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#define FBIO_SET_IPU_TO_LCD 0x46b2 /* set ipu to lcd directly */
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#define FBIO_CHANGE_SIZE 0x46b3 /* change FG size */
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#define FBIO_CHANGE_POSITION 0x46b4 /* change FG starts position */
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#define FBIO_SET_BG_COLOR 0x46b5 /* set background color */
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#define FBIO_SET_IPU_RESTART_VAL 0x46b6 /* set ipu restart value */
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#define FBIO_SET_IPU_RESTART_ON 0x46b7 /* set ipu restart on */
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#define FBIO_SET_IPU_RESTART_OFF 0x46b8 /* set ipu restart off */
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#define FBIO_ALPHA_ON 0x46b9 /* enable alpha */
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#define FBIO_ALPHA_OFF 0x46c0 /* disable alpha */
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#define FBIO_SET_ALPHA_VAL 0x46c1 /* set alpha value */
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/*
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* LCD panel specific definition
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*/
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/* AUO */
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#if defined(CONFIG_JZ4760_LCD_AUO_A043FL01V2)
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#if defined(CONFIG_JZ4760_F4760) /* Jz4760 FPGA board */
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#define SPEN (32*3+30) /*LCD_CS*/
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#define SPCK (32*3+26) /*LCD_SCL*/
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#define SPDA (32*3+27) /*LCD_SDA*/
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#define LCD_RET (32*5+2) /*LCD_DISP_N use for lcd reset*/
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#else
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#error "driver/video/Jzlcd.h, please define SPI pins on your board."
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#endif
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#define __spi_write_reg(reg, val) \
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do { \
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unsigned char no; \
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unsigned short value; \
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unsigned char a=0; \
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unsigned char b=0; \
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__gpio_as_output(SPEN); /* use SPDA */ \
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__gpio_as_output(SPCK); /* use SPCK */ \
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__gpio_as_output(SPDA); /* use SPDA */ \
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a=reg; \
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b=val; \
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__gpio_set_pin(SPEN); \
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__gpio_clear_pin(SPCK); \
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udelay(50); \
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__gpio_clear_pin(SPDA); \
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__gpio_clear_pin(SPEN); \
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udelay(50); \
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value=((a<<8)|(b&0xFF)); \
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for(no=0;no<16;no++) \
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{ \
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if((value&0x8000)==0x8000){ \
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__gpio_set_pin(SPDA);} \
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else{ \
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__gpio_clear_pin(SPDA); } \
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udelay(50); \
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__gpio_set_pin(SPCK); \
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value=(value<<1); \
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udelay(50); \
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__gpio_clear_pin(SPCK); \
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} \
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__gpio_set_pin(SPEN); \
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udelay(400); \
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} while (0)
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#define __spi_read_reg(reg,val) \
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do{ \
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unsigned char no; \
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unsigned short value; \
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__gpio_as_output(SPEN); /* use SPDA */ \
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__gpio_as_output(SPCK); /* use SPCK */ \
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__gpio_as_output(SPDA); /* use SPDA */ \
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value = ((reg << 0) | (1 << 7)); \
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val = 0; \
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__gpio_as_output(SPDA); \
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__gpio_set_pin(SPEN); \
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__gpio_clear_pin(SPCK); \
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udelay(50); \
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__gpio_clear_pin(SPDA); \
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__gpio_clear_pin(SPEN); \
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udelay(50); \
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for (no = 0; no < 16; no++ ) { \
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udelay(50); \
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if(no < 8) \
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{ \
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if (value & 0x80) /* send data */ \
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__gpio_set_pin(SPDA); \
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else \
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__gpio_clear_pin(SPDA); \
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udelay(50); \
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__gpio_set_pin(SPCK); \
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value = (value << 1); \
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udelay(50); \
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__gpio_clear_pin(SPCK); \
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if(no == 7) \
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__gpio_as_input(SPDA); \
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} \
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else \
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{ \
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udelay(100); \
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__gpio_set_pin(SPCK); \
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udelay(50); \
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val = (val << 1); \
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val |= __gpio_get_pin(SPDA); \
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__gpio_clear_pin(SPCK); \
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} \
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} \
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__gpio_as_output(SPDA); \
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__gpio_set_pin(SPEN); \
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udelay(400); \
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} while(0)
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#define __lcd_special_pin_init() \
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do { \
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__gpio_as_output(SPEN); /* use SPDA */ \
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__gpio_as_output(SPCK); /* use SPCK */ \
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__gpio_as_output(SPDA); /* use SPDA */ \
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__gpio_as_output(LCD_RET); \
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udelay(50); \
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__gpio_clear_pin(LCD_RET); \
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udelay(100); \
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__gpio_set_pin(LCD_RET); \
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} while (0)
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#define __lcd_special_on() \
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do { \
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udelay(50); \
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__gpio_clear_pin(LCD_RET); \
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udelay(100); \
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__gpio_set_pin(LCD_RET); \
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} while (0)
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#define __lcd_special_off() \
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do { \
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__gpio_clear_pin(LCD_RET); \
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} while (0)
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#endif /* CONFIG_JZLCD_AUO_A030FL01_V1 */
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#ifndef __lcd_special_pin_init
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#define __lcd_special_pin_init()
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#endif
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#ifndef __lcd_special_on
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#define __lcd_special_on()
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#endif
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#ifndef __lcd_special_off
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#define __lcd_special_off()
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#endif
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/*
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* Platform specific definition
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*/
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#if defined(CONFIG_SOC_JZ4760) || defined(CONFIG_SOC_JZ4760D)
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#if defined(CONFIG_JZ4760_APUS) /* board apus */
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#define __lcd_display_pin_init() \
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do { \
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__gpio_as_output(GPIO_LCD_VCC_EN_N); \
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__lcd_special_pin_init(); \
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} while (0)
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#define __lcd_display_on() \
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do { \
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__gpio_clear_pin(GPIO_LCD_VCC_EN_N); \
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__lcd_special_on(); \
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mdelay(200); \
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__lcd_set_backlight_level(80); \
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} while (0)
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#define __lcd_display_off() \
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do { \
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__lcd_close_backlight(); \
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__lcd_special_off(); \
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} while (0)
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#elif defined(CONFIG_JZ4760D_CETUS)/* board apus */
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#define __lcd_display_pin_init() \
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do { \
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__gpio_as_output(GPIO_LCD_VCC_EN_N); \
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__lcd_special_pin_init(); \
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} while (0)
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#define __lcd_display_on() \
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do { \
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__gpio_set_pin(GPIO_LCD_VCC_EN_N); \
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__lcd_special_on(); \
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__lcd_set_backlight_level(80); \
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} while (0)
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#define __lcd_display_off() \
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do { \
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__lcd_close_backlight(); \
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__lcd_special_off(); \
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} while (0)
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#else /* other boards */
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#define __lcd_display_pin_init() \
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do { \
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__lcd_special_pin_init(); \
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} while (0)
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#define __lcd_display_on() \
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do { \
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__lcd_special_on(); \
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__lcd_set_backlight_level(80); \
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} while (0)
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#define __lcd_display_off() \
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do { \
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__lcd_close_backlight(); \
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__lcd_special_off(); \
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} while (0)
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#endif /* APUS */
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#endif /* CONFIG_SOC_JZ4760 */
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/*****************************************************************************
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* LCD display pin dummy macros
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*****************************************************************************/
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#ifndef __lcd_display_pin_init
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#define __lcd_display_pin_init()
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#endif
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#ifndef __lcd_slcd_special_on
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#define __lcd_slcd_special_on()
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#endif
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#ifndef __lcd_display_on
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#define __lcd_display_on()
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#endif
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#ifndef __lcd_display_off
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#define __lcd_display_off()
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#endif
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#ifndef __lcd_set_backlight_level
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#define __lcd_set_backlight_level(n)
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#endif
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#endif /* __JZ4760_LCD_H__ */
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